Commit Graph

48 Commits

Author SHA1 Message Date
GovanifY 132431b7c8 headers: relicense to GPL-3.0+
also update to 2024 while i'm at it
2024-07-30 17:17:13 -04:00
Stenzek 59d29b3648 Common: Rename General to HostSys
Actually fits what it's doing.
2023-12-27 13:55:35 +10:00
Stenzek fb15893521 VMManager: Remove and merge System.cpp 2023-12-27 13:55:35 +10:00
Stenzek 0bc9c7ffa1 Common: Replace x86_intrin.h with generic Intrin.h
For later Apple Silicon support.
2023-12-24 14:03:14 +10:00
Stenzek d9abe10308 Misc: Remove explicit PCH include, switch to SPDX 2023-12-24 14:03:14 +10:00
Stenzek 606cbb3883 System: Simplify memory allocation 2023-10-10 18:01:30 +10:00
Stenzek 377746f155 x86: Move dispatchers to recompiler code space 2023-10-10 18:01:30 +10:00
Stenzek 9d3de8631c Patch: Add "bytes" type
Allows patching an arbitrary range of bytes.
2023-06-03 23:09:52 +01:00
Stenzek 4cf041f6cb Common: Move VirtualMemory related functionality to core
Also rewrites page fault handling to not use EventSource junk.
2023-01-26 11:11:36 +00:00
Connor McLaughlin 1ccddb92d4 EE Rec/IOP Rec: Rewrite large portions
- Add fastmem
 - Add delay slot swapping
 - Add COP2 sync elision
 - Add block analysis and use analysis
 - Add GPR register caching and renaming
2022-11-19 04:59:10 +00:00
Connor McLaughlin 00bcb4cf02 System: Revamp memory allocation
Guest memory is now mapped into a shared memory/file mapping, for use
with fastmem.

64-bit and 128-bit arguments are passed by register/value instead of by
reference/address.

LDL/LDR/SDL/SDR now use 64-bit GPRs instead of SSE.
2022-10-14 22:24:42 +01:00
Connor McLaughlin c0e65d9a36 vtlb: Add RAM accessors which avoid hw access 2022-06-04 18:10:46 +01:00
Connor McLaughlin 893b3c629d Everything: Remove a **lot** of wx, and px nonsense
- common has no wx left except for Path.
 - pcsx2core only has it in a few places (memory cards and path related
   stuff).
2022-05-22 13:58:56 +01:00
Connor McLaughlin d535331b4b Misc: Remove __fastcall, __fc, __concall and friends
These have no meaning in x64 (apart from throwing compiler warnings),
and we don't do 32-bit anymore. Also saves needing to include
`Pcsx2Defs.h` in files which don't otherwise need it.
2022-05-12 14:58:03 +01:00
TellowKrinkle f7476dfb63 Core: Replace alignment macros with alignas 2021-11-14 13:52:20 -06:00
TellowKrinkle e9518f78c7 vtlb: Switch read64 and read128 handlers to return in sse regs 2021-09-21 22:57:41 +01:00
kojin 8fdaaa2eab common: reorganize 2021-09-04 18:28:07 -04:00
tellowkrinkle 850efdc690
Move VTLB manipulation to class (#3524)
Another small piece of #3451

Moves all VTLB pointer manipulation into dedicated classes for the purpose, which should allow the algorithm to be changed much more easily in the future (only have to change the class and recVTLB.cpp assembly since it obviously can't use the class)

Also some of the functions that manipulated the VTLB previously used POINTER_SIGN_BIT (which 1 << 63 on 64-bit) while others used a sign-extended 0x80000000. Now they all use the same one (POINTER_SIGN_BIT)

Note: recVTLB.cpp was updated to keep it compiling but the rest of the x86-64 compatibility changes were left out

Also, Cache.cpp seems to assume VTLB entries are both sides of the union at the same time, which is impossible. Does anyone know how this actually worked (and if this patch breaks it) or if it never worked properly in the first place?
2020-08-19 09:37:23 +01:00
tellowkrinkle 75aac90452
Allocate memory in an x86-64-compatible way (#3523)
Allocate memory in an x86-64-compatible way

Another part of #3451

Note: While this shouldn't change how anything works, it's been the #1 source of breakage of 32-bit builds in #3451 (it was the cause for the failure of win32 to allocate memory and the failure of linux-32 afterward) so we should definitely make sure it gets tested

see #3523 for more information
2020-08-19 09:20:48 +01:00
Gregory Hainaut 2ff43f2ed8 core: remove throw specifier on destructor
It is the 'default' on C++11
2017-05-13 10:38:35 +02:00
Gregory Hainaut 41d13dc2c6 vtlb: remove SetBaseAddr
Base address is given in the constructor
2016-01-10 14:31:49 +01:00
Gregory Hainaut 23591deb81 pcsx2: initialize members in constructor of objects 2015-09-23 09:47:27 +02:00
Gregory Hainaut 2cfbc6e5ef pcsx2:tlb: extend goemon gamefix
Add GoemonUnloadTlb function that invalidate TLB cache.

Currently the function is only used on the interpreter. It fixes TLB error after a reload of data.

Next step: porting to the recompiler
2014-12-12 22:14:08 +01:00
Ryan Houdek bddb2504b5 Get the VTLB working on x86_64.
VTLB does some nonsense with signed integers for the pointers.
We've got to make sure to set the signed bit in the correct bit on 64bit pointers so it works.
2014-08-22 15:31:40 -05:00
Ryan Houdek 97bed8e710 Fix vtlb compiling for x86_64.
This has no functional change on x86_32, it's mostly just changing a few pointer to u32 conversions to uptr and sptr.

I can not yet confirm if this runs on x86_64, but compiling is enough of an issue currently.
2014-07-15 16:42:59 -05:00
Gregory Hainaut c6c6171841 pcsx2: don't hide base function
As far as I understand you can't mix virtual (select at runtime) and
overloading (select at compile time).
2014-07-12 16:01:21 +02:00
Gregory Hainaut a00b8ecc55 pcsx2: tlb: goemon implement a preload hack tlb
Tlb mapping is stored @0x3d5580 (GoemonTlb[150])
The function that will populate the tlb is around pc = 0x356250, ra = 0x33ad48

The idea is to add a callback on 0x33ad48 block that will populate the tlb based on
ee mem content.

Note: The hack is based on previous Virtual PS2 => Physical PS2 LUT
2014-06-20 13:52:05 +02:00
Gregory Hainaut 9452444a9f pcsx2: tlb: add a new lut (Virtual PS2 to Physical PS2)
note: automatic gamefixes are done after done after the init that why code was splitted.
note2: The LUT is 4MB and only used for only 1 game. So I only allocate it when the gamefix is
    enabled
2014-06-20 13:51:33 +02:00
Jake.Stine 9a0a89aa13 newHostVM: Cleanups, improved error messages.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4022 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-16 04:53:52 +00:00
Jake.Stine 239c9f83d8 newHostVM: (Restored booting) -
* Added some bounds checking to debug builds for VTLB mappings.
 * Fixed a VU mapping bug that caused boot crashing
 * Fixed some startup, shutdown, and reset resource management.

git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4021 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-16 00:22:18 +00:00
Jake.Stine be1a590464 newHostVM: (WIP, may not run!) -- Applied host virtual memory mapping to the EE/IOP/VU main and on-chip memory banks. Added a new OO-based system allocator object for handling said virtual memory resources. Plus many code cleanups, and some added mess that needs to be cleaned up.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4020 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-15 14:05:02 +00:00
Jake.Stine 01541f2c92 newHostVM branch: work-in-progress stuff...
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@3958 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-10-22 16:23:52 +00:00
Jake.Stine 70cd51a64b A 'nice' fix for GCC's fickle dislike of packed structs. 1) the VU registers struct no longer needs packed (the unions ensure proper packing); 2) introduction of 128-bit UQ/SQ members.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3689 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-25 15:32:17 +00:00
Jake.Stine a8e406523b Improved EE/VTLB memory management: Removes various psM/psR/psS/psH pointers and replaces them with a single unified eeMem pointer. Members of eeMem correspond to Main, Scratchpad, Hardware, etc. This simplifies the EE's memory allocation, improves compiler optimization, gets rid of some macro mess, and allows templated code to deduce the size of memory buffers automatically.
* Includes a minor tweak to DMAC.h - removed tDMA_TADR / tDMA_MADR / etc. and replaced them with a single tDMAC_ADDR class.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3644 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-16 15:57:01 +00:00
Jake.Stine 20adde44a6 PCSX2/EEcore:
* Now using SSE for all hardware register reads and writes (mainly MFIFO stuff) [don't expect a speedup, really -- its more of a code simplification in this case].
 * [refactoring] Changed the EE Memory (vtlb) to use the u128 type instead of u64 for the 128-bit loads/stores (see mem128_t typedef)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3626 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-09 15:42:13 +00:00
gregory.hainaut 6bd3aa9889 [copyright]
* another bunch of copyright fix.


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3439 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-07-09 15:36:09 +00:00
sudonim1 4457fe40fc Removed all trailing whitespace in *.c *.cpp *.h because it irritates me.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2897 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-04-25 00:31:27 +00:00
Jake.Stine e8e61a5cf8 Settings work again!
* Switched the SysCoreThread to a static (fully persistent) thread.
 * Added some listeners for when the CoreThread status changes
 * fixed some slowness in savestates, and the emu will now stall until savestates complete, if you try to exit too quick (avoids savestate corruption)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1993 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-10-09 15:17:53 +00:00
Jake.Stine 6412271470 Renamed PCSX2_ALIGNED to __aligned and removed the need for excess parenthesis and oddball qualifiers. Left the old macros in Pcsx2defs.h for now, just in case. Redid some of the storage organization of microVU and iFPU consts and temporaries while I was at it, using structs instead of naked vars -- should improve cpu cache behavior a wee bit.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1959 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-10-05 02:15:49 +00:00
Jake.Stine 2bf04882e3 Some code cleanups for the new vtlb optimization (no intentional functional changes -- just deleted unused code and converted all of vtlb to the new emitter syntax. Let's hope I didn't typo anything!)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1138 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-05-06 12:37:37 +00:00
Jake.Stine 1cf028ccf5 Optimized vtlb direct path memory operations using some crafty asm code. Expect 2-3% speedups in most things, and perhaps more in some FMVs.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1137 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-05-06 02:15:43 +00:00
Jake.Stine 9513be5476 Reverted BTS due to unexpected complications, but retained a minor optimization we developed during the BTS experiment. :)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1091 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-04-30 01:16:25 +00:00
Jake.Stine 31f0be6eb8 Merged drk||Raziel's "BTS Manual Protection" enhancement for the vtlb into /trunk, and combined it with Pseudonim's "Manual Block Clear" enhancement for an ideal two-phase protection system.
Most things should be a bit faster with this new system.  The system is more balanced than the previous one, in that it provides a better overall performance across most games, but some specific FMVs (like Disgaea 2's) will be a bit slower.  On the other hand, others like DQ8 and Kingdom Hearts 2 FMVs get a big speedup.  Almost all in-game stuff should be either the same or faster now.

Set a bunch of ignores for TortoiseSVN users, as suggested in Issue 166.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1083 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-04-29 04:24:46 +00:00
Jake.Stine c5b366095a Fix for some random slowdown introduced in 815 (bad cacheline coloring caused a random 30% speed drop when not using speedhacks) >_<
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@819 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-03-19 10:20:56 +00:00
Jake.Stine e205999744 Minor Optimization: Added Const support to Vtlb's Load and Store implementations.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@627 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-02-27 06:40:05 +00:00
Jake.Stine 243e4fba9f Added several important variables to the VIFdma savestate, relating to it's SSE unpacker; which should make the gifdone savestate hack obsolete (it broke savestates for most FMVs and some games). Seeing how important the unpacker tables are, it's a miracle VIFdma ever recovered from a savestate without them ;)
Fixed a bug in the memorycard hotswapper.  It wasn't reloading the cards correctly after changes.

Improved the new INTC hack slightly, and changed its description since it's not quite as universally awesome as Pseudonym and I had hoped when we worked on it last night. -_-

Added __fastcall and __forceinline to some of the VIF's unpack functions, where appropriate (very small speedup).

Removed some code I added to the MULT/DIV instructions, since it wasn't needed afterall, and fixed some typos in vtlb's API.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@538 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-02-19 22:48:05 +00:00
Jake.Stine 6ebfae8ef1 Re-Added eol-style:native properties to the repository. The settings got lost when we merged from Playground to Official.
Added interface.cpp (plugin/pcsx2 interface) and savestate.cpp to SPU2ghz, to help clean up SPU2.cpp.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@463 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-02-09 21:15:56 +00:00
refraction aa94c30dc3 Should be the last of the trunk, gotta finish the branches/tags, but thats the main bulk transferred.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@426 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-02-06 20:04:37 +00:00