mirror of https://github.com/PCSX2/pcsx2.git
GregMiscellaneous: zzogl-pg:
* Forgot to remove the dis-alignment git-svn-id: http://pcsx2.googlecode.com/svn/branches/GregMiscellaneous@3922 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -663,17 +663,19 @@ void __fastcall WriteCLUT_T16_I4_CSM1_core_sse2(u32* vm, u32* clut)
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__m128i clut_mask = _mm_load_si128((__m128i*)s_clut_16bits_mask);
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// Note:
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// !HIGH_16BITS_VM
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// CSA in 0-15 -> Replace lower 16 bits of clut0 with lower 16 bits of vm
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// CSA in 16-31 -> Replace higher 16 bits of clut0 with lower 16 bits of vm
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// CSA in 0-15
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// Replace lower 16 bits of clut0 with lower 16 bits of vm
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// CSA in 16-31
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// Replace higher 16 bits of clut0 with lower 16 bits of vm
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// HIGH_16BITS_VM
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// CSA in 0-15 -> Replace lower 16 bits of clut0 with higher 16 bits of vm
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// CSA in 16-31 -> Replace higher 16 bits of clut0 with higher 16 bits of vm
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// CSA in 0-15
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// Replace lower 16 bits of clut0 with higher 16 bits of vm
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// CSA in 16-31
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// Replace higher 16 bits of clut0 with higher 16 bits of vm
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if(HIGH_16BITS_VM && CSA_0_15) {
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// move high to low
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// move up to low
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vm_0 = _mm_load_si128((__m128i*)vm); // 9 8 1 0
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vm_1 = _mm_load_si128((__m128i*)vm+1); // 11 10 3 2
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vm_2 = _mm_load_si128((__m128i*)vm+2); // 13 12 5 4
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@ -739,13 +741,13 @@ void __fastcall WriteCLUT_T16_I4_CSM1_core_sse2(u32* vm, u32* clut)
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_mm_store_si128((__m128i*)clut+3, clut_3);
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}
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extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut)
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extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32 csa)
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{
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if ((u32)clut & 0x0F) {
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// CSA 16-31 && low 16bits vm
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u32* clut = (u32*)(g_pbyGSClut + 64*(csa & 15));
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if (csa > 15) {
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WriteCLUT_T16_I4_CSM1_core_sse2<false, false>(vm, clut);
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} else {
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// CSA 0-15 && low 16bits vm
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WriteCLUT_T16_I4_CSM1_core_sse2<true, false>(vm, clut);
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}
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}
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@ -96,9 +96,11 @@ extern void __fastcall SwizzleColumn16_c(int y, u8* dst, u8* src, int srcpitch);
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extern void __fastcall SwizzleColumn8_c(int y, u8* dst, u8* src, int srcpitch);
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extern void __fastcall SwizzleColumn4_c(int y, u8* dst, u8* src, int srcpitch);
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extern "C" void __fastcall WriteCLUT_T16_I8_CSM1_sse2(u32* vm, u32* clut);
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// extern "C" void __fastcall WriteCLUT_T16_I8_CSM1_sse2(u32* vm, u32* clut);
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extern "C" void __fastcall WriteCLUT_T16_I8_CSM1_sse2(u32* vm, u32 csa);
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extern "C" void __fastcall WriteCLUT_T32_I8_CSM1_sse2(u32* vm, u32* clut);
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extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut);
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// extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut);
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extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32 csa);
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extern "C" void __fastcall WriteCLUT_T32_I4_CSM1_sse2(u32* vm, u32* clut);
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extern void __fastcall WriteCLUT_T16_I8_CSM1_c(u32* vm, u32* clut);
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extern void __fastcall WriteCLUT_T32_I8_CSM1_c(u32* vm, u32* clut);
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@ -1221,7 +1221,11 @@ void ZeroGS::texClutWrite(int ctx)
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break;
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default:
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WriteCLUT_T16_I4_CSM1(src, (u32*)(g_pbyGSClut + 64*(tex0.csa & 15) + (tex0.csa >= 16 ? 2 : 0)));
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#ifdef ZEROGS_SSE2
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WriteCLUT_T16_I4_CSM1_sse2(src, tex0.csa);
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#else
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WriteCLUT_T16_I4_CSM1_c(src, (u32*)(g_pbyGSClut + 64*(tex0.csa & 15) + (tex0.csa >= 16 ? 2 : 0)));
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#endif
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break;
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}
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}
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