mirror of https://github.com/PCSX2/pcsx2.git
DEV9: Reduce the amount of log spam form network traffic in Debug mode
This commit is contained in:
parent
6051312dfb
commit
f7838750c9
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@ -235,7 +235,7 @@ void DEV9close()
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int DEV9irqHandler(void)
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{
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//dev9Ru16(SPD_R_INTR_STAT)|= dev9.irqcause;
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DevCon.WriteLn("DEV9: DEV9irqHandler %x, %x", dev9.irqcause, dev9.irqmask);
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//DevCon.WriteLn("DEV9: DEV9irqHandler %x, %x", dev9.irqcause, dev9.irqmask);
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if (dev9.irqcause & dev9.irqmask)
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return 1;
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return 0;
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@ -243,7 +243,7 @@ int DEV9irqHandler(void)
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void _DEV9irq(int cause, int cycles)
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{
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DevCon.WriteLn("DEV9: _DEV9irq %x, %x", cause, dev9.irqmask);
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//DevCon.WriteLn("DEV9: _DEV9irq %x, %x", cause, dev9.irqmask);
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dev9.irqcause |= cause;
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@ -365,12 +365,12 @@ u8 DEV9read8(u32 addr)
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}
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else
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hard = 0;
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DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit read %x", hard);
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//DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit read %x", hard);
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return hard;
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case DEV9_R_REV:
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hard = 0x32; // expansion bay
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DevCon.WriteLn("DEV9: DEV9_R_REV 8bit read %x", hard);
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//DevCon.WriteLn("DEV9: DEV9_R_REV 8bit read %x", hard);
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return hard;
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default:
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@ -403,11 +403,11 @@ u16 DEV9read16(u32 addr)
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switch (addr)
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{
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case SPD_R_INTR_STAT:
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DevCon.WriteLn("DEV9: SPD_R_INTR_STAT 16bit read %x", dev9.irqcause);
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//DevCon.WriteLn("DEV9: SPD_R_INTR_STAT 16bit read %x", dev9.irqcause);
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return dev9.irqcause;
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case SPD_R_INTR_MASK:
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DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit read %x", dev9.irqmask);
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//DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit read %x", dev9.irqmask);
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return dev9.irqmask;
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case SPD_R_PIO_DATA:
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@ -438,22 +438,22 @@ u16 DEV9read16(u32 addr)
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}
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else
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hard = 0;
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DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit read %x", hard);
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//DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit read %x", hard);
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return hard;
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case DEV9_R_REV:
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//hard = 0x0030; // expansion bay
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DevCon.WriteLn("DEV9: DEV9_R_REV 16bit read %x", dev9.irqmask);
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//DevCon.WriteLn("DEV9: DEV9_R_REV 16bit read %x", dev9.irqmask);
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hard = 0x0032;
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return hard;
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case SPD_R_REV_1:
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DevCon.WriteLn("DEV9: SPD_R_REV_1 16bit read %x", 0);
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//DevCon.WriteLn("DEV9: SPD_R_REV_1 16bit read %x", 0);
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return 0;
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case SPD_R_REV_2:
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hard = 0x0011;
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DevCon.WriteLn("DEV9: STD_R_REV_2 16bit read %x", hard);
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//DevCon.WriteLn("DEV9: STD_R_REV_2 16bit read %x", hard);
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return hard;
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case SPD_R_REV_3:
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@ -463,7 +463,7 @@ u16 DEV9read16(u32 addr)
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if (config.ethEnable)
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hard |= SPD_CAPS_SMAP;
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hard |= SPD_CAPS_FLASH;
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DevCon.WriteLn("DEV9: SPD_R_REV_3 16bit read %x", hard);
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//DevCon.WriteLn("DEV9: SPD_R_REV_3 16bit read %x", hard);
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return hard;
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case SPD_R_0e:
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@ -585,7 +585,7 @@ void DEV9write8(u32 addr, u8 value)
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break;
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case SPD_R_PIO_DIR:
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DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 8bit write %x", value);
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//DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 8bit write %x", value);
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if ((value & 0xc0) != 0xc0)
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return;
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@ -599,7 +599,7 @@ void DEV9write8(u32 addr, u8 value)
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return;
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case SPD_R_PIO_DATA:
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DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit write %x", value);
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//DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit write %x", value);
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if ((value & 0xc0) != 0xc0)
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return;
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@ -683,17 +683,17 @@ void DEV9write16(u32 addr, u16 value)
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switch (addr)
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{
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case SPD_R_INTR_MASK:
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DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit write %x , checking for masked/unmasked interrupts", value);
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//DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit write %x , checking for masked/unmasked interrupts", value);
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if ((dev9.irqmask != value) && ((dev9.irqmask | value) & dev9.irqcause))
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{
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DevCon.WriteLn("DEV9: SPD_R_INTR_MASK16 firing unmasked interrupts");
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//DevCon.WriteLn("DEV9: SPD_R_INTR_MASK16 firing unmasked interrupts");
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dev9Irq(1);
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}
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dev9.irqmask = value;
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break;
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case SPD_R_PIO_DIR:
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DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 16bit write %x", value);
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//DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 16bit write %x", value);
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if ((value & 0xc0) != 0xc0)
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return;
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@ -707,7 +707,7 @@ void DEV9write16(u32 addr, u16 value)
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return;
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case SPD_R_PIO_DATA:
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DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit write %x", value);
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//DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit write %x", value);
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if ((value & 0xc0) != 0xc0)
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return;
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@ -761,23 +761,23 @@ void DEV9write16(u32 addr, u16 value)
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return;
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case SPD_R_DMA_CTRL:
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DevCon.WriteLn("DEV9: SPD_R_IF_CTRL 16bit write %x", value);
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//DevCon.WriteLn("DEV9: SPD_R_IF_CTRL 16bit write %x", value);
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dev9.dma_ctrl = value;
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if (value & SPD_DMA_TO_SMAP)
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DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For SMAP");
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else
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DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For ATA");
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//if (value & SPD_DMA_TO_SMAP)
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// DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For SMAP");
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//else
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// DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For ATA");
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if ((value & SPD_DMA_FASTEST) != 0)
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DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Fastest DMA Mode");
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else
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DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Slower DMA Mode");
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//if ((value & SPD_DMA_FASTEST) != 0)
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// DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Fastest DMA Mode");
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//else
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// DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Slower DMA Mode");
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if ((value & SPD_DMA_WIDE) != 0)
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DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Wide(32bit) DMA Mode Set");
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else
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DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL 16bit DMA Mode");
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//if ((value & SPD_DMA_WIDE) != 0)
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// DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Wide(32bit) DMA Mode Set");
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//else
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// DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL 16bit DMA Mode");
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if ((value & SPD_DMA_PAUSE) != 0)
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Console.Error("DEV9: SPD_R_DMA_CTRL Pause DMA Not Implemented");
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@ -250,13 +250,12 @@ void emac3_write(u32 addr)
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switch (addr)
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{
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case SMAP_R_EMAC3_MODE0_L:
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DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_MODE0 write %x", value);
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//DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_MODE0 write %x", value);
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value = (value & (~SMAP_E3_SOFT_RESET)) | SMAP_E3_TXMAC_IDLE | SMAP_E3_RXMAC_IDLE;
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dev9Ru16(SMAP_R_EMAC3_STA_CTRL_H) |= SMAP_E3_PHY_OP_COMP;
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break;
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case SMAP_R_EMAC3_TxMODE0_L:
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DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_TxMODE0_L write %x", value);
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//spams// emu_printf("SMAP: SMAP_R_EMAC3_TxMODE0_L write %x\n", value);
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//DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_TxMODE0_L write %x", value);
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//Process TX here ?
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if (!(value & SMAP_E3_TX_GNP_0))
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Console.Error("DEV9: SMAP_R_EMAC3_TxMODE0_L: SMAP_E3_TX_GNP_0 not set");
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@ -267,7 +266,7 @@ void emac3_write(u32 addr)
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Console.Error("DEV9: SMAP_R_EMAC3_TxMODE0_L: extra bits set !");
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break;
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case SMAP_R_EMAC3_TxMODE1_L:
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DevCon.WriteLn("DEV9: SMAP_R_EMAC3_TxMODE1_L 32bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP_R_EMAC3_TxMODE1_L 32bit write %x", value);
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if (value == 0x380f0000)
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{
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Console.WriteLn("DEV9: Adapter Detection Hack - Resetting RX/TX");
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@ -275,7 +274,7 @@ void emac3_write(u32 addr)
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}
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break;
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case SMAP_R_EMAC3_STA_CTRL_L:
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DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_STA_CTRL write %x", value);
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//DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_STA_CTRL write %x", value);
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{
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if (value & (SMAP_E3_PHY_READ))
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{
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@ -293,7 +292,7 @@ void emac3_write(u32 addr)
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val |= SMAP_PHY_STS_LINK | SMAP_PHY_STS_100M | SMAP_PHY_STS_FDX | SMAP_PHY_STS_ANCP;
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break;
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}
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DevCon.WriteLn("DEV9: phy_read %d: %x", reg, val);
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//DevCon.WriteLn("DEV9: phy_read %d: %x", reg, val);
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value = (value & 0xFFFF) | (val << 16);
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}
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if (value & (SMAP_E3_PHY_WRITE))
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@ -308,7 +307,7 @@ void emac3_write(u32 addr)
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val |= 0x1;
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break;
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}
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DevCon.WriteLn("DEV9: phy_write %d: %x", reg, val);
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//DevCon.WriteLn("DEV9: phy_write %d: %x", reg, val);
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dev9.phyregs[reg] = val;
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}
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}
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@ -524,7 +523,7 @@ u32 smap_read32(u32 addr)
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dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = ((rd_ptr + 4) & 16383);
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DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_DATA 32bit read %x", rv);
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//DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_DATA 32bit read %x", rv);
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return rv;
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}
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default:
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@ -540,14 +539,14 @@ void smap_write8(u32 addr, u8 value)
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switch (addr)
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{
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case SMAP_R_TXFIFO_FRAME_INC:
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DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_FRAME_INC 8bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_FRAME_INC 8bit write %x", value);
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{
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dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT)++;
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}
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return;
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case SMAP_R_RXFIFO_FRAME_DEC:
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DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_FRAME_DEC 8bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_FRAME_DEC 8bit write %x", value);
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counter_lock.lock();
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dev9Ru8(addr) = value;
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{
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@ -557,7 +556,7 @@ void smap_write8(u32 addr, u8 value)
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return;
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case SMAP_R_TXFIFO_CTRL:
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DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_CTRL 8bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_CTRL 8bit write %x", value);
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if (value & SMAP_TXFIFO_RESET)
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{
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dev9.txbdi = 0;
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@ -571,7 +570,7 @@ void smap_write8(u32 addr, u8 value)
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return;
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case SMAP_R_RXFIFO_CTRL:
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DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_CTRL 8bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_CTRL 8bit write %x", value);
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if (value & SMAP_RXFIFO_RESET)
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{
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reset_lock.lock(); //lock reset mutex 1st
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@ -675,7 +674,7 @@ void smap_write16(u32 addr, u16 value)
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switch (addr)
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{
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case SMAP_R_INTR_CLR:
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DevCon.WriteLn("DEV9: SMAP: SMAP_R_INTR_CLR 16bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP: SMAP_R_INTR_CLR 16bit write %x", value);
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dev9.irqcause &= ~value;
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return;
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@ -685,7 +684,7 @@ void smap_write16(u32 addr, u16 value)
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return;
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#define EMAC3_L_WRITE(name) \
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case name: \
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DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value); \
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/* DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value);*/ \
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dev9Ru16(addr) = value; \
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return;
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// clang-format off
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@ -722,7 +721,7 @@ void smap_write16(u32 addr, u16 value)
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#define EMAC3_H_WRITE(name) \
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case name: \
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DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value); \
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/* DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value);*/ \
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dev9Ru16(addr) = value; \
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emac3_write(addr - 2); \
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return;
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@ -804,7 +803,7 @@ void smap_write32(u32 addr, u32 value)
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switch (addr)
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{
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case SMAP_R_TXFIFO_DATA:
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DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_DATA 32bit write %x", value);
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//DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_DATA 32bit write %x", value);
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*((u32*)(dev9.txfifo + dev9Ru32(SMAP_R_TXFIFO_WR_PTR))) = value;
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dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = (dev9Ru32(SMAP_R_TXFIFO_WR_PTR) + 4) & 16383;
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return;
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