From f7838750c94f10400459e2b5a1f368544f578fa0 Mon Sep 17 00:00:00 2001 From: TheLastRar Date: Tue, 24 Aug 2021 22:19:52 +0100 Subject: [PATCH] DEV9: Reduce the amount of log spam form network traffic in Debug mode --- pcsx2/DEV9/DEV9.cpp | 60 ++++++++++++++++++++++----------------------- pcsx2/DEV9/smap.cpp | 31 ++++++++++++----------- 2 files changed, 45 insertions(+), 46 deletions(-) diff --git a/pcsx2/DEV9/DEV9.cpp b/pcsx2/DEV9/DEV9.cpp index 101d21cc57..e6616594a6 100644 --- a/pcsx2/DEV9/DEV9.cpp +++ b/pcsx2/DEV9/DEV9.cpp @@ -235,7 +235,7 @@ void DEV9close() int DEV9irqHandler(void) { //dev9Ru16(SPD_R_INTR_STAT)|= dev9.irqcause; - DevCon.WriteLn("DEV9: DEV9irqHandler %x, %x", dev9.irqcause, dev9.irqmask); + //DevCon.WriteLn("DEV9: DEV9irqHandler %x, %x", dev9.irqcause, dev9.irqmask); if (dev9.irqcause & dev9.irqmask) return 1; return 0; @@ -243,7 +243,7 @@ int DEV9irqHandler(void) void _DEV9irq(int cause, int cycles) { - DevCon.WriteLn("DEV9: _DEV9irq %x, %x", cause, dev9.irqmask); + //DevCon.WriteLn("DEV9: _DEV9irq %x, %x", cause, dev9.irqmask); dev9.irqcause |= cause; @@ -365,12 +365,12 @@ u8 DEV9read8(u32 addr) } else hard = 0; - DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit read %x", hard); + //DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit read %x", hard); return hard; case DEV9_R_REV: hard = 0x32; // expansion bay - DevCon.WriteLn("DEV9: DEV9_R_REV 8bit read %x", hard); + //DevCon.WriteLn("DEV9: DEV9_R_REV 8bit read %x", hard); return hard; default: @@ -403,11 +403,11 @@ u16 DEV9read16(u32 addr) switch (addr) { case SPD_R_INTR_STAT: - DevCon.WriteLn("DEV9: SPD_R_INTR_STAT 16bit read %x", dev9.irqcause); + //DevCon.WriteLn("DEV9: SPD_R_INTR_STAT 16bit read %x", dev9.irqcause); return dev9.irqcause; case SPD_R_INTR_MASK: - DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit read %x", dev9.irqmask); + //DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit read %x", dev9.irqmask); return dev9.irqmask; case SPD_R_PIO_DATA: @@ -438,22 +438,22 @@ u16 DEV9read16(u32 addr) } else hard = 0; - DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit read %x", hard); + //DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit read %x", hard); return hard; case DEV9_R_REV: //hard = 0x0030; // expansion bay - DevCon.WriteLn("DEV9: DEV9_R_REV 16bit read %x", dev9.irqmask); + //DevCon.WriteLn("DEV9: DEV9_R_REV 16bit read %x", dev9.irqmask); hard = 0x0032; return hard; case SPD_R_REV_1: - DevCon.WriteLn("DEV9: SPD_R_REV_1 16bit read %x", 0); + //DevCon.WriteLn("DEV9: SPD_R_REV_1 16bit read %x", 0); return 0; case SPD_R_REV_2: hard = 0x0011; - DevCon.WriteLn("DEV9: STD_R_REV_2 16bit read %x", hard); + //DevCon.WriteLn("DEV9: STD_R_REV_2 16bit read %x", hard); return hard; case SPD_R_REV_3: @@ -463,7 +463,7 @@ u16 DEV9read16(u32 addr) if (config.ethEnable) hard |= SPD_CAPS_SMAP; hard |= SPD_CAPS_FLASH; - DevCon.WriteLn("DEV9: SPD_R_REV_3 16bit read %x", hard); + //DevCon.WriteLn("DEV9: SPD_R_REV_3 16bit read %x", hard); return hard; case SPD_R_0e: @@ -585,7 +585,7 @@ void DEV9write8(u32 addr, u8 value) break; case SPD_R_PIO_DIR: - DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 8bit write %x", value); + //DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 8bit write %x", value); if ((value & 0xc0) != 0xc0) return; @@ -599,7 +599,7 @@ void DEV9write8(u32 addr, u8 value) return; case SPD_R_PIO_DATA: - DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit write %x", value); + //DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 8bit write %x", value); if ((value & 0xc0) != 0xc0) return; @@ -683,17 +683,17 @@ void DEV9write16(u32 addr, u16 value) switch (addr) { case SPD_R_INTR_MASK: - DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit write %x , checking for masked/unmasked interrupts", value); + //DevCon.WriteLn("DEV9: SPD_R_INTR_MASK 16bit write %x , checking for masked/unmasked interrupts", value); if ((dev9.irqmask != value) && ((dev9.irqmask | value) & dev9.irqcause)) { - DevCon.WriteLn("DEV9: SPD_R_INTR_MASK16 firing unmasked interrupts"); + //DevCon.WriteLn("DEV9: SPD_R_INTR_MASK16 firing unmasked interrupts"); dev9Irq(1); } dev9.irqmask = value; break; case SPD_R_PIO_DIR: - DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 16bit write %x", value); + //DevCon.WriteLn("DEV9: SPD_R_PIO_DIR 16bit write %x", value); if ((value & 0xc0) != 0xc0) return; @@ -707,7 +707,7 @@ void DEV9write16(u32 addr, u16 value) return; case SPD_R_PIO_DATA: - DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit write %x", value); + //DevCon.WriteLn("DEV9: SPD_R_PIO_DATA 16bit write %x", value); if ((value & 0xc0) != 0xc0) return; @@ -761,23 +761,23 @@ void DEV9write16(u32 addr, u16 value) return; case SPD_R_DMA_CTRL: - DevCon.WriteLn("DEV9: SPD_R_IF_CTRL 16bit write %x", value); + //DevCon.WriteLn("DEV9: SPD_R_IF_CTRL 16bit write %x", value); dev9.dma_ctrl = value; - if (value & SPD_DMA_TO_SMAP) - DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For SMAP"); - else - DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For ATA"); + //if (value & SPD_DMA_TO_SMAP) + // DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For SMAP"); + //else + // DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL DMA For ATA"); - if ((value & SPD_DMA_FASTEST) != 0) - DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Fastest DMA Mode"); - else - DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Slower DMA Mode"); + //if ((value & SPD_DMA_FASTEST) != 0) + // DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Fastest DMA Mode"); + //else + // DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Slower DMA Mode"); - if ((value & SPD_DMA_WIDE) != 0) - DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Wide(32bit) DMA Mode Set"); - else - DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL 16bit DMA Mode"); + //if ((value & SPD_DMA_WIDE) != 0) + // DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL Wide(32bit) DMA Mode Set"); + //else + // DevCon.WriteLn("DEV9: SPD_R_DMA_CTRL 16bit DMA Mode"); if ((value & SPD_DMA_PAUSE) != 0) Console.Error("DEV9: SPD_R_DMA_CTRL Pause DMA Not Implemented"); diff --git a/pcsx2/DEV9/smap.cpp b/pcsx2/DEV9/smap.cpp index 2c7f08beee..e56a990154 100644 --- a/pcsx2/DEV9/smap.cpp +++ b/pcsx2/DEV9/smap.cpp @@ -250,13 +250,12 @@ void emac3_write(u32 addr) switch (addr) { case SMAP_R_EMAC3_MODE0_L: - DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_MODE0 write %x", value); + //DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_MODE0 write %x", value); value = (value & (~SMAP_E3_SOFT_RESET)) | SMAP_E3_TXMAC_IDLE | SMAP_E3_RXMAC_IDLE; dev9Ru16(SMAP_R_EMAC3_STA_CTRL_H) |= SMAP_E3_PHY_OP_COMP; break; case SMAP_R_EMAC3_TxMODE0_L: - DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_TxMODE0_L write %x", value); - //spams// emu_printf("SMAP: SMAP_R_EMAC3_TxMODE0_L write %x\n", value); + //DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_TxMODE0_L write %x", value); //Process TX here ? if (!(value & SMAP_E3_TX_GNP_0)) Console.Error("DEV9: SMAP_R_EMAC3_TxMODE0_L: SMAP_E3_TX_GNP_0 not set"); @@ -267,7 +266,7 @@ void emac3_write(u32 addr) Console.Error("DEV9: SMAP_R_EMAC3_TxMODE0_L: extra bits set !"); break; case SMAP_R_EMAC3_TxMODE1_L: - DevCon.WriteLn("DEV9: SMAP_R_EMAC3_TxMODE1_L 32bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP_R_EMAC3_TxMODE1_L 32bit write %x", value); if (value == 0x380f0000) { Console.WriteLn("DEV9: Adapter Detection Hack - Resetting RX/TX"); @@ -275,7 +274,7 @@ void emac3_write(u32 addr) } break; case SMAP_R_EMAC3_STA_CTRL_L: - DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_STA_CTRL write %x", value); + //DevCon.WriteLn("DEV9: SMAP: SMAP_R_EMAC3_STA_CTRL write %x", value); { if (value & (SMAP_E3_PHY_READ)) { @@ -293,7 +292,7 @@ void emac3_write(u32 addr) val |= SMAP_PHY_STS_LINK | SMAP_PHY_STS_100M | SMAP_PHY_STS_FDX | SMAP_PHY_STS_ANCP; break; } - DevCon.WriteLn("DEV9: phy_read %d: %x", reg, val); + //DevCon.WriteLn("DEV9: phy_read %d: %x", reg, val); value = (value & 0xFFFF) | (val << 16); } if (value & (SMAP_E3_PHY_WRITE)) @@ -308,7 +307,7 @@ void emac3_write(u32 addr) val |= 0x1; break; } - DevCon.WriteLn("DEV9: phy_write %d: %x", reg, val); + //DevCon.WriteLn("DEV9: phy_write %d: %x", reg, val); dev9.phyregs[reg] = val; } } @@ -524,7 +523,7 @@ u32 smap_read32(u32 addr) dev9Ru32(SMAP_R_RXFIFO_RD_PTR) = ((rd_ptr + 4) & 16383); - DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_DATA 32bit read %x", rv); + //DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_DATA 32bit read %x", rv); return rv; } default: @@ -540,14 +539,14 @@ void smap_write8(u32 addr, u8 value) switch (addr) { case SMAP_R_TXFIFO_FRAME_INC: - DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_FRAME_INC 8bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_FRAME_INC 8bit write %x", value); { dev9Ru8(SMAP_R_TXFIFO_FRAME_CNT)++; } return; case SMAP_R_RXFIFO_FRAME_DEC: - DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_FRAME_DEC 8bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_FRAME_DEC 8bit write %x", value); counter_lock.lock(); dev9Ru8(addr) = value; { @@ -557,7 +556,7 @@ void smap_write8(u32 addr, u8 value) return; case SMAP_R_TXFIFO_CTRL: - DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_CTRL 8bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_CTRL 8bit write %x", value); if (value & SMAP_TXFIFO_RESET) { dev9.txbdi = 0; @@ -571,7 +570,7 @@ void smap_write8(u32 addr, u8 value) return; case SMAP_R_RXFIFO_CTRL: - DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_CTRL 8bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP_R_RXFIFO_CTRL 8bit write %x", value); if (value & SMAP_RXFIFO_RESET) { reset_lock.lock(); //lock reset mutex 1st @@ -675,7 +674,7 @@ void smap_write16(u32 addr, u16 value) switch (addr) { case SMAP_R_INTR_CLR: - DevCon.WriteLn("DEV9: SMAP: SMAP_R_INTR_CLR 16bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP: SMAP_R_INTR_CLR 16bit write %x", value); dev9.irqcause &= ~value; return; @@ -685,7 +684,7 @@ void smap_write16(u32 addr, u16 value) return; #define EMAC3_L_WRITE(name) \ case name: \ - DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value); \ + /* DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value);*/ \ dev9Ru16(addr) = value; \ return; // clang-format off @@ -722,7 +721,7 @@ void smap_write16(u32 addr, u16 value) #define EMAC3_H_WRITE(name) \ case name: \ - DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value); \ + /* DevCon.WriteLn("DEV9: SMAP: " #name " 16 bit write %x", value);*/ \ dev9Ru16(addr) = value; \ emac3_write(addr - 2); \ return; @@ -804,7 +803,7 @@ void smap_write32(u32 addr, u32 value) switch (addr) { case SMAP_R_TXFIFO_DATA: - DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_DATA 32bit write %x", value); + //DevCon.WriteLn("DEV9: SMAP_R_TXFIFO_DATA 32bit write %x", value); *((u32*)(dev9.txfifo + dev9Ru32(SMAP_R_TXFIFO_WR_PTR))) = value; dev9Ru32(SMAP_R_TXFIFO_WR_PTR) = (dev9Ru32(SMAP_R_TXFIFO_WR_PTR) + 4) & 16383; return;