mirror of https://github.com/PCSX2/pcsx2.git
Core: Replace alignment macros with alignas
This commit is contained in:
parent
87f7672dbf
commit
f7476dfb63
|
@ -28,7 +28,7 @@ __noinline void memset_sse_a(void* dest, const size_t size)
|
||||||
|
|
||||||
if (data != 0)
|
if (data != 0)
|
||||||
{
|
{
|
||||||
static __aligned16 const u8 loadval[8] = {data, data, data, data, data, data, data, data};
|
alignas(16) static const u8 loadval[8] = {data, data, data, data, data, data, data, data};
|
||||||
srcreg = _mm_loadh_pi(_mm_load_ps((float*)loadval), (__m64*)loadval);
|
srcreg = _mm_loadh_pi(_mm_load_ps((float*)loadval), (__m64*)loadval);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|
|
@ -77,22 +77,6 @@
|
||||||
#define pxNonReleaseCode(code)
|
#define pxNonReleaseCode(code)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// --------------------------------------------------------------------------------------
|
|
||||||
// __aligned / __aligned16 / __pagealigned
|
|
||||||
// --------------------------------------------------------------------------------------
|
|
||||||
// GCC Warning! The GCC linker (LD) typically fails to assure alignment of class members.
|
|
||||||
// If you want alignment to be assured, the variable must either be a member of a struct
|
|
||||||
// or a static global.
|
|
||||||
//
|
|
||||||
// __pagealigned is equivalent to __aligned(0x1000), and is used to align a dynarec code
|
|
||||||
// buffer to a page boundary (allows the use of execution-enabled mprotect).
|
|
||||||
//
|
|
||||||
// General Performance Warning: Any function that specifies alignment on a local (stack)
|
|
||||||
// variable will have to align the stack frame on enter, and restore it on exit (adds
|
|
||||||
// overhead). Furthermore, compilers cannot inline functions that have aligned local
|
|
||||||
// vars. So use local var alignment with much caution.
|
|
||||||
//
|
|
||||||
|
|
||||||
// Defines the memory page size for the target platform at compilation. All supported platforms
|
// Defines the memory page size for the target platform at compilation. All supported platforms
|
||||||
// (which means Intel only right now) have a 4k granularity.
|
// (which means Intel only right now) have a 4k granularity.
|
||||||
#define PCSX2_PAGESIZE 0x1000
|
#define PCSX2_PAGESIZE 0x1000
|
||||||
|
@ -111,11 +95,6 @@ static const int __pagesize = PCSX2_PAGESIZE;
|
||||||
// with #ifdef _MSC_VER/#pragma pack() directives (ugly).
|
// with #ifdef _MSC_VER/#pragma pack() directives (ugly).
|
||||||
#define __packed
|
#define __packed
|
||||||
|
|
||||||
#define __aligned(alig) __declspec(align(alig))
|
|
||||||
#define __aligned16 __declspec(align(16))
|
|
||||||
#define __aligned32 __declspec(align(32))
|
|
||||||
#define __pagealigned __declspec(align(PCSX2_PAGESIZE))
|
|
||||||
|
|
||||||
#define __noinline __declspec(noinline)
|
#define __noinline __declspec(noinline)
|
||||||
#define __noreturn __declspec(noreturn)
|
#define __noreturn __declspec(noreturn)
|
||||||
|
|
||||||
|
@ -134,12 +113,6 @@ static const int __pagesize = PCSX2_PAGESIZE;
|
||||||
#ifndef __packed
|
#ifndef __packed
|
||||||
#define __packed __attribute__((packed))
|
#define __packed __attribute__((packed))
|
||||||
#endif
|
#endif
|
||||||
#ifndef __aligned
|
|
||||||
#define __aligned(alig) __attribute__((aligned(alig)))
|
|
||||||
#endif
|
|
||||||
#define __aligned16 __attribute__((aligned(16)))
|
|
||||||
#define __aligned32 __attribute__((aligned(32)))
|
|
||||||
#define __pagealigned __attribute__((aligned(PCSX2_PAGESIZE)))
|
|
||||||
|
|
||||||
#define __assume(cond) do { if (!(cond)) __builtin_unreachable(); } while(0)
|
#define __assume(cond) do { if (!(cond)) __builtin_unreachable(); } while(0)
|
||||||
#define CALLBACK __attribute__((stdcall))
|
#define CALLBACK __attribute__((stdcall))
|
||||||
|
|
|
@ -23,7 +23,7 @@
|
||||||
|
|
||||||
#pragma comment(lib, "User32.lib")
|
#pragma comment(lib, "User32.lib")
|
||||||
|
|
||||||
static __aligned16 LARGE_INTEGER lfreq;
|
alignas(16) static LARGE_INTEGER lfreq;
|
||||||
|
|
||||||
void InitCPUTicks()
|
void InitCPUTicks()
|
||||||
{
|
{
|
||||||
|
|
|
@ -44,7 +44,7 @@ static __inline__ __attribute__((always_inline)) void cpuid(int CPUInfo[], const
|
||||||
|
|
||||||
using namespace x86Emitter;
|
using namespace x86Emitter;
|
||||||
|
|
||||||
__aligned16 x86capabilities x86caps;
|
alignas(16) x86capabilities x86caps;
|
||||||
|
|
||||||
x86capabilities::x86capabilities()
|
x86capabilities::x86capabilities()
|
||||||
: isIdentified(false)
|
: isIdentified(false)
|
||||||
|
@ -87,7 +87,7 @@ void x86capabilities::SIMD_EstablishMXCSRmask()
|
||||||
MXCSR_Mask.bitmask = 0xFFFF; // SSE2 features added
|
MXCSR_Mask.bitmask = 0xFFFF; // SSE2 features added
|
||||||
}
|
}
|
||||||
|
|
||||||
__aligned16 u8 targetFXSAVE[512];
|
alignas(16) u8 targetFXSAVE[512];
|
||||||
|
|
||||||
// Work for recent enough GCC/CLANG/MSVC 2012
|
// Work for recent enough GCC/CLANG/MSVC 2012
|
||||||
_fxsave(&targetFXSAVE);
|
_fxsave(&targetFXSAVE);
|
||||||
|
|
|
@ -209,4 +209,4 @@ union SSE_MXCSR
|
||||||
extern SSE_MXCSR MXCSR_Mask;
|
extern SSE_MXCSR MXCSR_Mask;
|
||||||
|
|
||||||
|
|
||||||
extern __aligned16 x86capabilities x86caps;
|
alignas(16) extern x86capabilities x86caps;
|
||||||
|
|
|
@ -1186,7 +1186,7 @@ const xRegister32
|
||||||
xWrite8(0xC8 | to->Id);
|
xWrite8(0xC8 | to->Id);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __aligned16 u64 xmm_data[iREGCNT_XMM * 2];
|
alignas(16) static u64 xmm_data[iREGCNT_XMM * 2];
|
||||||
|
|
||||||
__emitinline void xStoreReg(const xRegisterSSE& src)
|
__emitinline void xStoreReg(const xRegisterSSE& src)
|
||||||
{
|
{
|
||||||
|
|
|
@ -283,7 +283,7 @@ u64 R5900DebugInterface::read64(u32 address)
|
||||||
|
|
||||||
u128 R5900DebugInterface::read128(u32 address)
|
u128 R5900DebugInterface::read128(u32 address)
|
||||||
{
|
{
|
||||||
__aligned16 u128 result;
|
alignas(16) u128 result;
|
||||||
if (!isValidAddress(address) || address % 16)
|
if (!isValidAddress(address) || address % 16)
|
||||||
{
|
{
|
||||||
result.hi = result.lo = -1;
|
result.hi = result.lo = -1;
|
||||||
|
|
|
@ -25,7 +25,7 @@
|
||||||
using namespace Threading;
|
using namespace Threading;
|
||||||
using namespace R5900;
|
using namespace R5900;
|
||||||
|
|
||||||
__aligned16 u8 g_RealGSMem[Ps2MemSize::GSregs];
|
alignas(16) u8 g_RealGSMem[Ps2MemSize::GSregs];
|
||||||
|
|
||||||
void gsSetVideoMode(GS_VideoMode mode)
|
void gsSetVideoMode(GS_VideoMode mode)
|
||||||
{
|
{
|
||||||
|
|
|
@ -21,7 +21,7 @@
|
||||||
#include "GS/GS.h"
|
#include "GS/GS.h"
|
||||||
|
|
||||||
extern double GetVerticalFrequency();
|
extern double GetVerticalFrequency();
|
||||||
extern __aligned16 u8 g_RealGSMem[Ps2MemSize::GSregs];
|
alignas(16) extern u8 g_RealGSMem[Ps2MemSize::GSregs];
|
||||||
|
|
||||||
enum CSR_FifoState
|
enum CSR_FifoState
|
||||||
{
|
{
|
||||||
|
@ -483,7 +483,7 @@ struct MTGS_BufferedData
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned(32) MTGS_BufferedData RingBuffer;
|
alignas(32) extern MTGS_BufferedData RingBuffer;
|
||||||
|
|
||||||
// FIXME: These belong in common with other memcpy tools. Will move them there later if no one
|
// FIXME: These belong in common with other memcpy tools. Will move them there later if no one
|
||||||
// else beats me to it. --air
|
// else beats me to it. --air
|
||||||
|
|
|
@ -26,8 +26,8 @@
|
||||||
// Should be a gifstate_t rather then int, but I don't feel like possibly interfering with savestates right now.
|
// Should be a gifstate_t rather then int, but I don't feel like possibly interfering with savestates right now.
|
||||||
|
|
||||||
|
|
||||||
__aligned16 GIF_Fifo gif_fifo;
|
alignas(16) GIF_Fifo gif_fifo;
|
||||||
__aligned16 gifStruct gif;
|
alignas(16) gifStruct gif;
|
||||||
|
|
||||||
static __fi void GifDMAInt(int cycles)
|
static __fi void GifDMAInt(int cycles)
|
||||||
{
|
{
|
||||||
|
|
|
@ -75,7 +75,7 @@ struct gifStruct {
|
||||||
bool gifmfifoirq;
|
bool gifmfifoirq;
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned16 gifStruct gif;
|
alignas(16) extern gifStruct gif;
|
||||||
|
|
||||||
struct GIF_Fifo
|
struct GIF_Fifo
|
||||||
{
|
{
|
||||||
|
|
|
@ -27,9 +27,9 @@
|
||||||
#include "common/MemsetFast.inl"
|
#include "common/MemsetFast.inl"
|
||||||
|
|
||||||
// the BP doesn't advance and returns -1 if there is no data to be read
|
// the BP doesn't advance and returns -1 if there is no data to be read
|
||||||
__aligned16 tIPU_cmd ipu_cmd;
|
alignas(16) tIPU_cmd ipu_cmd;
|
||||||
__aligned16 tIPU_BP g_BP;
|
alignas(16) tIPU_BP g_BP;
|
||||||
__aligned16 decoder_t decoder;
|
alignas(16) decoder_t decoder;
|
||||||
|
|
||||||
void IPUWorker();
|
void IPUWorker();
|
||||||
|
|
||||||
|
|
|
@ -74,8 +74,8 @@ union tIPU_CTRL {
|
||||||
void reset() { _u32 = 0; }
|
void reset() { _u32 = 0; }
|
||||||
};
|
};
|
||||||
|
|
||||||
struct __aligned16 tIPU_BP {
|
struct alignas(16) tIPU_BP {
|
||||||
__aligned16 u128 internal_qwc[2];
|
alignas(16) u128 internal_qwc[2];
|
||||||
|
|
||||||
u32 BP; // Bit stream point (0 to 128*2)
|
u32 BP; // Bit stream point (0 to 128*2)
|
||||||
u32 IFC; // Input FIFO counter (8QWC) (0 to 8)
|
u32 IFC; // Input FIFO counter (8QWC) (0 to 8)
|
||||||
|
@ -283,7 +283,7 @@ union tIPU_cmd
|
||||||
|
|
||||||
static IPUregisters& ipuRegs = (IPUregisters&)eeHw[0x2000];
|
static IPUregisters& ipuRegs = (IPUregisters&)eeHw[0x2000];
|
||||||
|
|
||||||
extern __aligned16 tIPU_cmd ipu_cmd;
|
alignas(16) extern tIPU_cmd ipu_cmd;
|
||||||
extern int coded_block_pattern;
|
extern int coded_block_pattern;
|
||||||
|
|
||||||
extern void ipuReset();
|
extern void ipuReset();
|
||||||
|
|
|
@ -19,7 +19,7 @@
|
||||||
#include "IPU/IPUdma.h"
|
#include "IPU/IPUdma.h"
|
||||||
#include "mpeg2lib/Mpeg.h"
|
#include "mpeg2lib/Mpeg.h"
|
||||||
|
|
||||||
__aligned16 IPU_Fifo ipu_fifo;
|
alignas(16) IPU_Fifo ipu_fifo;
|
||||||
|
|
||||||
void IPU_Fifo::init()
|
void IPU_Fifo::init()
|
||||||
{
|
{
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
|
|
||||||
struct IPU_Fifo_Input
|
struct IPU_Fifo_Input
|
||||||
{
|
{
|
||||||
__aligned16 u32 data[32];
|
alignas(16) u32 data[32];
|
||||||
int readpos, writepos;
|
int readpos, writepos;
|
||||||
|
|
||||||
int write(u32* pMem, int size);
|
int write(u32* pMem, int size);
|
||||||
|
@ -33,7 +33,7 @@ struct IPU_Fifo_Input
|
||||||
|
|
||||||
struct IPU_Fifo_Output
|
struct IPU_Fifo_Output
|
||||||
{
|
{
|
||||||
__aligned16 u32 data[32];
|
alignas(16) u32 data[32];
|
||||||
int readpos, writepos;
|
int readpos, writepos;
|
||||||
|
|
||||||
// returns number of qw read
|
// returns number of qw read
|
||||||
|
@ -45,13 +45,13 @@ struct IPU_Fifo_Output
|
||||||
|
|
||||||
struct IPU_Fifo
|
struct IPU_Fifo
|
||||||
{
|
{
|
||||||
__aligned16 IPU_Fifo_Input in;
|
alignas(16) IPU_Fifo_Input in;
|
||||||
__aligned16 IPU_Fifo_Output out;
|
alignas(16) IPU_Fifo_Output out;
|
||||||
|
|
||||||
void init();
|
void init();
|
||||||
void clear();
|
void clear();
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned16 IPU_Fifo ipu_fifo;
|
alignas(16) extern IPU_Fifo ipu_fifo;
|
||||||
|
|
||||||
#endif // IPU_FIFO_H_INCLUDED
|
#endif // IPU_FIFO_H_INCLUDED
|
||||||
|
|
|
@ -45,7 +45,7 @@
|
||||||
* to +-3826 - this is the worst case for a column IDCT where the
|
* to +-3826 - this is the worst case for a column IDCT where the
|
||||||
* column inputs are 16-bit values.
|
* column inputs are 16-bit values.
|
||||||
*/
|
*/
|
||||||
static __aligned16 u8 clip_lut[1024];
|
alignas(16) static u8 clip_lut[1024];
|
||||||
|
|
||||||
#define CLIP(i) ((clip_lut+384)[(i)])
|
#define CLIP(i) ((clip_lut+384)[(i)])
|
||||||
|
|
||||||
|
@ -248,4 +248,4 @@ mpeg2_scan_pack::mpeg2_scan_pack()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
const __aligned16 mpeg2_scan_pack mpeg2_scan;
|
alignas(16) const mpeg2_scan_pack mpeg2_scan;
|
||||||
|
|
|
@ -221,12 +221,12 @@ extern int slice (u8 * buffer);
|
||||||
#define BigEndian64(in) __builtin_bswap64(in) // or we could use the asm function bswap...
|
#define BigEndian64(in) __builtin_bswap64(in) // or we could use the asm function bswap...
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
extern __aligned16 const mpeg2_scan_pack mpeg2_scan;
|
alignas(16) extern const mpeg2_scan_pack mpeg2_scan;
|
||||||
extern const int non_linear_quantizer_scale[];
|
extern const int non_linear_quantizer_scale[];
|
||||||
|
|
||||||
// The IPU can only do one task at once and never uses other buffers so all mpeg state variables
|
// The IPU can only do one task at once and never uses other buffers so all mpeg state variables
|
||||||
// are made available to mpeg/vlc modules as globals here:
|
// are made available to mpeg/vlc modules as globals here:
|
||||||
|
|
||||||
extern __aligned16 tIPU_BP g_BP;
|
alignas(16) extern tIPU_BP g_BP;
|
||||||
extern __aligned16 decoder_t decoder;
|
alignas(16) extern decoder_t decoder;
|
||||||
|
|
||||||
|
|
|
@ -99,7 +99,7 @@ static const MBtab MB_I [] = {
|
||||||
#define MC MACROBLOCK_MOTION_FORWARD
|
#define MC MACROBLOCK_MOTION_FORWARD
|
||||||
#define CODED MACROBLOCK_PATTERN
|
#define CODED MACROBLOCK_PATTERN
|
||||||
|
|
||||||
static const __aligned16 MBtab MB_P [] = {
|
alignas(16) static const MBtab MB_P [] = {
|
||||||
{INTRA|QUANT, 6}, {CODED|QUANT, 5}, {MC|CODED|QUANT, 5}, {INTRA, 5},
|
{INTRA|QUANT, 6}, {CODED|QUANT, 5}, {MC|CODED|QUANT, 5}, {INTRA, 5},
|
||||||
{MC, 3}, {MC, 3}, {MC, 3}, {MC, 3},
|
{MC, 3}, {MC, 3}, {MC, 3}, {MC, 3},
|
||||||
{CODED, 2}, {CODED, 2}, {CODED, 2}, {CODED, 2},
|
{CODED, 2}, {CODED, 2}, {CODED, 2}, {CODED, 2},
|
||||||
|
@ -114,7 +114,7 @@ static const __aligned16 MBtab MB_P [] = {
|
||||||
#define BWD MACROBLOCK_MOTION_BACKWARD
|
#define BWD MACROBLOCK_MOTION_BACKWARD
|
||||||
#define INTER MACROBLOCK_MOTION_FORWARD|MACROBLOCK_MOTION_BACKWARD
|
#define INTER MACROBLOCK_MOTION_FORWARD|MACROBLOCK_MOTION_BACKWARD
|
||||||
|
|
||||||
static const __aligned16 MBtab MB_B [] = {
|
alignas(16) static const MBtab MB_B [] = {
|
||||||
{0, 0}, {INTRA|QUANT, 6},
|
{0, 0}, {INTRA|QUANT, 6},
|
||||||
{BWD|CODED|QUANT, 6}, {FWD|CODED|QUANT, 6},
|
{BWD|CODED|QUANT, 6}, {FWD|CODED|QUANT, 6},
|
||||||
{INTER|CODED|QUANT, 5}, {INTER|CODED|QUANT, 5},
|
{INTER|CODED|QUANT, 5}, {INTER|CODED|QUANT, 5},
|
||||||
|
@ -148,7 +148,7 @@ static const MVtab MV_4 [] = {
|
||||||
{ 3, 6}, { 2, 4}, { 1, 3}, { 1, 3}, { 0, 2}, { 0, 2}, { 0, 2}, { 0, 2}
|
{ 3, 6}, { 2, 4}, { 1, 3}, { 1, 3}, { 0, 2}, { 0, 2}, { 0, 2}, { 0, 2}
|
||||||
};
|
};
|
||||||
|
|
||||||
static const __aligned16 MVtab MV_10 [] = {
|
alignas(16) static const MVtab MV_10 [] = {
|
||||||
{ 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10},
|
{ 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10}, { 0,10},
|
||||||
{ 0,10}, { 0,10}, { 0,10}, { 0,10}, {15,10}, {14,10}, {13,10}, {12,10},
|
{ 0,10}, { 0,10}, { 0,10}, { 0,10}, {15,10}, {14,10}, {13,10}, {12,10},
|
||||||
{11,10}, {10,10}, { 9, 9}, { 9, 9}, { 8, 9}, { 8, 9}, { 7, 9}, { 7, 9},
|
{11,10}, {10,10}, { 9, 9}, { 9, 9}, { 8, 9}, { 8, 9}, { 7, 9}, { 7, 9},
|
||||||
|
@ -163,7 +163,7 @@ static const DMVtab DMV_2 [] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static const __aligned16 CBPtab CBP_7 [] = {
|
alignas(16) static const CBPtab CBP_7 [] = {
|
||||||
{0x22, 7}, {0x12, 7}, {0x0a, 7}, {0x06, 7},
|
{0x22, 7}, {0x12, 7}, {0x0a, 7}, {0x06, 7},
|
||||||
{0x21, 7}, {0x11, 7}, {0x09, 7}, {0x05, 7},
|
{0x21, 7}, {0x11, 7}, {0x09, 7}, {0x05, 7},
|
||||||
{0x3f, 6}, {0x3f, 6}, {0x03, 6}, {0x03, 6},
|
{0x3f, 6}, {0x3f, 6}, {0x03, 6}, {0x03, 6},
|
||||||
|
@ -194,7 +194,7 @@ static const __aligned16 CBPtab CBP_7 [] = {
|
||||||
{0x3c, 3}, {0x3c, 3}, {0x3c, 3}, {0x3c, 3}
|
{0x3c, 3}, {0x3c, 3}, {0x3c, 3}, {0x3c, 3}
|
||||||
};
|
};
|
||||||
|
|
||||||
static const __aligned16 CBPtab CBP_9 [] = {
|
alignas(16) static const CBPtab CBP_9 [] = {
|
||||||
{0, 0}, {0x00, 9}, {0x27, 9}, {0x1b, 9},
|
{0, 0}, {0x00, 9}, {0x27, 9}, {0x1b, 9},
|
||||||
{0x3b, 9}, {0x37, 9}, {0x2f, 9}, {0x1f, 9},
|
{0x3b, 9}, {0x37, 9}, {0x2f, 9}, {0x1f, 9},
|
||||||
{0x3a, 8}, {0x3a, 8}, {0x36, 8}, {0x36, 8},
|
{0x3a, 8}, {0x3a, 8}, {0x36, 8}, {0x36, 8},
|
||||||
|
@ -391,7 +391,7 @@ struct MBAtabSet
|
||||||
MBAtab mba5[30];
|
MBAtab mba5[30];
|
||||||
MBAtab mba11[26*4];
|
MBAtab mba11[26*4];
|
||||||
};
|
};
|
||||||
static const __aligned16 MBAtabSet MBA = {
|
alignas(16) static const MBAtabSet MBA = {
|
||||||
{ // mba5
|
{ // mba5
|
||||||
{6, 5}, {5, 5}, {4, 4}, {4, 4}, {3, 4}, {3, 4},
|
{6, 5}, {5, 5}, {4, 4}, {4, 4}, {3, 4}, {3, 4},
|
||||||
{2, 3}, {2, 3}, {2, 3}, {2, 3}, {1, 3}, {1, 3}, {1, 3}, {1, 3},
|
{2, 3}, {2, 3}, {2, 3}, {2, 3}, {1, 3}, {1, 3}, {1, 3}, {1, 3},
|
||||||
|
@ -465,7 +465,7 @@ struct DCtabSet
|
||||||
DCtab chrom1[32]; // Table B-13, dct_dc_size_chrominance, codes 111110xxxx ... 1111111111
|
DCtab chrom1[32]; // Table B-13, dct_dc_size_chrominance, codes 111110xxxx ... 1111111111
|
||||||
};
|
};
|
||||||
|
|
||||||
static const __aligned16 DCtabSet DCtable =
|
alignas(16) static const DCtabSet DCtable =
|
||||||
{
|
{
|
||||||
// lum0: Table B-12, dct_dc_size_luminance, codes 00xxx ... 11110 */
|
// lum0: Table B-12, dct_dc_size_luminance, codes 00xxx ... 11110 */
|
||||||
{ {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2},
|
{ {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 2},
|
||||||
|
@ -507,7 +507,7 @@ struct DCTtabSet
|
||||||
DCTtab tab6[16];
|
DCTtab tab6[16];
|
||||||
};
|
};
|
||||||
|
|
||||||
static const __aligned16 DCTtabSet DCT =
|
alignas(16) static const DCTtabSet DCT =
|
||||||
{
|
{
|
||||||
/* first[12]: Table B-14, DCT coefficients table zero,
|
/* first[12]: Table B-14, DCT coefficients table zero,
|
||||||
* codes 0100 ... 1xxx (used for first (DC) coefficient)
|
* codes 0100 ... 1xxx (used for first (DC) coefficient)
|
||||||
|
|
|
@ -25,7 +25,7 @@ const uptr *psxMemRLUT = NULL;
|
||||||
|
|
||||||
IopVM_MemoryAllocMess* iopMem = NULL;
|
IopVM_MemoryAllocMess* iopMem = NULL;
|
||||||
|
|
||||||
__pagealigned u8 iopHw[Ps2MemSize::IopHardware];
|
alignas(__pagesize) u8 iopHw[Ps2MemSize::IopHardware];
|
||||||
|
|
||||||
// --------------------------------------------------------------------------------------
|
// --------------------------------------------------------------------------------------
|
||||||
// iopMemoryReserve
|
// iopMemoryReserve
|
||||||
|
|
|
@ -46,7 +46,7 @@ using namespace Threading;
|
||||||
// MTGS Threaded Class Implementation
|
// MTGS Threaded Class Implementation
|
||||||
// =====================================================================================================
|
// =====================================================================================================
|
||||||
|
|
||||||
__aligned(32) MTGS_BufferedData RingBuffer;
|
alignas(32) MTGS_BufferedData RingBuffer;
|
||||||
extern bool renderswitch;
|
extern bool renderswitch;
|
||||||
std::atomic_bool init_gspanel = true;
|
std::atomic_bool init_gspanel = true;
|
||||||
|
|
||||||
|
|
|
@ -19,7 +19,7 @@
|
||||||
#include "newVif.h"
|
#include "newVif.h"
|
||||||
#include "Gif_Unit.h"
|
#include "Gif_Unit.h"
|
||||||
|
|
||||||
__aligned16 VU_Thread vu1Thread(CpuVU1, VU1);
|
VU_Thread vu1Thread(CpuVU1, VU1);
|
||||||
|
|
||||||
#define MTVU_ALWAYS_KICK 0
|
#define MTVU_ALWAYS_KICK 0
|
||||||
#define MTVU_SYNC_MODE 0
|
#define MTVU_SYNC_MODE 0
|
||||||
|
|
14
pcsx2/MTVU.h
14
pcsx2/MTVU.h
|
@ -31,10 +31,10 @@ class VU_Thread : public pxThread {
|
||||||
|
|
||||||
u32 buffer[buffer_size];
|
u32 buffer[buffer_size];
|
||||||
// Note: keep atomic on separate cache line to avoid CPU conflict
|
// Note: keep atomic on separate cache line to avoid CPU conflict
|
||||||
__aligned(64) std::atomic<bool> isBusy; // Is thread processing data?
|
alignas(64) std::atomic<bool> isBusy; // Is thread processing data?
|
||||||
__aligned(64) std::atomic<int> m_ato_read_pos; // Only modified by VU thread
|
alignas(64) std::atomic<int> m_ato_read_pos; // Only modified by VU thread
|
||||||
__aligned(64) std::atomic<int> m_ato_write_pos; // Only modified by EE thread
|
alignas(64) std::atomic<int> m_ato_write_pos; // Only modified by EE thread
|
||||||
__aligned(64) int m_read_pos; // temporary read pos (local to the VU thread)
|
alignas(64) int m_read_pos; // temporary read pos (local to the VU thread)
|
||||||
int m_write_pos; // temporary write pos (local to the EE thread)
|
int m_write_pos; // temporary write pos (local to the EE thread)
|
||||||
Mutex mtxBusy;
|
Mutex mtxBusy;
|
||||||
Semaphore semaEvent;
|
Semaphore semaEvent;
|
||||||
|
@ -42,8 +42,8 @@ class VU_Thread : public pxThread {
|
||||||
VURegs& vuRegs;
|
VURegs& vuRegs;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
__aligned16 vifStruct vif;
|
alignas(16) vifStruct vif;
|
||||||
__aligned16 VIFregisters vifRegs;
|
alignas(16) VIFregisters vifRegs;
|
||||||
Semaphore semaXGkick;
|
Semaphore semaXGkick;
|
||||||
std::atomic<unsigned int> vuCycles[4]; // Used for VU cycle stealing hack
|
std::atomic<unsigned int> vuCycles[4]; // Used for VU cycle stealing hack
|
||||||
u32 vuCycleIdx; // Used for VU cycle stealing hack
|
u32 vuCycleIdx; // Used for VU cycle stealing hack
|
||||||
|
@ -122,4 +122,4 @@ private:
|
||||||
u32 Get_vuCycles();
|
u32 Get_vuCycles();
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned16 VU_Thread vu1Thread;
|
extern VU_Thread vu1Thread;
|
||||||
|
|
|
@ -672,7 +672,7 @@ public:
|
||||||
static mmap_PageFaultHandler* mmap_faultHandler = NULL;
|
static mmap_PageFaultHandler* mmap_faultHandler = NULL;
|
||||||
|
|
||||||
EEVM_MemoryAllocMess* eeMem = NULL;
|
EEVM_MemoryAllocMess* eeMem = NULL;
|
||||||
__pagealigned u8 eeHw[Ps2MemSize::Hardware];
|
alignas(__pagesize) u8 eeHw[Ps2MemSize::Hardware];
|
||||||
|
|
||||||
|
|
||||||
void memBindConditionalHandlers()
|
void memBindConditionalHandlers()
|
||||||
|
@ -904,7 +904,7 @@ struct vtlb_PageProtectionInfo
|
||||||
vtlb_ProtectionMode Mode;
|
vtlb_ProtectionMode Mode;
|
||||||
};
|
};
|
||||||
|
|
||||||
static __aligned16 vtlb_PageProtectionInfo m_PageProtectInfo[Ps2MemSize::MainRam >> 12];
|
alignas(16) static vtlb_PageProtectionInfo m_PageProtectInfo[Ps2MemSize::MainRam >> 12];
|
||||||
|
|
||||||
|
|
||||||
// returns:
|
// returns:
|
||||||
|
|
|
@ -115,8 +115,8 @@ struct IopVM_MemoryAllocMess
|
||||||
// order to allow for simpler macros and reference handles to be defined (we can safely use
|
// order to allow for simpler macros and reference handles to be defined (we can safely use
|
||||||
// compile-time references to registers instead of having to use instance variables).
|
// compile-time references to registers instead of having to use instance variables).
|
||||||
|
|
||||||
extern __pagealigned u8 eeHw[Ps2MemSize::Hardware];
|
alignas(__pagesize) extern u8 eeHw[Ps2MemSize::Hardware];
|
||||||
extern __pagealigned u8 iopHw[Ps2MemSize::IopHardware];
|
alignas(__pagesize) extern u8 iopHw[Ps2MemSize::IopHardware];
|
||||||
|
|
||||||
|
|
||||||
extern EEVM_MemoryAllocMess* eeMem;
|
extern EEVM_MemoryAllocMess* eeMem;
|
||||||
|
|
|
@ -52,7 +52,7 @@ bool iopEventAction = false;
|
||||||
|
|
||||||
bool iopEventTestIsActive = false;
|
bool iopEventTestIsActive = false;
|
||||||
|
|
||||||
__aligned16 psxRegisters psxRegs;
|
alignas(16) psxRegisters psxRegs;
|
||||||
|
|
||||||
void psxReset()
|
void psxReset()
|
||||||
{
|
{
|
||||||
|
|
|
@ -115,7 +115,7 @@ struct psxRegisters {
|
||||||
//u32 _smflag[32];
|
//u32 _smflag[32];
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned16 psxRegisters psxRegs;
|
alignas(16) extern psxRegisters psxRegs;
|
||||||
|
|
||||||
extern u32 g_iopNextEventCycle;
|
extern u32 g_iopNextEventCycle;
|
||||||
extern s32 iopBreak; // used when the IOP execution is broken and control returned to the EE
|
extern s32 iopBreak; // used when the IOP execution is broken and control returned to the EE
|
||||||
|
|
|
@ -45,9 +45,9 @@ using namespace R5900; // for R5900 disasm tools
|
||||||
s32 EEsCycle; // used to sync the IOP to the EE
|
s32 EEsCycle; // used to sync the IOP to the EE
|
||||||
u32 EEoCycle;
|
u32 EEoCycle;
|
||||||
|
|
||||||
__aligned16 cpuRegisters cpuRegs;
|
alignas(16) cpuRegisters cpuRegs;
|
||||||
__aligned16 fpuRegisters fpuRegs;
|
alignas(16) fpuRegisters fpuRegs;
|
||||||
__aligned16 tlbs tlb[48];
|
alignas(16) tlbs tlb[48];
|
||||||
R5900cpu *Cpu = NULL;
|
R5900cpu *Cpu = NULL;
|
||||||
|
|
||||||
bool g_SkipBiosHack; // set at boot if the skip bios hack is on, reset before the game has started
|
bool g_SkipBiosHack; // set at boot if the skip bios hack is on, reset before the game has started
|
||||||
|
|
|
@ -253,9 +253,9 @@ struct tlbs
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
extern __aligned16 cpuRegisters cpuRegs;
|
alignas(16) extern cpuRegisters cpuRegs;
|
||||||
extern __aligned16 fpuRegisters fpuRegs;
|
alignas(16) extern fpuRegisters fpuRegs;
|
||||||
extern __aligned16 tlbs tlb[48];
|
alignas(16) extern tlbs tlb[48];
|
||||||
|
|
||||||
extern u32 g_nextEventCycle;
|
extern u32 g_nextEventCycle;
|
||||||
extern bool eeEventTestIsActive;
|
extern bool eeEventTestIsActive;
|
||||||
|
|
|
@ -650,7 +650,7 @@ void LWR()
|
||||||
|
|
||||||
// dummy variable used as a destination address for writes to the zero register, so
|
// dummy variable used as a destination address for writes to the zero register, so
|
||||||
// that the zero register always stays zero.
|
// that the zero register always stays zero.
|
||||||
static __aligned16 GPR_reg m_dummy_gpr_zero;
|
alignas(16) static GPR_reg m_dummy_gpr_zero;
|
||||||
|
|
||||||
// Returns the x86 address of the requested GPR, which is safe for writing. (includes
|
// Returns the x86 address of the requested GPR, which is safe for writing. (includes
|
||||||
// special handling for returning a dummy var for GPR0(zero), so that it's value is
|
// special handling for returning a dummy var for GPR0(zero), so that it's value is
|
||||||
|
|
|
@ -108,8 +108,8 @@ int FindOutputModuleById(const wchar_t* omodid)
|
||||||
|
|
||||||
StereoOut32* SndBuffer::m_buffer;
|
StereoOut32* SndBuffer::m_buffer;
|
||||||
s32 SndBuffer::m_size;
|
s32 SndBuffer::m_size;
|
||||||
__aligned(4) volatile s32 SndBuffer::m_rpos;
|
alignas(4) volatile s32 SndBuffer::m_rpos;
|
||||||
__aligned(4) volatile s32 SndBuffer::m_wpos;
|
alignas(4) volatile s32 SndBuffer::m_wpos;
|
||||||
|
|
||||||
bool SndBuffer::m_underrun_freeze;
|
bool SndBuffer::m_underrun_freeze;
|
||||||
StereoOut32* SndBuffer::sndTempBuffer = nullptr;
|
StereoOut32* SndBuffer::sndTempBuffer = nullptr;
|
||||||
|
|
|
@ -578,8 +578,8 @@ private:
|
||||||
static StereoOut32* m_buffer;
|
static StereoOut32* m_buffer;
|
||||||
static s32 m_size;
|
static s32 m_size;
|
||||||
|
|
||||||
static __aligned(4) volatile s32 m_rpos;
|
alignas(4) static volatile s32 m_rpos;
|
||||||
static __aligned(4) volatile s32 m_wpos;
|
alignas(4) static volatile s32 m_wpos;
|
||||||
|
|
||||||
static float lastEmergencyAdj;
|
static float lastEmergencyAdj;
|
||||||
static float cTempo;
|
static float cTempo;
|
||||||
|
|
|
@ -90,7 +90,7 @@ static __fi bool WriteIOPtoFifo()
|
||||||
// Read Fifo into an ee tag, transfer it to sif0ch, and process it.
|
// Read Fifo into an ee tag, transfer it to sif0ch, and process it.
|
||||||
static __fi bool ProcessEETag()
|
static __fi bool ProcessEETag()
|
||||||
{
|
{
|
||||||
static __aligned16 u32 tag[4];
|
alignas(16) static u32 tag[4];
|
||||||
tDMA_TAG& ptag(*(tDMA_TAG*)tag);
|
tDMA_TAG& ptag(*(tDMA_TAG*)tag);
|
||||||
|
|
||||||
sif0.fifo.read((u32*)&tag[0], 2); // Tag
|
sif0.fifo.read((u32*)&tag[0], 2); // Tag
|
||||||
|
|
10
pcsx2/VU.h
10
pcsx2/VU.h
|
@ -127,7 +127,7 @@ struct ialuPipe
|
||||||
u32 Cycle;
|
u32 Cycle;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct __aligned16 VURegs
|
struct alignas(16) VURegs
|
||||||
{
|
{
|
||||||
VECTOR VF[32]; // VF and VI need to be first in this struct for proper mapping
|
VECTOR VF[32]; // VF and VI need to be first in this struct for proper mapping
|
||||||
REG_VI VI[32]; // needs to be 128bit x 32 (cottonvibes)
|
REG_VI VI[32]; // needs to be 128bit x 32 (cottonvibes)
|
||||||
|
@ -159,9 +159,9 @@ struct __aligned16 VURegs
|
||||||
u32 pending_p;
|
u32 pending_p;
|
||||||
u32 blockhasmbit;
|
u32 blockhasmbit;
|
||||||
|
|
||||||
__aligned16 u32 micro_macflags[4];
|
alignas(16) u32 micro_macflags[4];
|
||||||
__aligned16 u32 micro_clipflags[4];
|
alignas(16) u32 micro_clipflags[4];
|
||||||
__aligned16 u32 micro_statusflags[4];
|
alignas(16) u32 micro_statusflags[4];
|
||||||
// MAC/Status flags -- these are used by interpreters but are kind of hacky
|
// MAC/Status flags -- these are used by interpreters but are kind of hacky
|
||||||
// and shouldn't be relied on for any useful/valid info. Would like to move them out of
|
// and shouldn't be relied on for any useful/valid info. Would like to move them out of
|
||||||
// this struct eventually.
|
// this struct eventually.
|
||||||
|
@ -223,7 +223,7 @@ enum VUPipeState
|
||||||
VUPIPE_XGKICK
|
VUPIPE_XGKICK
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned16 VURegs vuRegs[2];
|
extern VURegs vuRegs[2];
|
||||||
|
|
||||||
// Obsolete(?) -- I think I'd rather use vu0Regs/vu1Regs or actually have these explicit to any
|
// Obsolete(?) -- I think I'd rather use vu0Regs/vu1Regs or actually have these explicit to any
|
||||||
// CPP file that needs them only. --air
|
// CPP file that needs them only. --air
|
||||||
|
|
|
@ -19,7 +19,7 @@
|
||||||
#include "VUmicro.h"
|
#include "VUmicro.h"
|
||||||
#include "MTVU.h"
|
#include "MTVU.h"
|
||||||
|
|
||||||
__aligned16 VURegs vuRegs[2];
|
alignas(16) VURegs vuRegs[2];
|
||||||
|
|
||||||
vuMemoryReserve::vuMemoryReserve()
|
vuMemoryReserve::vuMemoryReserve()
|
||||||
: _parent( L"VU0/1 on-chip memory", VU1_PROGSIZE + VU1_MEMSIZE + VU0_PROGSIZE + VU0_MEMSIZE )
|
: _parent( L"VU0/1 on-chip memory", VU1_PROGSIZE + VU1_MEMSIZE + VU0_PROGSIZE + VU0_MEMSIZE )
|
||||||
|
|
|
@ -45,7 +45,7 @@ u32 laststall = 0;
|
||||||
|
|
||||||
#define VI_BACKUP
|
#define VI_BACKUP
|
||||||
|
|
||||||
static __aligned16 VECTOR RDzero;
|
alignas(16) static VECTOR RDzero;
|
||||||
|
|
||||||
static __ri bool _vuFMACflush(VURegs* VU)
|
static __ri bool _vuFMACflush(VURegs* VU)
|
||||||
{
|
{
|
||||||
|
@ -4403,7 +4403,7 @@ static void __vuRegsCall VU1regsunknown(_VURegsNum* VUregsn)
|
||||||
// --------------------------------------------------------------------------------------
|
// --------------------------------------------------------------------------------------
|
||||||
|
|
||||||
#define _vuTablesMess(PREFIX, FNTYPE) \
|
#define _vuTablesMess(PREFIX, FNTYPE) \
|
||||||
static __aligned16 const FNTYPE PREFIX##LowerOP_T3_00_OPCODE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##LowerOP_T3_00_OPCODE[32] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
|
@ -4414,7 +4414,7 @@ static void __vuRegsCall VU1regsunknown(_VURegsNum* VUregsn)
|
||||||
PREFIX##MI_ESADD , PREFIX##MI_EATANxy, PREFIX##MI_ESQRT, PREFIX##MI_ESIN, \
|
PREFIX##MI_ESADD , PREFIX##MI_EATANxy, PREFIX##MI_ESQRT, PREFIX##MI_ESIN, \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##LowerOP_T3_01_OPCODE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##LowerOP_T3_01_OPCODE[32] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
|
@ -4425,7 +4425,7 @@ static void __vuRegsCall VU1regsunknown(_VURegsNum* VUregsn)
|
||||||
PREFIX##MI_ERSADD, PREFIX##MI_EATANxz, PREFIX##MI_ERSQRT, PREFIX##MI_EATAN, \
|
PREFIX##MI_ERSADD, PREFIX##MI_EATANxz, PREFIX##MI_ERSQRT, PREFIX##MI_EATAN, \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##LowerOP_T3_10_OPCODE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##LowerOP_T3_10_OPCODE[32] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
|
@ -4436,7 +4436,7 @@ static void __vuRegsCall VU1regsunknown(_VURegsNum* VUregsn)
|
||||||
PREFIX##MI_ELENG , PREFIX##MI_ESUM , PREFIX##MI_ERCPR, PREFIX##MI_EEXP, \
|
PREFIX##MI_ELENG , PREFIX##MI_ESUM , PREFIX##MI_ERCPR, PREFIX##MI_EEXP, \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##LowerOP_T3_11_OPCODE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##LowerOP_T3_11_OPCODE[32] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
|
@ -4447,7 +4447,7 @@ static void __vuRegsCall VU1regsunknown(_VURegsNum* VUregsn)
|
||||||
PREFIX##MI_ERLENG, PREFIX##unknown , PREFIX##MI_WAITP, PREFIX##unknown, \
|
PREFIX##MI_ERLENG, PREFIX##unknown , PREFIX##MI_WAITP, PREFIX##unknown, \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##LowerOP_OPCODE[64] = { \
|
alignas(16) static const FNTYPE PREFIX##LowerOP_OPCODE[64] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
|
@ -4466,7 +4466,7 @@ static void __vuRegsCall VU1regsunknown(_VURegsNum* VUregsn)
|
||||||
PREFIX##LowerOP_T3_00, PREFIX##LowerOP_T3_01, PREFIX##LowerOP_T3_10, PREFIX##LowerOP_T3_11, \
|
PREFIX##LowerOP_T3_00, PREFIX##LowerOP_T3_01, PREFIX##LowerOP_T3_10, PREFIX##LowerOP_T3_11, \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
__aligned16 const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
alignas(16) const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
||||||
PREFIX##MI_LQ , PREFIX##MI_SQ , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##MI_LQ , PREFIX##MI_SQ , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##MI_ILW , PREFIX##MI_ISW , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##MI_ILW , PREFIX##MI_ISW , PREFIX##unknown , PREFIX##unknown, \
|
||||||
PREFIX##MI_IADDIU, PREFIX##MI_ISUBIU, PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##MI_IADDIU, PREFIX##MI_ISUBIU, PREFIX##unknown , PREFIX##unknown, \
|
||||||
|
@ -4501,7 +4501,7 @@ __aligned16 const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##_UPPER_FD_00_TABLE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##_UPPER_FD_00_TABLE[32] = { \
|
||||||
PREFIX##MI_ADDAx, PREFIX##MI_SUBAx , PREFIX##MI_MADDAx, PREFIX##MI_MSUBAx, \
|
PREFIX##MI_ADDAx, PREFIX##MI_SUBAx , PREFIX##MI_MADDAx, PREFIX##MI_MSUBAx, \
|
||||||
PREFIX##MI_ITOF0, PREFIX##MI_FTOI0, PREFIX##MI_MULAx , PREFIX##MI_MULAq , \
|
PREFIX##MI_ITOF0, PREFIX##MI_FTOI0, PREFIX##MI_MULAx , PREFIX##MI_MULAq , \
|
||||||
PREFIX##MI_ADDAq, PREFIX##MI_SUBAq, PREFIX##MI_ADDA , PREFIX##MI_SUBA , \
|
PREFIX##MI_ADDAq, PREFIX##MI_SUBAq, PREFIX##MI_ADDA , PREFIX##MI_SUBA , \
|
||||||
|
@ -4512,7 +4512,7 @@ __aligned16 const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##_UPPER_FD_01_TABLE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##_UPPER_FD_01_TABLE[32] = { \
|
||||||
PREFIX##MI_ADDAy , PREFIX##MI_SUBAy , PREFIX##MI_MADDAy, PREFIX##MI_MSUBAy, \
|
PREFIX##MI_ADDAy , PREFIX##MI_SUBAy , PREFIX##MI_MADDAy, PREFIX##MI_MSUBAy, \
|
||||||
PREFIX##MI_ITOF4 , PREFIX##MI_FTOI4 , PREFIX##MI_MULAy , PREFIX##MI_ABS , \
|
PREFIX##MI_ITOF4 , PREFIX##MI_FTOI4 , PREFIX##MI_MULAy , PREFIX##MI_ABS , \
|
||||||
PREFIX##MI_MADDAq, PREFIX##MI_MSUBAq, PREFIX##MI_MADDA , PREFIX##MI_MSUBA , \
|
PREFIX##MI_MADDAq, PREFIX##MI_MSUBAq, PREFIX##MI_MADDA , PREFIX##MI_MSUBA , \
|
||||||
|
@ -4523,7 +4523,7 @@ __aligned16 const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##_UPPER_FD_10_TABLE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##_UPPER_FD_10_TABLE[32] = { \
|
||||||
PREFIX##MI_ADDAz , PREFIX##MI_SUBAz , PREFIX##MI_MADDAz, PREFIX##MI_MSUBAz, \
|
PREFIX##MI_ADDAz , PREFIX##MI_SUBAz , PREFIX##MI_MADDAz, PREFIX##MI_MSUBAz, \
|
||||||
PREFIX##MI_ITOF12, PREFIX##MI_FTOI12, PREFIX##MI_MULAz , PREFIX##MI_MULAi , \
|
PREFIX##MI_ITOF12, PREFIX##MI_FTOI12, PREFIX##MI_MULAz , PREFIX##MI_MULAi , \
|
||||||
PREFIX##MI_ADDAi, PREFIX##MI_SUBAi , PREFIX##MI_MULA , PREFIX##MI_OPMULA, \
|
PREFIX##MI_ADDAi, PREFIX##MI_SUBAi , PREFIX##MI_MULA , PREFIX##MI_OPMULA, \
|
||||||
|
@ -4534,7 +4534,7 @@ __aligned16 const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
static __aligned16 const FNTYPE PREFIX##_UPPER_FD_11_TABLE[32] = { \
|
alignas(16) static const FNTYPE PREFIX##_UPPER_FD_11_TABLE[32] = { \
|
||||||
PREFIX##MI_ADDAw , PREFIX##MI_SUBAw , PREFIX##MI_MADDAw, PREFIX##MI_MSUBAw, \
|
PREFIX##MI_ADDAw , PREFIX##MI_SUBAw , PREFIX##MI_MADDAw, PREFIX##MI_MSUBAw, \
|
||||||
PREFIX##MI_ITOF15, PREFIX##MI_FTOI15, PREFIX##MI_MULAw , PREFIX##MI_CLIP , \
|
PREFIX##MI_ITOF15, PREFIX##MI_FTOI15, PREFIX##MI_MULAw , PREFIX##MI_CLIP , \
|
||||||
PREFIX##MI_MADDAi, PREFIX##MI_MSUBAi, PREFIX##unknown , PREFIX##MI_NOP , \
|
PREFIX##MI_MADDAi, PREFIX##MI_MSUBAi, PREFIX##unknown , PREFIX##MI_NOP , \
|
||||||
|
@ -4545,7 +4545,7 @@ __aligned16 const FNTYPE PREFIX##_LOWER_OPCODE[128] = { \
|
||||||
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \
|
||||||
}; \
|
}; \
|
||||||
\
|
\
|
||||||
__aligned16 const FNTYPE PREFIX##_UPPER_OPCODE[64] = { \
|
alignas(16) const FNTYPE PREFIX##_UPPER_OPCODE[64] = { \
|
||||||
PREFIX##MI_ADDx , PREFIX##MI_ADDy , PREFIX##MI_ADDz , PREFIX##MI_ADDw, \
|
PREFIX##MI_ADDx , PREFIX##MI_ADDy , PREFIX##MI_ADDz , PREFIX##MI_ADDw, \
|
||||||
PREFIX##MI_SUBx , PREFIX##MI_SUBy , PREFIX##MI_SUBz , PREFIX##MI_SUBw, \
|
PREFIX##MI_SUBx , PREFIX##MI_SUBy , PREFIX##MI_SUBz , PREFIX##MI_SUBw, \
|
||||||
PREFIX##MI_MADDx , PREFIX##MI_MADDy , PREFIX##MI_MADDz , PREFIX##MI_MADDw, \
|
PREFIX##MI_MADDx , PREFIX##MI_MADDy , PREFIX##MI_MADDz , PREFIX##MI_MADDw, \
|
||||||
|
|
|
@ -44,15 +44,15 @@ struct _VURegsNum {
|
||||||
typedef void __vuRegsCall FnType_VuRegsN(_VURegsNum *VUregsn);
|
typedef void __vuRegsCall FnType_VuRegsN(_VURegsNum *VUregsn);
|
||||||
typedef FnType_VuRegsN* Fnptr_VuRegsN;
|
typedef FnType_VuRegsN* Fnptr_VuRegsN;
|
||||||
|
|
||||||
extern __aligned16 const Fnptr_Void VU0_LOWER_OPCODE[128];
|
alignas(16) extern const Fnptr_Void VU0_LOWER_OPCODE[128];
|
||||||
extern __aligned16 const Fnptr_Void VU0_UPPER_OPCODE[64];
|
alignas(16) extern const Fnptr_Void VU0_UPPER_OPCODE[64];
|
||||||
extern __aligned16 const Fnptr_VuRegsN VU0regs_LOWER_OPCODE[128];
|
alignas(16) extern const Fnptr_VuRegsN VU0regs_LOWER_OPCODE[128];
|
||||||
extern __aligned16 const Fnptr_VuRegsN VU0regs_UPPER_OPCODE[64];
|
alignas(16) extern const Fnptr_VuRegsN VU0regs_UPPER_OPCODE[64];
|
||||||
|
|
||||||
extern __aligned16 const Fnptr_Void VU1_LOWER_OPCODE[128];
|
alignas(16) extern const Fnptr_Void VU1_LOWER_OPCODE[128];
|
||||||
extern __aligned16 const Fnptr_Void VU1_UPPER_OPCODE[64];
|
alignas(16) extern const Fnptr_Void VU1_UPPER_OPCODE[64];
|
||||||
extern __aligned16 const Fnptr_VuRegsN VU1regs_LOWER_OPCODE[128];
|
alignas(16) extern const Fnptr_VuRegsN VU1regs_LOWER_OPCODE[128];
|
||||||
extern __aligned16 const Fnptr_VuRegsN VU1regs_UPPER_OPCODE[64];
|
alignas(16) extern const Fnptr_VuRegsN VU1regs_UPPER_OPCODE[64];
|
||||||
extern void _vuClearFMAC(VURegs * VU);
|
extern void _vuClearFMAC(VURegs * VU);
|
||||||
extern void _vuTestPipes(VURegs * VU);
|
extern void _vuTestPipes(VURegs * VU);
|
||||||
extern void _vuTestUpperStalls(VURegs * VU, _VURegsNum *VUregsn);
|
extern void _vuTestUpperStalls(VURegs * VU, _VURegsNum *VUregsn);
|
||||||
|
|
|
@ -23,7 +23,7 @@
|
||||||
#include "MTVU.h"
|
#include "MTVU.h"
|
||||||
#include "Gif_Unit.h"
|
#include "Gif_Unit.h"
|
||||||
|
|
||||||
__aligned16 vifStruct vif0, vif1;
|
alignas(16) vifStruct vif0, vif1;
|
||||||
|
|
||||||
void vif0Reset()
|
void vif0Reset()
|
||||||
{
|
{
|
||||||
|
|
|
@ -87,7 +87,7 @@ __fi void vif0SetupTransfer()
|
||||||
|
|
||||||
bool ret;
|
bool ret;
|
||||||
|
|
||||||
static __aligned16 u128 masked_tag;
|
alignas(16) static u128 masked_tag;
|
||||||
|
|
||||||
masked_tag._u64[0] = 0;
|
masked_tag._u64[0] = 0;
|
||||||
masked_tag._u64[1] = *((u64*)ptag + 1);
|
masked_tag._u64[1] = *((u64*)ptag + 1);
|
||||||
|
|
|
@ -182,7 +182,7 @@ __fi void vif1SetupTransfer()
|
||||||
|
|
||||||
bool ret;
|
bool ret;
|
||||||
|
|
||||||
static __aligned16 u128 masked_tag;
|
alignas(16) static u128 masked_tag;
|
||||||
|
|
||||||
masked_tag._u64[0] = 0;
|
masked_tag._u64[0] = 0;
|
||||||
masked_tag._u64[1] = *((u64*)ptag + 1);
|
masked_tag._u64[1] = *((u64*)ptag + 1);
|
||||||
|
|
|
@ -203,7 +203,7 @@ void mfifoVIF1transfer()
|
||||||
{
|
{
|
||||||
bool ret;
|
bool ret;
|
||||||
|
|
||||||
static __aligned16 u128 masked_tag;
|
alignas(16) static u128 masked_tag;
|
||||||
|
|
||||||
masked_tag._u64[0] = 0;
|
masked_tag._u64[0] = 0;
|
||||||
masked_tag._u64[1] = *((u64*)ptag + 1);
|
masked_tag._u64[1] = *((u64*)ptag + 1);
|
||||||
|
|
|
@ -746,7 +746,7 @@ vifOp(vifCode_Unpack)
|
||||||
// Vif0/Vif1 Code Tables
|
// Vif0/Vif1 Code Tables
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
|
|
||||||
__aligned16 FnType_VifCmdHandler* const vifCmdHandler[2][128] =
|
alignas(16) FnType_VifCmdHandler* const vifCmdHandler[2][128] =
|
||||||
{
|
{
|
||||||
{
|
{
|
||||||
vifCode_Nop<0> , vifCode_STCycl<0> , vifCode_Offset<0> , vifCode_Base<0> , vifCode_ITop<0> , vifCode_STMod<0> , vifCode_MskPath3<0>, vifCode_Mark<0>, /*0x00*/
|
vifCode_Nop<0> , vifCode_STCycl<0> , vifCode_Offset<0> , vifCode_Base<0> , vifCode_ITop<0> , vifCode_STMod<0> , vifCode_MskPath3<0>, vifCode_Mark<0>, /*0x00*/
|
||||||
|
@ -784,4 +784,4 @@ __aligned16 FnType_VifCmdHandler* const vifCmdHandler[2][128] =
|
||||||
vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1>, /*0x70*/
|
vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1>, /*0x70*/
|
||||||
vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> /*0x78*/
|
vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> /*0x78*/
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
|
@ -61,8 +61,8 @@ struct tVIF_CTRL {
|
||||||
|
|
||||||
// NOTE, if debugging vif stalls, use sega classics, spyro, gt4, and taito
|
// NOTE, if debugging vif stalls, use sega classics, spyro, gt4, and taito
|
||||||
struct vifStruct {
|
struct vifStruct {
|
||||||
__aligned16 u128 MaskRow;
|
alignas(16) u128 MaskRow;
|
||||||
__aligned16 u128 MaskCol;
|
alignas(16) u128 MaskCol;
|
||||||
|
|
||||||
struct { // These must be together for MTVU
|
struct { // These must be together for MTVU
|
||||||
vifCode tag;
|
vifCode tag;
|
||||||
|
@ -97,7 +97,7 @@ struct vifStruct {
|
||||||
bool queued_gif_wait;
|
bool queued_gif_wait;
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned16 vifStruct vif0, vif1;
|
alignas(16) extern vifStruct vif0, vif1;
|
||||||
|
|
||||||
_vifT extern u32 vifRead32(u32 mem);
|
_vifT extern u32 vifRead32(u32 mem);
|
||||||
_vifT extern bool vifWrite32(u32 mem, u32 value);
|
_vifT extern bool vifWrite32(u32 mem, u32 value);
|
||||||
|
@ -112,7 +112,7 @@ extern void vif1Reset();
|
||||||
typedef int __fastcall FnType_VifCmdHandler(int pass, const u32 *data);
|
typedef int __fastcall FnType_VifCmdHandler(int pass, const u32 *data);
|
||||||
typedef FnType_VifCmdHandler* Fnptr_VifCmdHandler;
|
typedef FnType_VifCmdHandler* Fnptr_VifCmdHandler;
|
||||||
|
|
||||||
extern const __aligned16 Fnptr_VifCmdHandler vifCmdHandler[2][128];
|
alignas(16) extern const Fnptr_VifCmdHandler vifCmdHandler[2][128];
|
||||||
|
|
||||||
__fi static int _limit(int a, int max)
|
__fi static int _limit(int a, int max)
|
||||||
{
|
{
|
||||||
|
@ -136,4 +136,4 @@ extern u32 g_vif1Cycles;
|
||||||
extern void vif0FLUSH();
|
extern void vif0FLUSH();
|
||||||
extern void vif1FLUSH();
|
extern void vif1FLUSH();
|
||||||
|
|
||||||
extern void vifExecQueue(int idx);
|
extern void vifExecQueue(int idx);
|
||||||
|
|
|
@ -166,7 +166,7 @@ static void __fastcall UNPACK_V4_5(u32 *dest, const u32* src)
|
||||||
UnpackFuncSet( V4, idx, mode, u, 1 ), NULL, \
|
UnpackFuncSet( V4, idx, mode, u, 1 ), NULL, \
|
||||||
UnpackFuncSet( V4, idx, mode, u, 1 ), UnpackV4_5set(idx, 1)
|
UnpackFuncSet( V4, idx, mode, u, 1 ), UnpackV4_5set(idx, 1)
|
||||||
|
|
||||||
__aligned16 const UNPACKFUNCTYPE VIFfuncTable[2][4][4 * 4 * 2 * 2] =
|
alignas(16) const UNPACKFUNCTYPE VIFfuncTable[2][4][4 * 4 * 2 * 2] =
|
||||||
{
|
{
|
||||||
{
|
{
|
||||||
{ UnpackModeSet(0,0) },
|
{ UnpackModeSet(0,0) },
|
||||||
|
|
|
@ -30,10 +30,10 @@ create_some_unpacks(32);
|
||||||
create_some_unpacks(16);
|
create_some_unpacks(16);
|
||||||
create_some_unpacks(8);
|
create_some_unpacks(8);
|
||||||
|
|
||||||
extern __aligned16 const u8 nVifT[16];
|
alignas(16) extern const u8 nVifT[16];
|
||||||
|
|
||||||
// Array sub-dimension order: [vifidx] [mode] (VN * VL * USN * doMask)
|
// Array sub-dimension order: [vifidx] [mode] (VN * VL * USN * doMask)
|
||||||
extern __aligned16 const UNPACKFUNCTYPE VIFfuncTable[2][4][(4 * 4 * 2 * 2)];
|
alignas(16) extern const UNPACKFUNCTYPE VIFfuncTable[2][4][(4 * 4 * 2 * 2)];
|
||||||
|
|
||||||
_vifT extern int nVifUnpack (const u8* data);
|
_vifT extern int nVifUnpack (const u8* data);
|
||||||
extern void resetNewVif(int idx);
|
extern void resetNewVif(int idx);
|
||||||
|
|
|
@ -776,8 +776,8 @@ extern bool HasMainFrame();
|
||||||
extern MainEmuFrame& GetMainFrame();
|
extern MainEmuFrame& GetMainFrame();
|
||||||
extern MainEmuFrame* GetMainFramePtr();
|
extern MainEmuFrame* GetMainFramePtr();
|
||||||
|
|
||||||
extern __aligned16 AppCoreThread CoreThread;
|
alignas(16) extern AppCoreThread CoreThread;
|
||||||
extern __aligned16 SysMtgsThread mtgsThread;
|
alignas(16) extern SysMtgsThread mtgsThread;
|
||||||
|
|
||||||
extern void UI_UpdateSysControls();
|
extern void UI_UpdateSysControls();
|
||||||
|
|
||||||
|
|
|
@ -38,8 +38,8 @@
|
||||||
#include "Recording/InputRecordingControls.h"
|
#include "Recording/InputRecordingControls.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__aligned16 SysMtgsThread mtgsThread;
|
alignas(16) SysMtgsThread mtgsThread;
|
||||||
__aligned16 AppCoreThread CoreThread;
|
alignas(16) AppCoreThread CoreThread;
|
||||||
|
|
||||||
typedef void (AppCoreThread::*FnPtr_CoreThreadMethod)();
|
typedef void (AppCoreThread::*FnPtr_CoreThreadMethod)();
|
||||||
|
|
||||||
|
|
|
@ -1080,7 +1080,7 @@ void CtrlDisassemblyView::updateStatusBarText()
|
||||||
}
|
}
|
||||||
case 16:
|
case 16:
|
||||||
{
|
{
|
||||||
__aligned16 u128 data = cpu->read128(line.info.dataAddress);
|
alignas(16) u128 data = cpu->read128(line.info.dataAddress);
|
||||||
sprintf(text, "[%08X] = %016" PRIX64 "%016" PRIX64, line.info.dataAddress, data._u64[1], data._u64[0]);
|
sprintf(text, "[%08X] = %016" PRIX64 "%016" PRIX64, line.info.dataAddress, data._u64[1], data._u64[0]);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -110,7 +110,7 @@ static __fi bool WriteIOPtoFifo()
|
||||||
// Read Fifo into an ee tag, transfer it to sif2dma, and process it.
|
// Read Fifo into an ee tag, transfer it to sif2dma, and process it.
|
||||||
static __fi bool ProcessEETag()
|
static __fi bool ProcessEETag()
|
||||||
{
|
{
|
||||||
static __aligned16 u32 tag[4];
|
alignas(16) static u32 tag[4];
|
||||||
tDMA_TAG& ptag(*(tDMA_TAG*)tag);
|
tDMA_TAG& ptag(*(tDMA_TAG*)tag);
|
||||||
|
|
||||||
sif2.fifo.read((u32*)&tag[0], 4); // Tag
|
sif2.fifo.read((u32*)&tag[0], 4); // Tag
|
||||||
|
|
|
@ -45,7 +45,7 @@ using namespace vtlb_private;
|
||||||
|
|
||||||
namespace vtlb_private
|
namespace vtlb_private
|
||||||
{
|
{
|
||||||
__aligned(64) MapData vtlbdata;
|
alignas(64) MapData vtlbdata;
|
||||||
}
|
}
|
||||||
|
|
||||||
static vtlbHandler vtlbHandlerCount = 0;
|
static vtlbHandler vtlbHandlerCount = 0;
|
||||||
|
|
|
@ -260,7 +260,7 @@ namespace vtlb_private
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
extern __aligned(64) MapData vtlbdata;
|
alignas(64) extern MapData vtlbdata;
|
||||||
|
|
||||||
inline void *VTLBVirtual::assumeHandlerGetRaw(int index, bool write) const
|
inline void *VTLBVirtual::assumeHandlerGetRaw(int index, bool write) const
|
||||||
{
|
{
|
||||||
|
|
|
@ -30,7 +30,7 @@ s32 PrepareEEWrite()
|
||||||
|
|
||||||
s32 PrepareEERead()
|
s32 PrepareEERead()
|
||||||
{
|
{
|
||||||
static __aligned16 u32 tag[4];
|
alignas(16) static u32 tag[4];
|
||||||
|
|
||||||
// Process DMA tag at hw_dma9.tadr
|
// Process DMA tag at hw_dma9.tadr
|
||||||
sif0.iop.data = *(sifData *)iopPhysMem(hw_dma9.tadr);
|
sif0.iop.data = *(sifData *)iopPhysMem(hw_dma9.tadr);
|
||||||
|
|
|
@ -46,12 +46,12 @@ _x86regs x86regs[iREGCNT_GPR], s_saveX86regs[iREGCNT_GPR];
|
||||||
#define VU_ACCx_ADDR (uptr)&VU->ACC.UL[0]
|
#define VU_ACCx_ADDR (uptr)&VU->ACC.UL[0]
|
||||||
|
|
||||||
|
|
||||||
__aligned16 u32 xmmBackup[iREGCNT_XMM][4];
|
alignas(16) u32 xmmBackup[iREGCNT_XMM][4];
|
||||||
|
|
||||||
#ifdef __M_X86_64
|
#ifdef __M_X86_64
|
||||||
__aligned16 u64 gprBackup[iREGCNT_GPR];
|
alignas(16) u64 gprBackup[iREGCNT_GPR];
|
||||||
#else
|
#else
|
||||||
__aligned16 u32 gprBackup[iREGCNT_GPR];
|
alignas(16) u32 gprBackup[iREGCNT_GPR];
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static int s_xmmchecknext = 0;
|
static int s_xmmchecknext = 0;
|
||||||
|
|
|
@ -23,8 +23,8 @@
|
||||||
|
|
||||||
using namespace x86Emitter;
|
using namespace x86Emitter;
|
||||||
|
|
||||||
const __aligned16 u32 g_minvals[4] = {0xff7fffff, 0xff7fffff, 0xff7fffff, 0xff7fffff};
|
alignas(16) const u32 g_minvals[4] = {0xff7fffff, 0xff7fffff, 0xff7fffff, 0xff7fffff};
|
||||||
const __aligned16 u32 g_maxvals[4] = {0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff};
|
alignas(16) const u32 g_maxvals[4] = {0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff};
|
||||||
|
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
namespace R5900 {
|
namespace R5900 {
|
||||||
|
@ -82,8 +82,8 @@ namespace DOUBLE
|
||||||
// Add/Sub opcodes produce the same results as the ps2
|
// Add/Sub opcodes produce the same results as the ps2
|
||||||
#define FPU_CORRECT_ADD_SUB 1
|
#define FPU_CORRECT_ADD_SUB 1
|
||||||
|
|
||||||
static const __aligned16 u32 s_neg[4] = {0x80000000, 0xffffffff, 0xffffffff, 0xffffffff};
|
alignas(16) static const u32 s_neg[4] = {0x80000000, 0xffffffff, 0xffffffff, 0xffffffff};
|
||||||
static const __aligned16 u32 s_pos[4] = {0x7fffffff, 0xffffffff, 0xffffffff, 0xffffffff};
|
alignas(16) static const u32 s_pos[4] = {0x7fffffff, 0xffffffff, 0xffffffff, 0xffffffff};
|
||||||
|
|
||||||
#define REC_FPUBRANCH(f) \
|
#define REC_FPUBRANCH(f) \
|
||||||
void f(); \
|
void f(); \
|
||||||
|
@ -312,7 +312,7 @@ REC_FPUFUNC(RSQRT_S);
|
||||||
// Clamp Functions (Converts NaN's and Infinities to Normal Numbers)
|
// Clamp Functions (Converts NaN's and Infinities to Normal Numbers)
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
|
|
||||||
static __aligned16 u64 FPU_FLOAT_TEMP[2];
|
alignas(16) static u64 FPU_FLOAT_TEMP[2];
|
||||||
__fi void fpuFloat3(int regd) // +NaN -> +fMax, -NaN -> -fMax, +Inf -> +fMax, -Inf -> -fMax
|
__fi void fpuFloat3(int regd) // +NaN -> +fMax, -NaN -> -fMax, +Inf -> +fMax, -Inf -> -fMax
|
||||||
{
|
{
|
||||||
int t1reg = _allocTempXMMreg(XMMT_FPS, -1);
|
int t1reg = _allocTempXMMreg(XMMT_FPS, -1);
|
||||||
|
@ -1070,7 +1070,7 @@ void recDIVhelper2(int regd, int regt) // Doesn't sets flags
|
||||||
ClampValues(regd);
|
ClampValues(regd);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __aligned16 SSE_MXCSR roundmode_nearest, roundmode_neg;
|
alignas(16) static SSE_MXCSR roundmode_nearest, roundmode_neg;
|
||||||
|
|
||||||
void recDIV_S_xmm(int info)
|
void recDIV_S_xmm(int info)
|
||||||
{
|
{
|
||||||
|
|
|
@ -16,8 +16,8 @@
|
||||||
#ifndef __IFPU_H__
|
#ifndef __IFPU_H__
|
||||||
#define __IFPU_H__
|
#define __IFPU_H__
|
||||||
|
|
||||||
extern const __aligned16 u32 g_minvals[4];
|
alignas(16) extern const u32 g_minvals[4];
|
||||||
extern const __aligned16 u32 g_maxvals[4];
|
alignas(16) extern const u32 g_maxvals[4];
|
||||||
|
|
||||||
namespace R5900 {
|
namespace R5900 {
|
||||||
namespace Dynarec {
|
namespace Dynarec {
|
||||||
|
|
|
@ -117,7 +117,7 @@ struct FPUd_Globals
|
||||||
//u64 dlb_s_neg[2];
|
//u64 dlb_s_neg[2];
|
||||||
};
|
};
|
||||||
|
|
||||||
static const __aligned(32) FPUd_Globals s_const =
|
alignas(32) static const FPUd_Globals s_const =
|
||||||
{
|
{
|
||||||
{0x80000000, 0xffffffff, 0xffffffff, 0xffffffff},
|
{0x80000000, 0xffffffff, 0xffffffff, 0xffffffff},
|
||||||
{0x7fffffff, 0xffffffff, 0xffffffff, 0xffffffff},
|
{0x7fffffff, 0xffffffff, 0xffffffff, 0xffffffff},
|
||||||
|
@ -667,7 +667,7 @@ void recDIVhelper2(int regd, int regt) // Doesn't sets flags
|
||||||
ToPS2FPU(regd, false, regt, false);
|
ToPS2FPU(regd, false, regt, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __aligned16 SSE_MXCSR roundmode_nearest, roundmode_neg;
|
alignas(16) static SSE_MXCSR roundmode_nearest, roundmode_neg;
|
||||||
|
|
||||||
void recDIV_S_xmm(int info)
|
void recDIV_S_xmm(int info)
|
||||||
{
|
{
|
||||||
|
@ -807,7 +807,7 @@ FPURECOMPILE_CONSTCODE(MADDA_S, XMMINFO_WRITEACC | XMMINFO_READACC | XMMINFO_REA
|
||||||
// MAX / MIN XMM
|
// MAX / MIN XMM
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
|
|
||||||
static const __aligned16 u32 minmax_mask[8] =
|
alignas(16) static const u32 minmax_mask[8] =
|
||||||
{
|
{
|
||||||
0xffffffff, 0x80000000, 0, 0,
|
0xffffffff, 0x80000000, 0, 0,
|
||||||
0, 0x40000000, 0, 0,
|
0, 0x40000000, 0, 0,
|
||||||
|
|
|
@ -1561,7 +1561,7 @@ void recPEXTUH()
|
||||||
_clearNeededXMMregs();
|
_clearNeededXMMregs();
|
||||||
}
|
}
|
||||||
|
|
||||||
static __aligned16 u32 tempqw[8];
|
alignas(16) static u32 tempqw[8];
|
||||||
|
|
||||||
void recQFSRV()
|
void recQFSRV()
|
||||||
{
|
{
|
||||||
|
@ -2660,7 +2660,7 @@ void recPSRAVW()
|
||||||
|
|
||||||
|
|
||||||
////////////////////////////////////////////////////
|
////////////////////////////////////////////////////
|
||||||
static const __aligned16 u32 s_tempPINTEH[4] = {0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff};
|
alignas(16) static const u32 s_tempPINTEH[4] = {0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff};
|
||||||
|
|
||||||
void recPINTEH()
|
void recPINTEH()
|
||||||
{
|
{
|
||||||
|
|
|
@ -105,7 +105,7 @@ static u32 psxdump = 0;
|
||||||
static void __fastcall iopRecRecompile(const u32 startpc);
|
static void __fastcall iopRecRecompile(const u32 startpc);
|
||||||
|
|
||||||
// Recompiled code buffer for EE recompiler dispatchers!
|
// Recompiled code buffer for EE recompiler dispatchers!
|
||||||
static u8 __pagealigned iopRecDispatchers[__pagesize];
|
alignas(__pagesize) static u8 iopRecDispatchers[__pagesize];
|
||||||
|
|
||||||
typedef void DynGenFunc();
|
typedef void DynGenFunc();
|
||||||
|
|
||||||
|
|
|
@ -107,7 +107,7 @@ namespace R5900
|
||||||
g_cpuHasConstReg &= ~(1 << (reg)); \
|
g_cpuHasConstReg &= ~(1 << (reg)); \
|
||||||
}
|
}
|
||||||
|
|
||||||
extern __aligned16 GPR_reg64 g_cpuConstRegs[32];
|
alignas(16) extern GPR_reg64 g_cpuConstRegs[32];
|
||||||
extern u32 g_cpuHasConstReg, g_cpuFlushedConstReg;
|
extern u32 g_cpuHasConstReg, g_cpuFlushedConstReg;
|
||||||
|
|
||||||
// gets a memory pointer to the constant reg
|
// gets a memory pointer to the constant reg
|
||||||
|
|
|
@ -50,8 +50,8 @@ using namespace R5900;
|
||||||
#define PC_GETBLOCK(x) PC_GETBLOCK_(x, recLUT)
|
#define PC_GETBLOCK(x) PC_GETBLOCK_(x, recLUT)
|
||||||
|
|
||||||
u32 maxrecmem = 0;
|
u32 maxrecmem = 0;
|
||||||
static __aligned16 uptr recLUT[_64kb];
|
alignas(16) static uptr recLUT[_64kb];
|
||||||
static __aligned16 u32 hwLUT[_64kb];
|
alignas(16) static u32 hwLUT[_64kb];
|
||||||
|
|
||||||
static __fi u32 HWADDR(u32 mem) { return hwLUT[mem >> 16] + mem; }
|
static __fi u32 HWADDR(u32 mem) { return hwLUT[mem >> 16] + mem; }
|
||||||
|
|
||||||
|
@ -60,7 +60,7 @@ u32 s_nBlockCycles = 0; // cycles of current block recompiling
|
||||||
u32 pc; // recompiler pc
|
u32 pc; // recompiler pc
|
||||||
int g_branch; // set for branch
|
int g_branch; // set for branch
|
||||||
|
|
||||||
__aligned16 GPR_reg64 g_cpuConstRegs[32] = {0};
|
alignas(16) GPR_reg64 g_cpuConstRegs[32] = {0};
|
||||||
u32 g_cpuHasConstReg = 0, g_cpuFlushedConstReg = 0;
|
u32 g_cpuHasConstReg = 0, g_cpuFlushedConstReg = 0;
|
||||||
bool g_cpuFlushedPC, g_cpuFlushedCode, g_recompilingDelaySlot, g_maySignalException;
|
bool g_cpuFlushedPC, g_cpuFlushedCode, g_recompilingDelaySlot, g_maySignalException;
|
||||||
|
|
||||||
|
@ -356,7 +356,7 @@ static void __fastcall dyna_block_discard(u32 start, u32 sz);
|
||||||
static void __fastcall dyna_page_reset(u32 start, u32 sz);
|
static void __fastcall dyna_page_reset(u32 start, u32 sz);
|
||||||
|
|
||||||
// Recompiled code buffer for EE recompiler dispatchers!
|
// Recompiled code buffer for EE recompiler dispatchers!
|
||||||
static u8 __pagealigned eeRecDispatchers[__pagesize];
|
alignas(__pagesize) static u8 eeRecDispatchers[__pagesize];
|
||||||
|
|
||||||
typedef void DynGenFunc();
|
typedef void DynGenFunc();
|
||||||
|
|
||||||
|
@ -621,8 +621,8 @@ static void recAlloc()
|
||||||
_DynGen_Dispatchers();
|
_DynGen_Dispatchers();
|
||||||
}
|
}
|
||||||
|
|
||||||
static __aligned16 u16 manual_page[Ps2MemSize::MainRam >> 12];
|
alignas(16) static u16 manual_page[Ps2MemSize::MainRam >> 12];
|
||||||
static __aligned16 u8 manual_counter[Ps2MemSize::MainRam >> 12];
|
alignas(16) static u8 manual_counter[Ps2MemSize::MainRam >> 12];
|
||||||
|
|
||||||
static std::atomic<bool> eeRecIsReset(false);
|
static std::atomic<bool> eeRecIsReset(false);
|
||||||
static std::atomic<bool> eeRecNeedsReset(false);
|
static std::atomic<bool> eeRecNeedsReset(false);
|
||||||
|
|
|
@ -66,7 +66,7 @@ REC_FUNC(SQC2);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
__aligned16 u64 retValues[2];
|
alignas(16) u64 retValues[2];
|
||||||
|
|
||||||
void _eeOnLoadWrite(u32 reg)
|
void _eeOnLoadWrite(u32 reg)
|
||||||
{
|
{
|
||||||
|
@ -96,7 +96,7 @@ void _eeOnLoadWrite(u32 reg)
|
||||||
|
|
||||||
using namespace Interpreter::OpcodeImpl;
|
using namespace Interpreter::OpcodeImpl;
|
||||||
|
|
||||||
__aligned16 u32 dummyValue[4];
|
alignas(16) u32 dummyValue[4];
|
||||||
|
|
||||||
//////////////////////////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
|
|
|
@ -415,7 +415,7 @@ static void recDShiftV(const xImpl_Group2& shift)
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
__aligned16 u32 s_sa[4] = {0x1f, 0, 0x3f, 0};
|
alignas(16) u32 s_sa[4] = {0x1f, 0, 0x3f, 0};
|
||||||
|
|
||||||
void recSetShiftV(int info, int* rsreg, int* rtreg, int* rdreg, int* rstemp)
|
void recSetShiftV(int info, int* rsreg, int* rtreg, int* rdreg, int* rstemp)
|
||||||
{
|
{
|
||||||
|
|
|
@ -252,7 +252,7 @@ namespace vtlb_private
|
||||||
// If it were smaller than a page we'd end up allowing execution rights on some
|
// If it were smaller than a page we'd end up allowing execution rights on some
|
||||||
// other vars additionally (bad!).
|
// other vars additionally (bad!).
|
||||||
//
|
//
|
||||||
static __pagealigned u8 m_IndirectDispatchers[__pagesize];
|
alignas(__pagesize) static u8 m_IndirectDispatchers[__pagesize];
|
||||||
|
|
||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// mode - 0 for read, 1 for write!
|
// mode - 0 for read, 1 for write!
|
||||||
|
|
|
@ -23,8 +23,8 @@
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
// Micro VU - Main Functions
|
// Micro VU - Main Functions
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
static u8 __pagealigned vu0_RecDispatchers[mVUdispCacheSize];
|
alignas(__pagesize) static u8 vu0_RecDispatchers[mVUdispCacheSize];
|
||||||
static u8 __pagealigned vu1_RecDispatchers[mVUdispCacheSize];
|
alignas(__pagesize) static u8 vu1_RecDispatchers[mVUdispCacheSize];
|
||||||
|
|
||||||
static __fi void mVUthrowHardwareDeficiency(const wxChar* extFail, int vuIndex)
|
static __fi void mVUthrowHardwareDeficiency(const wxChar* extFail, int vuIndex)
|
||||||
{
|
{
|
||||||
|
|
|
@ -205,14 +205,14 @@ static const uint mVUcacheReserve = 64; // mVU0, mVU1 Reserve Cache Size (in meg
|
||||||
struct microVU
|
struct microVU
|
||||||
{
|
{
|
||||||
|
|
||||||
__aligned16 u32 statFlag[4]; // 4 instances of status flag (backup for xgkick)
|
alignas(16) u32 statFlag[4]; // 4 instances of status flag (backup for xgkick)
|
||||||
__aligned16 u32 macFlag [4]; // 4 instances of mac flag (used in execution)
|
alignas(16) u32 macFlag [4]; // 4 instances of mac flag (used in execution)
|
||||||
__aligned16 u32 clipFlag[4]; // 4 instances of clip flag (used in execution)
|
alignas(16) u32 clipFlag[4]; // 4 instances of clip flag (used in execution)
|
||||||
__aligned16 u32 xmmCTemp[4]; // Backup used in mVUclamp2()
|
alignas(16) u32 xmmCTemp[4]; // Backup used in mVUclamp2()
|
||||||
#ifdef __M_X86_64
|
#ifdef __M_X86_64
|
||||||
__aligned16 u32 xmmBackup[16][4]; // Backup for xmm0~xmm15
|
alignas(16) u32 xmmBackup[16][4]; // Backup for xmm0~xmm15
|
||||||
#else
|
#else
|
||||||
__aligned16 u32 xmmBackup[8][4]; // Backup for xmm0~xmm7
|
alignas(16) u32 xmmBackup[8][4]; // Backup for xmm0~xmm7
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
u32 index; // VU Index (VU0 or VU1)
|
u32 index; // VU Index (VU0 or VU1)
|
||||||
|
@ -259,8 +259,8 @@ struct microVU
|
||||||
};
|
};
|
||||||
|
|
||||||
// microVU rec structs
|
// microVU rec structs
|
||||||
__aligned16 microVU microVU0;
|
alignas(16) microVU microVU0;
|
||||||
__aligned16 microVU microVU1;
|
alignas(16) microVU microVU1;
|
||||||
|
|
||||||
// Debug Helper
|
// Debug Helper
|
||||||
int mVUdebugNow = 0;
|
int mVUdebugNow = 0;
|
||||||
|
|
|
@ -19,11 +19,11 @@
|
||||||
// Micro VU - Clamp Functions
|
// Micro VU - Clamp Functions
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
|
|
||||||
const __aligned16 u32 sse4_minvals[2][4] = {
|
alignas(16) const u32 sse4_minvals[2][4] = {
|
||||||
{0xff7fffff, 0xffffffff, 0xffffffff, 0xffffffff}, //1000
|
{0xff7fffff, 0xffffffff, 0xffffffff, 0xffffffff}, //1000
|
||||||
{0xff7fffff, 0xff7fffff, 0xff7fffff, 0xff7fffff}, //1111
|
{0xff7fffff, 0xff7fffff, 0xff7fffff, 0xff7fffff}, //1111
|
||||||
};
|
};
|
||||||
const __aligned16 u32 sse4_maxvals[2][4] = {
|
alignas(16) const u32 sse4_maxvals[2][4] = {
|
||||||
{0x7f7fffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}, //1000
|
{0x7f7fffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}, //1000
|
||||||
{0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff}, //1111
|
{0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff}, //1111
|
||||||
};
|
};
|
||||||
|
|
|
@ -34,7 +34,7 @@ union regInfo
|
||||||
// vi15 is only used if microVU const-prop is enabled (it is *not* by default). When constprop
|
// vi15 is only used if microVU const-prop is enabled (it is *not* by default). When constprop
|
||||||
// is disabled the vi15 field acts as additional padding that is required for 16 byte alignment
|
// is disabled the vi15 field acts as additional padding that is required for 16 byte alignment
|
||||||
// needed by the xmm compare.
|
// needed by the xmm compare.
|
||||||
union __aligned16 microRegInfo
|
union alignas(16) microRegInfo
|
||||||
{
|
{
|
||||||
struct
|
struct
|
||||||
{
|
{
|
||||||
|
@ -81,7 +81,7 @@ struct microJumpCache
|
||||||
void* x86ptrStart; // Start of code (Entry point for block)
|
void* x86ptrStart; // Start of code (Entry point for block)
|
||||||
};
|
};
|
||||||
|
|
||||||
struct __aligned16 microBlock
|
struct alignas(16) microBlock
|
||||||
{
|
{
|
||||||
microRegInfo pState; // Detailed State of Pipeline
|
microRegInfo pState; // Detailed State of Pipeline
|
||||||
microRegInfo pStateEnd; // Detailed State of Pipeline at End of Block (needed by JR/JALR opcodes)
|
microRegInfo pStateEnd; // Detailed State of Pipeline at End of Block (needed by JR/JALR opcodes)
|
||||||
|
|
|
@ -39,7 +39,7 @@ struct mVU_Globals
|
||||||
};
|
};
|
||||||
|
|
||||||
#define __four(val) { val, val, val, val }
|
#define __four(val) { val, val, val, val }
|
||||||
static const __aligned(32) mVU_Globals mVUglob = {
|
alignas(32) static const mVU_Globals mVUglob = {
|
||||||
__four(0x7fffffff), // absclip
|
__four(0x7fffffff), // absclip
|
||||||
__four(0x80000000), // signbit
|
__four(0x80000000), // signbit
|
||||||
__four(0xff7fffff), // minvals
|
__four(0xff7fffff), // minvals
|
||||||
|
@ -208,7 +208,7 @@ typedef Fntype_mVUrecInst* Fnptr_mVUrecInst;
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
// Define mVUquickSearch
|
// Define mVUquickSearch
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
extern __pagealigned u8 mVUsearchXMM[__pagesize];
|
alignas(__pagesize) extern u8 mVUsearchXMM[__pagesize];
|
||||||
typedef u32(__fastcall* mVUCall)(void*, void*);
|
typedef u32(__fastcall* mVUCall)(void*, void*);
|
||||||
#define mVUquickSearch(dest, src, size) ((((mVUCall)((void*)mVUsearchXMM))(dest, src)) == 0xf)
|
#define mVUquickSearch(dest, src, size) ((((mVUCall)((void*)mVUsearchXMM))(dest, src)) == 0xf)
|
||||||
#define mVUemitSearch() \
|
#define mVUemitSearch() \
|
||||||
|
|
|
@ -294,7 +294,7 @@ struct SSEMasks
|
||||||
u32 MIN_MAX_1[4], MIN_MAX_2[4], ADD_SS[4];
|
u32 MIN_MAX_1[4], MIN_MAX_2[4], ADD_SS[4];
|
||||||
};
|
};
|
||||||
|
|
||||||
static const __aligned16 SSEMasks sseMasks =
|
alignas(16) static const SSEMasks sseMasks =
|
||||||
{
|
{
|
||||||
{0xffffffff, 0x80000000, 0xffffffff, 0x80000000},
|
{0xffffffff, 0x80000000, 0xffffffff, 0x80000000},
|
||||||
{0x00000000, 0x40000000, 0x00000000, 0x40000000},
|
{0x00000000, 0x40000000, 0x00000000, 0x40000000},
|
||||||
|
@ -534,7 +534,7 @@ void SSE_DIVSS(mV, const xmm& to, const xmm& from, const xmm& t1 = xEmptyReg, co
|
||||||
// Micro VU - Custom Quick Search
|
// Micro VU - Custom Quick Search
|
||||||
//------------------------------------------------------------------
|
//------------------------------------------------------------------
|
||||||
|
|
||||||
__pagealigned u8 mVUsearchXMM[__pagesize];
|
alignas(__pagesize) u8 mVUsearchXMM[__pagesize];
|
||||||
|
|
||||||
// Generates a custom optimized block-search function
|
// Generates a custom optimized block-search function
|
||||||
// Note: Structs must be 16-byte aligned! (GCC doesn't guarantee this)
|
// Note: Structs must be 16-byte aligned! (GCC doesn't guarantee this)
|
||||||
|
|
|
@ -30,7 +30,7 @@
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
|
|
||||||
const __aligned16 u32 sse4_compvals[2][4] = {
|
alignas(16) const u32 sse4_compvals[2][4] = {
|
||||||
{0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff}, //1111
|
{0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff}, //1111
|
||||||
{0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}, //1111
|
{0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}, //1111
|
||||||
};
|
};
|
||||||
|
|
|
@ -56,7 +56,7 @@ struct nVifStruct
|
||||||
{
|
{
|
||||||
// Buffer for partial transfers (should always be first to ensure alignment)
|
// Buffer for partial transfers (should always be first to ensure alignment)
|
||||||
// Maximum buffer size is 256 (vifRegs.Num max range) * 16 (quadword)
|
// Maximum buffer size is 256 (vifRegs.Num max range) * 16 (quadword)
|
||||||
__aligned16 u8 buffer[256*16];
|
alignas(16) u8 buffer[256*16];
|
||||||
u32 bSize; // Size of 'buffer'
|
u32 bSize; // Size of 'buffer'
|
||||||
|
|
||||||
// VIF0 or VIF1 - provided for debugging helpfulness only, and is generally unused.
|
// VIF0 or VIF1 - provided for debugging helpfulness only, and is generally unused.
|
||||||
|
@ -76,8 +76,8 @@ extern void closeNewVif(int idx);
|
||||||
extern void resetNewVif(int idx);
|
extern void resetNewVif(int idx);
|
||||||
extern void releaseNewVif(int idx);
|
extern void releaseNewVif(int idx);
|
||||||
|
|
||||||
extern __aligned16 nVifStruct nVif[2];
|
alignas(16) extern nVifStruct nVif[2];
|
||||||
extern __aligned16 nVifCall nVifUpk[(2 * 2 * 16) * 4]; // ([USN][Masking][Unpack Type]) [curCycle]
|
alignas(16) extern nVifCall nVifUpk[(2 * 2 * 16) * 4]; // ([USN][Masking][Unpack Type]) [curCycle]
|
||||||
extern __aligned16 u32 nVifMask[3][4][4]; // [MaskNumber][CycleNumber][Vector]
|
alignas(16) extern u32 nVifMask[3][4][4]; // [MaskNumber][CycleNumber][Vector]
|
||||||
|
|
||||||
static const bool newVifDynaRec = 1; // Use code in newVif_Dynarec.inl
|
static const bool newVifDynaRec = 1; // Use code in newVif_Dynarec.inl
|
||||||
|
|
|
@ -23,20 +23,20 @@
|
||||||
#include "newVif.h"
|
#include "newVif.h"
|
||||||
#include "MTVU.h"
|
#include "MTVU.h"
|
||||||
|
|
||||||
__aligned16 nVifStruct nVif[2];
|
alignas(16) nVifStruct nVif[2];
|
||||||
|
|
||||||
// Interpreter-style SSE unpacks. Array layout matches the interpreter C unpacks.
|
// Interpreter-style SSE unpacks. Array layout matches the interpreter C unpacks.
|
||||||
// ([USN][Masking][Unpack Type]) [curCycle]
|
// ([USN][Masking][Unpack Type]) [curCycle]
|
||||||
__aligned16 nVifCall nVifUpk[(2 * 2 * 16) * 4];
|
alignas(16) nVifCall nVifUpk[(2 * 2 * 16) * 4];
|
||||||
|
|
||||||
// This is used by the interpreted SSE unpacks only. Recompiled SSE unpacks
|
// This is used by the interpreted SSE unpacks only. Recompiled SSE unpacks
|
||||||
// and the interpreted C unpacks use the vif.MaskRow/MaskCol members directly.
|
// and the interpreted C unpacks use the vif.MaskRow/MaskCol members directly.
|
||||||
// [MaskNumber][CycleNumber][Vector]
|
// [MaskNumber][CycleNumber][Vector]
|
||||||
__aligned16 u32 nVifMask[3][4][4] = {0};
|
alignas(16) u32 nVifMask[3][4][4] = {0};
|
||||||
|
|
||||||
// Number of bytes of data in the source stream needed for each vector.
|
// Number of bytes of data in the source stream needed for each vector.
|
||||||
// [equivalent to ((32 >> VL) * (VN+1)) / 8]
|
// [equivalent to ((32 >> VL) * (VN+1)) / 8]
|
||||||
__aligned16 const u8 nVifT[16] = {
|
alignas(16) const u8 nVifT[16] = {
|
||||||
4, // S-32
|
4, // S-32
|
||||||
2, // S-16
|
2, // S-16
|
||||||
1, // S-8
|
1, // S-8
|
||||||
|
@ -63,7 +63,7 @@ typedef void __fastcall FnType_VifUnpackLoop(const u8* data);
|
||||||
typedef FnType_VifUnpackLoop* Fnptr_VifUnpackLoop;
|
typedef FnType_VifUnpackLoop* Fnptr_VifUnpackLoop;
|
||||||
|
|
||||||
// Unpacks Until 'Num' is 0
|
// Unpacks Until 'Num' is 0
|
||||||
static const __aligned16 Fnptr_VifUnpackLoop UnpackLoopTable[2][2][2] = {
|
alignas(16) static const Fnptr_VifUnpackLoop UnpackLoopTable[2][2][2] = {
|
||||||
{
|
{
|
||||||
{_nVifUnpackLoop<0, 0, 0>, _nVifUnpackLoop<0, 0, 1>},
|
{_nVifUnpackLoop<0, 0, 0>, _nVifUnpackLoop<0, 0, 1>},
|
||||||
{_nVifUnpackLoop<0, 1, 0>, _nVifUnpackLoop<0, 1, 1>},
|
{_nVifUnpackLoop<0, 1, 0>, _nVifUnpackLoop<0, 1, 1>},
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
#define xMOV64(regX, loc) xMOVUPS (regX, loc)
|
#define xMOV64(regX, loc) xMOVUPS (regX, loc)
|
||||||
#define xMOV128(regX, loc) xMOVUPS (regX, loc)
|
#define xMOV128(regX, loc) xMOVUPS (regX, loc)
|
||||||
|
|
||||||
static const __aligned16 u32 SSEXYZWMask[4][4] =
|
alignas(16) static const u32 SSEXYZWMask[4][4] =
|
||||||
{
|
{
|
||||||
{0xffffffff, 0xffffffff, 0xffffffff, 0x00000000},
|
{0xffffffff, 0xffffffff, 0xffffffff, 0x00000000},
|
||||||
{0xffffffff, 0xffffffff, 0x00000000, 0xffffffff},
|
{0xffffffff, 0xffffffff, 0x00000000, 0xffffffff},
|
||||||
|
@ -30,7 +30,7 @@ static const __aligned16 u32 SSEXYZWMask[4][4] =
|
||||||
{0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}
|
{0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}
|
||||||
};
|
};
|
||||||
|
|
||||||
//static __pagealigned u8 nVifUpkExec[__pagesize*4];
|
//alignas(__pagesize) static u8 nVifUpkExec[__pagesize*4];
|
||||||
static RecompiledCodeReserve* nVifUpkExec = NULL;
|
static RecompiledCodeReserve* nVifUpkExec = NULL;
|
||||||
|
|
||||||
// Merges xmm vectors without modifying source reg
|
// Merges xmm vectors without modifying source reg
|
||||||
|
|
Loading…
Reference in New Issue