mirror of https://github.com/PCSX2/pcsx2.git
SPU2-X: Completely removed the concept of core resets. We were unable to find any evidence supporting their existence.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4720 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -422,7 +422,6 @@ struct V_Core
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// from this for the odd Ts.
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StereoOut32 LastEffect;
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u8 InitDelay;
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u8 CoreEnabled;
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u8 AttrBit0;
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@ -456,7 +455,6 @@ struct V_Core
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V_Core( int idx ); // our badass constructor
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~V_Core() throw();
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void Reset( int index );
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void Init( int index );
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void UpdateEffectsBufferSize();
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void AnalyzeReverbPreset();
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@ -174,72 +174,6 @@ void V_Core::Init( int index )
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Regs.ENDX = 0xffffff; // PS2 confirmed
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}
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// Most values are confirmed on a PS2
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void V_Core::Reset( int index )
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{
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ConLog( "* SPU2-X: Reset SPU2 core %d \n", index );
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u32 prev_IRQA = Cores[index].IRQA;
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memset( this, 0, sizeof(V_Core) );
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const int c = Index = index;
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Regs.STATX = 0;
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Regs.ATTR = 0;
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ExtVol = V_VolumeLR::Max;
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InpVol = V_VolumeLR::Max;
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FxVol = V_VolumeLR(0);
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MasterVol = V_VolumeSlideLR(0,0);
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#if 0
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memset( &DryGate, -1, sizeof(DryGate) );
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memset( &WetGate, -1, sizeof(WetGate) );
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Regs.MMIX = 0xFFF;
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#endif
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Regs.VMIXL = 0xFFFFFF;
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Regs.VMIXR = 0xFFFFFF;
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Regs.VMIXEL = 0xFFFFFF;
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Regs.VMIXER = 0xFFFFFF;
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EffectsStartA = c ? 0xFFFF8 : 0xEC810; // (After rom0:PS2LOGO)
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EffectsEndA = c ? 0xFFFFF : 0xEFFFF; // (After rom0:PS2LOGO)
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// Uninitialized it's 0 for both cores. Resetting libs however may set this to 0 or 1 depending on a flag.
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// DDS has strange reverb on voiceovers if this is reset to 0
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// Formula1 2005 seemingly needs a Reverb Interrupt to boot.
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// rom0:PS2LOGO leaves it at 1.
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// BoF:DQ has ugly noise with this at 1. << therefore settling with "0" for now.
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FxEnable = 0;
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IRQA = prev_IRQA; // IRQA isn't reset by sdinit or the BIOS
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IRQEnable = 0;
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for( uint v=0; v<NumVoices; ++v )
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{
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VoiceGates[v].DryL = -1;
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VoiceGates[v].DryR = -1;
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VoiceGates[v].WetL = -1;
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VoiceGates[v].WetR = -1;
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Voices[v].Volume = V_VolumeSlideLR(0,0); // V_VolumeSlideLR::Max;
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Voices[v].SCurrent = 28;
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Voices[v].ADSR.Value = 0;
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Voices[v].ADSR.Phase = 0;
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Voices[v].Pitch = 0x3FFF;
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Voices[v].NextA = 0x2800;
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Voices[v].StartA = 0x2800;
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Voices[v].LoopStartA = 0x2800;
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}
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DMAICounter = 0;
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AdmaInProgress = 0;
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Regs.STATX = 0x80;
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Regs.ENDX = 0xffffff; // PS2 confirmed
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}
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void V_Core::AnalyzeReverbPreset()
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{
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ConLog("Reverb Parameter Update for Core %d:\n", Index);
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@ -446,24 +380,6 @@ __forceinline void TimeUpdate(u32 cClocks)
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if(_irqcallback) _irqcallback();
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}
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if(Cores[0].InitDelay>0)
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{
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Cores[0].InitDelay--;
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if(Cores[0].InitDelay==0)
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{
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Cores[0].Reset(0);
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}
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}
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if(Cores[1].InitDelay>0)
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{
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Cores[1].InitDelay--;
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if(Cores[1].InitDelay==0)
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{
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Cores[1].Reset(1);
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}
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}
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#ifndef ENABLE_NEW_IOPDMA_SPU2
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//Update DMA4 interrupt delay counter
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if(Cores[0].DMAICounter>0)
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@ -985,29 +901,6 @@ static void __fastcall RegWrite_Core( u16 value )
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int bit0 = thiscore.AttrBit0;
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u8 oldDmaMode = thiscore.DmaMode;
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if( ((value>>15)&1) && (!thiscore.CoreEnabled) && (thiscore.InitDelay==0) ) // on init/reset
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{
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// When we have exact cycle update info from the Pcsx2 IOP unit, then use
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// the more accurate delayed initialization system.
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ConLog( "* SPU2-X: Core%d reset bit set\n", core );
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// Async mixing can cause a scheduled reset to happen untimely, ff12 hates it and dies.
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// So do the next best thing and reset the core directly.
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if(cyclePtr != NULL && SynchMode != 1) // !AsyncMix
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{
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// InitDelay = 1 has ugly noise in Grandia 3 bootup (maybe ingame as well).
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// InitDelay = 2 would fix that but it breaks Eternal Ring booting.
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thiscore.InitDelay = 1;
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thiscore.Regs.STATX = 0;
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}
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else
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{
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thiscore.Reset(thiscore.Index);
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return;
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}
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}
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thiscore.AttrBit0 =(value>> 0) & 0x01; //1 bit
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thiscore.DMABits =(value>> 1) & 0x07; //3 bits
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thiscore.DmaMode =(value>> 4) & 0x03; //2 bit (not necessary, we get the direction from the iop)
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