mirror of https://github.com/PCSX2/pcsx2.git
Change the return values on some Vif functions.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2261 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
arcum42
parent
82a506cd04
commit
f11a138ce9
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@ -144,21 +144,29 @@ void iDumpVU0Registers()
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// fixme: This code is outdated, broken, and lacks printed labels.
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// Needs heavy mods to be useful.
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#ifdef TEST_BROKEN_DUMP_ROUTINES
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int i;
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for(i = 1; i < 32; ++i) {
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for(int i = 1; i < 32; ++i) {
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__Log("v%d: %x %x %x %x, vi: ", i, VF_VAL(VU0.VF[i].UL[3]), VF_VAL(VU0.VF[i].UL[2]),
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VF_VAL(VU0.VF[i].UL[1]), VF_VAL(VU0.VF[i].UL[0]));
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if( i == REG_Q || i == REG_P )
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switch (i)
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{
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case REG_Q:
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case REG_P:
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__Log("%f\n", VU0.VI[i].F);
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else if( i == REG_MAC_FLAG )
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break;
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case REG_MAC_FLAG:
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__Log("%x\n", 0);//VU0.VI[i].UL&0xff);
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else if( i == REG_STATUS_FLAG )
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break;
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case REG_STATUS_FLAG:
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__Log("%x\n", 0);//VU0.VI[i].UL&0x03);
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else if( i == REG_CLIP_FLAG )
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break;
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case REG_CLIP_FLAG:
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__Log("0\n");
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else
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break;
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default:
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__Log("%x\n", VU0.VI[i].UL);
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break;
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}
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}
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__Log("vfACC: %f %f %f %f\n", VU0.ACC.F[3], VU0.ACC.F[2], VU0.ACC.F[1], VU0.ACC.F[0]);
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#endif
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@ -114,8 +114,8 @@ void __fastcall WriteFIFO_page_4(u32 mem, const mem128_t *value)
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psHu64(VIF0_FIFO + 8) = value[1];
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vif0ch->qwc += 1;
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int ret = VIF0transfer((u32*)value, 4, 0);
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pxAssertDev( ret == 0, "vif stall code not implemented" );
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bool ret = VIF0transfer((u32*)value, 4, true);
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pxAssertDev( ret, "vif stall code not implemented" );
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}
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void __fastcall WriteFIFO_page_5(u32 mem, const mem128_t *value)
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@ -133,8 +133,8 @@ void __fastcall WriteFIFO_page_5(u32 mem, const mem128_t *value)
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DevCon.Warning("writing to vif1 fifo when stalled");
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vif1ch->qwc += 1;
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int ret = VIF1transfer((u32*)value, 4, 0);
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pxAssertDev( ret == 0, "vif stall code not implemented" );
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bool ret = VIF1transfer((u32*)value, 4, false);
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pxAssertDev( ret, "vif stall code not implemented" );
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}
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// Dummy GIF-TAG Packet to Guarantee Count = 1
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@ -414,12 +414,13 @@ void __fastcall UNPACK_V4_8u(u32 *dest, u32 *data, int size)
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UNPACK_V4(dest, cdata, size);
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}
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static __forceinline int mfifoVIF1rbTransfer()
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static __forceinline bool mfifoVIF1rbTransfer()
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{
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u32 maddr = dmacRegs->rbor.ADDR;
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u32 ret, msize = dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK + 16;
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u32 msize = dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK + 16;
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u16 mfifoqwc = std::min(vif1ch->qwc, vifqwc);
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u32 *src;
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bool ret;
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/* Check if the transfer should wrap around the ring buffer */
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if ((vif1ch->madr + (mfifoqwc << 4)) > (msize))
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@ -430,21 +431,22 @@ static __forceinline int mfifoVIF1rbTransfer()
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/* it does, so first copy 's1' bytes from 'addr' to 'data' */
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src = (u32*)PSM(vif1ch->madr);
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if (src == NULL) return -1;
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if (src == NULL) return false;
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if (vif1.vifstalled)
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ret = VIF1transfer(src + vif1.irqoffset, s1 - vif1.irqoffset, 0);
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ret = VIF1transfer(src + vif1.irqoffset, s1 - vif1.irqoffset, false);
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else
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ret = VIF1transfer(src, s1, 0);
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if (ret == -2) return ret;
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ret = VIF1transfer(src, s1, false);
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if (ret)
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{
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/* and second copy 's2' bytes from 'maddr' to '&data[s1]' */
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vif1ch->madr = maddr;
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src = (u32*)PSM(maddr);
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if (src == NULL) return -1;
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ret = VIF1transfer(src, ((mfifoqwc << 2) - s1), 0);
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if (src == NULL) return false;
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VIF1transfer(src, ((mfifoqwc << 2) - s1), false);
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}
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}
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else
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{
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@ -452,28 +454,25 @@ static __forceinline int mfifoVIF1rbTransfer()
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/* it doesn't, so just transfer 'qwc*4' words */
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src = (u32*)PSM(vif1ch->madr);
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if (src == NULL) return -1;
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if (src == NULL) return false;
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if (vif1.vifstalled)
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ret = VIF1transfer(src + vif1.irqoffset, mfifoqwc * 4 - vif1.irqoffset, 0);
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ret = VIF1transfer(src + vif1.irqoffset, mfifoqwc * 4 - vif1.irqoffset, false);
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else
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ret = VIF1transfer(src, mfifoqwc << 2, 0);
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if (ret == -2) return ret;
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ret = VIF1transfer(src, mfifoqwc << 2, false);
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}
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return ret;
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}
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static __forceinline int mfifo_VIF1chain()
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static __forceinline bool mfifo_VIF1chain()
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{
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int ret;
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bool ret;
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/* Is QWC = 0? if so there is nothing to transfer */
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if ((vif1ch->qwc == 0) && (!vif1.vifstalled))
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{
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vif1.inprogress &= ~1;
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return 0;
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return true;
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}
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if (vif1ch->madr >= dmacRegs->rbor.ADDR &&
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@ -488,13 +487,13 @@ static __forceinline int mfifo_VIF1chain()
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u32 *pMem = (u32*)dmaGetAddr(vif1ch->madr);
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SPR_LOG("Non-MFIFO Location");
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if (pMem == NULL) return -1;
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if (vif1.vifstalled)
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ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, 0);
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else
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ret = VIF1transfer(pMem, vif1ch->qwc << 2, 0);
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}
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if (pMem == NULL) return false;
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if (vif1.vifstalled)
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ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, false);
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else
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ret = VIF1transfer(pMem, vif1ch->qwc << 2, false);
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}
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return ret;
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}
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@ -507,7 +506,6 @@ void mfifoVIF1transfer(int qwc)
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{
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u32 *ptag;
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int id;
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int ret;
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g_vifCycles = 0;
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@ -535,12 +533,14 @@ void mfifoVIF1transfer(int qwc)
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if (vif1ch->chcr.TTE)
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{
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if (vif1.stallontag)
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ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on Stall
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else
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ret = VIF1transfer(ptag + 2, 2, 1); //Transfer Tag
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bool ret;
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if (ret == -2)
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if (vif1.stallontag)
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ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, true); //Transfer Tag on Stall
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else
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ret = VIF1transfer(ptag + 2, 2, true); //Transfer Tag
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if (!(ret))
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{
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VIF_LOG("MFIFO Stall on tag");
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vif1.stallontag = true;
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@ -221,8 +221,8 @@ extern "C"
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extern void dmaVIF0();
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extern void dmaVIF1();
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extern void mfifoVIF1transfer(int qwc);
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extern int VIF0transfer(u32 *data, int size, int istag);
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extern int VIF1transfer(u32 *data, int size, int istag);
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extern bool VIF0transfer(u32 *data, int size, bool istag);
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extern bool VIF1transfer(u32 *data, int size, bool istag);
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extern void vifMFIFOInterrupt();
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// --------------------------------------------------------------------------------------
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@ -43,7 +43,6 @@ __forceinline void vif0FLUSH()
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g_vifCycles += (VU0.cycle - _cycles) * BIAS;
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}
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void vif0Init()
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{
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for (u32 i = 0; i < 256; ++i)
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@ -364,7 +363,7 @@ static void Vif0CMDNull() // invalid opcode
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vif0.cmd &= ~0x7f;
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}
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int VIF0transfer(u32 *data, int size, int istag)
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bool VIF0transfer(u32 *data, int size, bool istag)
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{
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int ret;
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int transferred = vif0.vifstalled ? vif0.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman)
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@ -438,7 +437,6 @@ int VIF0transfer(u32 *data, int size, int istag)
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if (vif0.tag.size == 0) break;
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}
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}
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} //End of Transfer loop
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transferred += size - vif0.vifpacketsize;
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@ -462,7 +460,7 @@ int VIF0transfer(u32 *data, int size, int istag)
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vif0ch->qwc -= transferred;
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}
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//else Console.WriteLn("Stall on vif0, FromSPR = %x, Vif0MADR = %x Sif0MADR = %x STADR = %x", psHu32(0x1000d010), vif0ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR));
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return -2;
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return false;
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}
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vif0Regs->stat.VPS = VPS_IDLE; //Vif goes idle as the stall happened between commands;
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@ -475,15 +473,14 @@ int VIF0transfer(u32 *data, int size, int istag)
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vif0ch->qwc -= transferred;
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}
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return 0;
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return true;
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}
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int _VIF0chain()
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bool _VIF0chain()
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{
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u32 *pMem;
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u32 ret;
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if ((vif0ch->qwc == 0) && !vif0.vifstalled) return 0;
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if ((vif0ch->qwc == 0) && !vif0.vifstalled) return true;
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pMem = (u32*)dmaGetAddr(vif0ch->madr);
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if (pMem == NULL)
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@ -491,24 +488,22 @@ int _VIF0chain()
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vif0.cmd = 0;
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vif0.tag.size = 0;
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vif0ch->qwc = 0;
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return 0;
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return true;
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}
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if (vif0.vifstalled)
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ret = VIF0transfer(pMem + vif0.irqoffset, vif0ch->qwc * 4 - vif0.irqoffset, 0);
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return VIF0transfer(pMem + vif0.irqoffset, vif0ch->qwc * 4 - vif0.irqoffset, false);
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else
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ret = VIF0transfer(pMem, vif0ch->qwc * 4, 0);
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return ret;
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return VIF0transfer(pMem, vif0ch->qwc * 4, false);
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}
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int _chainVIF0()
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bool _chainVIF0()
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{
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int id, ret;
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int id;
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vif0ptag = (u32*)dmaGetAddr(vif0ch->tadr); //Set memory pointer to TADR
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if (!(Tag::Transfer("Vif0 Tag", vif0ch, vif0ptag))) return -1;
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if (!(Tag::Transfer("Vif0 Tag", vif0ch, vif0ptag))) return false;
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vif0ch->madr = vif0ptag[1]; // MADR = ADDR field
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id = Tag::Id(vif0ptag); // ID for DmaChain copied from bit 28 of the tag
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@ -520,13 +515,14 @@ int _chainVIF0()
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// Transfer dma tag if tte is set
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if (vif0ch->chcr.TTE)
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{
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if (vif0.vifstalled)
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ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, 1); //Transfer Tag on stall
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else
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ret = VIF0transfer(vif0ptag + 2, 2, 1); //Transfer Tag
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bool ret;
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if (ret == -1) return -1; //There has been an error
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if (ret == -2) return -2; //IRQ set by VIFTransfer
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if (vif0.vifstalled)
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ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, true); //Transfer Tag on stall
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else
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ret = VIF0transfer(vif0ptag + 2, 2, true); //Transfer Tag
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if (!(ret)) return false; //IRQ set by VIFTransfer
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}
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vif0.done |= hwDmacSrcChainWithStack(vif0ch, id);
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@ -534,15 +530,15 @@ int _chainVIF0()
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VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx",
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vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr);
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ret = _VIF0chain(); //Transfers the data set by the switch
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_VIF0chain(); //Transfers the data set by the switch
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if (vif0ch->chcr.TIE && Tag::IRQ(vif0ptag)) //Check TIE bit of CHCR and IRQ bit of tag
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{
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VIF_LOG("dmaIrq Set\n");
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vif0.done = true; //End Transfer
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}
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return (vif0.done) ? 1: 0; //Return Done
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return vif0.done;
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}
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void vif0Interrupt()
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@ -250,7 +250,6 @@ static int __fastcall Vif1TransDirectHL(u32 *data)
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gifRegs->stat.APATH |= GIF_APATH2;
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gifRegs->stat.OPH = true;
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if (splitptr > 0) //Leftover data from the last packet, filling the rest and sending to the GS
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{
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if ((splitptr < 4) && (vif1.vifpacketsize >= (4 - splitptr)))
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@ -574,7 +573,7 @@ void (*Vif1CMDTLB[82])() =
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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int VIF1transfer(u32 *data, int size, int istag)
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bool VIF1transfer(u32 *data, int size, bool istag)
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{
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int ret;
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int transferred = vif1.vifstalled ? vif1.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman)
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@ -669,7 +668,7 @@ int VIF1transfer(u32 *data, int size, int istag)
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if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1;
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// spiderman doesn't break on qw boundaries
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if (istag) return -2;
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if (istag) return false;
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transferred = transferred >> 2;
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vif1ch->madr += (transferred << 4);
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@ -677,7 +676,7 @@ int VIF1transfer(u32 *data, int size, int istag)
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if ((vif1ch->qwc == 0) && (vif1.irqoffset == 0)) vif1.inprogress = 0;
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//Console.WriteLn("Stall on vif1, FromSPR = %x, Vif1MADR = %x Sif0MADR = %x STADR = %x", psHu32(0x1000d010), vif1ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR));
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return -2;
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return false;
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}
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vif1Regs->stat.VPS = VPS_IDLE; //Vif goes idle as the stall happened between commands;
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@ -690,14 +689,11 @@ int VIF1transfer(u32 *data, int size, int istag)
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vif1ch->qwc -= transferred;
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}
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if (vif1Regs->stat.VGW)
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{
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vif1.vifstalled = true;
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}
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if (vif1Regs->stat.VGW) vif1.vifstalled = true;
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if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1;
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return vif1.vifstalled ? -2 : 0;
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return (!(vif1.vifstalled));
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}
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void vif1TransferFromMemory()
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@ -731,7 +727,7 @@ void vif1TransferFromMemory()
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if (size > 1)
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{
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GetMTGS().WaitGS();
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GSreadFIFO((u64*)&PS2MEM_HW[0x5000]);
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GSreadFIFO(&psHu64(VIF1_FIFO));
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}
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pMem[0] = psHu64(VIF1_FIFO);
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pMem[1] = psHu64(VIF1_FIFO + 8);
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@ -755,22 +751,21 @@ void vif1TransferFromMemory()
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vif1ch->qwc = 0;
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}
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int _VIF1chain()
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bool _VIF1chain()
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{
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u32 *pMem;
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u32 ret;
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if (vif1ch->qwc == 0)
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{
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vif1.inprogress = 0;
|
||||
return 0;
|
||||
return true;
|
||||
}
|
||||
|
||||
if (vif1.dmamode == VIF_NORMAL_FROM_MEM_MODE)
|
||||
{
|
||||
vif1TransferFromMemory();
|
||||
vif1.inprogress = 0;
|
||||
return 0;
|
||||
return true;
|
||||
}
|
||||
|
||||
pMem = (u32*)dmaGetAddr(vif1ch->madr);
|
||||
|
|
@ -779,18 +774,16 @@ int _VIF1chain()
|
|||
vif1.cmd = 0;
|
||||
vif1.tag.size = 0;
|
||||
vif1ch->qwc = 0;
|
||||
return 0;
|
||||
return true;
|
||||
}
|
||||
|
||||
VIF_LOG("VIF1chain size=%d, madr=%lx, tadr=%lx",
|
||||
vif1ch->qwc, vif1ch->madr, vif1ch->tadr);
|
||||
|
||||
if (vif1.vifstalled)
|
||||
ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, 0);
|
||||
return VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, false);
|
||||
else
|
||||
ret = VIF1transfer(pMem, vif1ch->qwc * 4, 0);
|
||||
|
||||
return ret;
|
||||
return VIF1transfer(pMem, vif1ch->qwc * 4, false);
|
||||
}
|
||||
|
||||
bool _chainVIF1()
|
||||
|
|
@ -811,7 +804,6 @@ __forceinline void vif1SetupTransfer()
|
|||
|
||||
case VIF_CHAIN_MODE:
|
||||
int id;
|
||||
int ret;
|
||||
|
||||
vif1ptag = (u32*)dmaGetAddr(vif1ch->tadr); //Set memory pointer to TADR
|
||||
|
||||
|
|
@ -841,13 +833,14 @@ __forceinline void vif1SetupTransfer()
|
|||
|
||||
if (vif1ch->chcr.TTE)
|
||||
{
|
||||
bool ret;
|
||||
|
||||
if (vif1.vifstalled)
|
||||
ret = VIF1transfer(vif1ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on stall
|
||||
ret = VIF1transfer(vif1ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, true); //Transfer Tag on stall
|
||||
else
|
||||
ret = VIF1transfer(vif1ptag + 2, 2, 1); //Transfer Tag
|
||||
ret = VIF1transfer(vif1ptag + 2, 2, true); //Transfer Tag
|
||||
|
||||
if (ret < 0 && vif1.irqoffset < 2)
|
||||
if ((ret == false) && vif1.irqoffset < 2)
|
||||
{
|
||||
vif1.inprogress = 0; //Better clear this so it has to do it again (Jak 1)
|
||||
return; //There has been an error or an interrupt
|
||||
|
|
@ -1133,7 +1126,8 @@ void vif1Write32(u32 mem, u32 value)
|
|||
//vif1Regs->stat._u32 = (vif1Regs->stat._u32 & ~VIF1_STAT_FDR) | (value & VIF1_STAT_FDR);
|
||||
if (vif1Regs->stat.FDR)
|
||||
{
|
||||
vif1Regs->stat.FQC = 1; // Hack but it checks this is true before transfer? (fatal frame)
|
||||
// Hack but it checks this is true before transfer? (fatal frame)
|
||||
vif1Regs->stat.FQC = 0x1;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue