From f11a138ce91a297661294fbdaee6b229598a7fa5 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Fri, 27 Nov 2009 13:49:37 +0000 Subject: [PATCH] Change the return values on some Vif functions. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2261 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Dump.cpp | 34 +++++++---- pcsx2/FiFo.cpp | 10 ++-- pcsx2/Gif.h | 8 +-- pcsx2/Vif.cpp | 150 +++++++++++++++++++++++----------------------- pcsx2/Vif.h | 8 +-- pcsx2/Vif0Dma.cpp | 66 ++++++++++---------- pcsx2/Vif1Dma.cpp | 68 ++++++++++----------- 7 files changed, 171 insertions(+), 173 deletions(-) diff --git a/pcsx2/Dump.cpp b/pcsx2/Dump.cpp index 1efdc064af..70f990a4af 100644 --- a/pcsx2/Dump.cpp +++ b/pcsx2/Dump.cpp @@ -144,21 +144,29 @@ void iDumpVU0Registers() // fixme: This code is outdated, broken, and lacks printed labels. // Needs heavy mods to be useful. #ifdef TEST_BROKEN_DUMP_ROUTINES - int i; - - for(i = 1; i < 32; ++i) { + for(int i = 1; i < 32; ++i) { __Log("v%d: %x %x %x %x, vi: ", i, VF_VAL(VU0.VF[i].UL[3]), VF_VAL(VU0.VF[i].UL[2]), VF_VAL(VU0.VF[i].UL[1]), VF_VAL(VU0.VF[i].UL[0])); - if( i == REG_Q || i == REG_P ) - __Log("%f\n", VU0.VI[i].F); - else if( i == REG_MAC_FLAG ) - __Log("%x\n", 0);//VU0.VI[i].UL&0xff); - else if( i == REG_STATUS_FLAG ) - __Log("%x\n", 0);//VU0.VI[i].UL&0x03); - else if( i == REG_CLIP_FLAG ) - __Log("0\n"); - else - __Log("%x\n", VU0.VI[i].UL); + + switch (i) + { + case REG_Q: + case REG_P: + __Log("%f\n", VU0.VI[i].F); + break; + case REG_MAC_FLAG: + __Log("%x\n", 0);//VU0.VI[i].UL&0xff); + break; + case REG_STATUS_FLAG: + __Log("%x\n", 0);//VU0.VI[i].UL&0x03); + break; + case REG_CLIP_FLAG: + __Log("0\n"); + break; + default: + __Log("%x\n", VU0.VI[i].UL); + break; + } } __Log("vfACC: %f %f %f %f\n", VU0.ACC.F[3], VU0.ACC.F[2], VU0.ACC.F[1], VU0.ACC.F[0]); #endif diff --git a/pcsx2/FiFo.cpp b/pcsx2/FiFo.cpp index a01a51a97e..c34b8be284 100644 --- a/pcsx2/FiFo.cpp +++ b/pcsx2/FiFo.cpp @@ -45,7 +45,7 @@ void __fastcall ReadFIFO_page_4(u32 mem, u64 *out) pxAssert( (mem >= VIF0_FIFO) && (mem < VIF1_FIFO) ); VIF_LOG("ReadFIFO/VIF0 0x%08X", mem); - + out[0] = psHu64(VIF0_FIFO); out[1] = psHu64(VIF0_FIFO + 8); } @@ -114,8 +114,8 @@ void __fastcall WriteFIFO_page_4(u32 mem, const mem128_t *value) psHu64(VIF0_FIFO + 8) = value[1]; vif0ch->qwc += 1; - int ret = VIF0transfer((u32*)value, 4, 0); - pxAssertDev( ret == 0, "vif stall code not implemented" ); + bool ret = VIF0transfer((u32*)value, 4, true); + pxAssertDev( ret, "vif stall code not implemented" ); } void __fastcall WriteFIFO_page_5(u32 mem, const mem128_t *value) @@ -133,8 +133,8 @@ void __fastcall WriteFIFO_page_5(u32 mem, const mem128_t *value) DevCon.Warning("writing to vif1 fifo when stalled"); vif1ch->qwc += 1; - int ret = VIF1transfer((u32*)value, 4, 0); - pxAssertDev( ret == 0, "vif stall code not implemented" ); + bool ret = VIF1transfer((u32*)value, 4, false); + pxAssertDev( ret, "vif stall code not implemented" ); } // Dummy GIF-TAG Packet to Guarantee Count = 1 diff --git a/pcsx2/Gif.h b/pcsx2/Gif.h index 20e4055411..76384c8702 100644 --- a/pcsx2/Gif.h +++ b/pcsx2/Gif.h @@ -126,7 +126,7 @@ union tGIF_STAT u32 reserved3 : 3; }; u32 _u32; - + tGIF_STAT(u32 val) { _u32 = val; } bool test(u32 flags) { return !!(_u32 & flags); } @@ -182,7 +182,7 @@ union tGIF_CNT u32 REGCNT : 4; u32 VUADDR : 2; u32 reserved2 : 10; - + }; u32 _u32; @@ -234,7 +234,7 @@ struct GIFregisters u32 padding1[3]; tGIF_STAT stat; u32 padding2[7]; - + tGIF_TAG0 tag0; u32 padding3[3]; tGIF_TAG1 tag1; @@ -243,7 +243,7 @@ struct GIFregisters u32 padding5[3]; u32 tag3; u32 padding6[3]; - + tGIF_CNT cnt; u32 padding7[3]; tGIF_P3CNT p3cnt; diff --git a/pcsx2/Vif.cpp b/pcsx2/Vif.cpp index 877d221773..e97744c69f 100644 --- a/pcsx2/Vif.cpp +++ b/pcsx2/Vif.cpp @@ -1,6 +1,6 @@ /* PCSX2 - PS2 Emulator for PCs * Copyright (C) 2002-2009 PCSX2 Dev Team - * + * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- * ation, either version 3 of the License, or (at your option) any later version. @@ -131,7 +131,7 @@ static __releaseinline void writeXYZW(u32 offnum, u32 &dest, u32 data) { int n; u32 vifRowReg = getVifRowRegs(offnum); - + if (vifRegs->code & 0x10000000) { switch (vif->cl) @@ -139,7 +139,7 @@ static __releaseinline void writeXYZW(u32 offnum, u32 &dest, u32 data) case 0: if (offnum == OFFSET_X) n = (vifRegs->mask) & 0x3; - else + else n = (vifRegs->mask >> (offnum * 2)) & 0x3; break; case 1: @@ -210,8 +210,8 @@ void __fastcall UNPACK_V2(u32 *dest, T *data, int size) size--; } } - - if (vifRegs->offset == OFFSET_Y) + + if (vifRegs->offset == OFFSET_Y) { if (size > 0) { @@ -220,13 +220,13 @@ void __fastcall UNPACK_V2(u32 *dest, T *data, int size) size--; } } - + if (vifRegs->offset == OFFSET_Z) { writeXYZW(vifRegs->offset, *dest++, *dest-2); vifRegs->offset = OFFSET_W; } - + if (vifRegs->offset == OFFSET_W) { writeXYZW(vifRegs->offset, *dest, *data); @@ -246,8 +246,8 @@ void __fastcall UNPACK_V3(u32 *dest, T *data, int size) size--; } } - - if(vifRegs->offset == OFFSET_Y) + + if(vifRegs->offset == OFFSET_Y) { if (size > 0) { @@ -256,7 +256,7 @@ void __fastcall UNPACK_V3(u32 *dest, T *data, int size) size--; } } - + if(vifRegs->offset == OFFSET_Z) { if (size > 0) @@ -266,7 +266,7 @@ void __fastcall UNPACK_V3(u32 *dest, T *data, int size) size--; } } - + if(vifRegs->offset == OFFSET_W) { //V3-# does some bizzare thing with alignment, every 6qw of data the W becomes 0 (strange console!) @@ -281,7 +281,7 @@ void __fastcall UNPACK_V4(u32 *dest, T *data , int size) { while (size > 0) { - writeXYZW(vifRegs->offset, *dest++, *data++); + writeXYZW(vifRegs->offset, *dest++, *data++); vifRegs->offset++; size--; } @@ -298,20 +298,20 @@ void __fastcall UNPACK_V4_5(u32 *dest, u32 *data, int size) writeXYZW(OFFSET_W, *dest, ((*data & 0x8000) >> 8)); } -void __fastcall UNPACK_S_32(u32 *dest, u32 *data, int size) +void __fastcall UNPACK_S_32(u32 *dest, u32 *data, int size) { - UNPACK_S(dest, data, size); + UNPACK_S(dest, data, size); } -void __fastcall UNPACK_S_16s(u32 *dest, u32 *data, int size) -{ - s16 *sdata = (s16*)data; - UNPACK_S(dest, sdata, size); +void __fastcall UNPACK_S_16s(u32 *dest, u32 *data, int size) +{ + s16 *sdata = (s16*)data; + UNPACK_S(dest, sdata, size); } -void __fastcall UNPACK_S_16u(u32 *dest, u32 *data, int size) +void __fastcall UNPACK_S_16u(u32 *dest, u32 *data, int size) { - u16 *sdata = (u16*)data; + u16 *sdata = (u16*)data; UNPACK_S(dest, sdata, size); } @@ -414,12 +414,13 @@ void __fastcall UNPACK_V4_8u(u32 *dest, u32 *data, int size) UNPACK_V4(dest, cdata, size); } -static __forceinline int mfifoVIF1rbTransfer() +static __forceinline bool mfifoVIF1rbTransfer() { u32 maddr = dmacRegs->rbor.ADDR; - u32 ret, msize = dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK + 16; + u32 msize = dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK + 16; u16 mfifoqwc = std::min(vif1ch->qwc, vifqwc); u32 *src; + bool ret; /* Check if the transfer should wrap around the ring buffer */ if ((vif1ch->madr + (mfifoqwc << 4)) > (msize)) @@ -430,21 +431,22 @@ static __forceinline int mfifoVIF1rbTransfer() /* it does, so first copy 's1' bytes from 'addr' to 'data' */ src = (u32*)PSM(vif1ch->madr); - if (src == NULL) return -1; - + if (src == NULL) return false; + if (vif1.vifstalled) - ret = VIF1transfer(src + vif1.irqoffset, s1 - vif1.irqoffset, 0); + ret = VIF1transfer(src + vif1.irqoffset, s1 - vif1.irqoffset, false); else - ret = VIF1transfer(src, s1, 0); - - if (ret == -2) return ret; + ret = VIF1transfer(src, s1, false); - /* and second copy 's2' bytes from 'maddr' to '&data[s1]' */ - vif1ch->madr = maddr; + if (ret) + { + /* and second copy 's2' bytes from 'maddr' to '&data[s1]' */ + vif1ch->madr = maddr; - src = (u32*)PSM(maddr); - if (src == NULL) return -1; - ret = VIF1transfer(src, ((mfifoqwc << 2) - s1), 0); + src = (u32*)PSM(maddr); + if (src == NULL) return false; + VIF1transfer(src, ((mfifoqwc << 2) - s1), false); + } } else { @@ -452,28 +454,25 @@ static __forceinline int mfifoVIF1rbTransfer() /* it doesn't, so just transfer 'qwc*4' words */ src = (u32*)PSM(vif1ch->madr); - if (src == NULL) return -1; - - if (vif1.vifstalled) - ret = VIF1transfer(src + vif1.irqoffset, mfifoqwc * 4 - vif1.irqoffset, 0); - else - ret = VIF1transfer(src, mfifoqwc << 2, 0); - - if (ret == -2) return ret; - } + if (src == NULL) return false; + if (vif1.vifstalled) + ret = VIF1transfer(src + vif1.irqoffset, mfifoqwc * 4 - vif1.irqoffset, false); + else + ret = VIF1transfer(src, mfifoqwc << 2, false); + } return ret; } -static __forceinline int mfifo_VIF1chain() +static __forceinline bool mfifo_VIF1chain() { - int ret; - + bool ret; + /* Is QWC = 0? if so there is nothing to transfer */ if ((vif1ch->qwc == 0) && (!vif1.vifstalled)) { vif1.inprogress &= ~1; - return 0; + return true; } if (vif1ch->madr >= dmacRegs->rbor.ADDR && @@ -488,13 +487,13 @@ static __forceinline int mfifo_VIF1chain() u32 *pMem = (u32*)dmaGetAddr(vif1ch->madr); SPR_LOG("Non-MFIFO Location"); - if (pMem == NULL) return -1; - if (vif1.vifstalled) - ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, 0); - else - ret = VIF1transfer(pMem, vif1ch->qwc << 2, 0); - } + if (pMem == NULL) return false; + if (vif1.vifstalled) + ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, false); + else + ret = VIF1transfer(pMem, vif1ch->qwc << 2, false); + } return ret; } @@ -507,7 +506,6 @@ void mfifoVIF1transfer(int qwc) { u32 *ptag; int id; - int ret; g_vifCycles = 0; @@ -525,7 +523,7 @@ void mfifoVIF1transfer(int qwc) vif1Regs->stat.FQC = 0x10; // FQC=16 } vif1.inprogress &= ~0x10; - + return; } @@ -535,21 +533,23 @@ void mfifoVIF1transfer(int qwc) if (vif1ch->chcr.TTE) { + bool ret; + if (vif1.stallontag) - ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on Stall - else - ret = VIF1transfer(ptag + 2, 2, 1); //Transfer Tag - - if (ret == -2) + ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, true); //Transfer Tag on Stall + else + ret = VIF1transfer(ptag + 2, 2, true); //Transfer Tag + + if (!(ret)) { - VIF_LOG("MFIFO Stallon tag"); + VIF_LOG("MFIFO Stall on tag"); vif1.stallontag = true; return; //IRQ set by VIFTransfer } } - + Tag::UnsafeTransfer(vif1ch, ptag); - + vif1ch->madr = ptag[1]; id =Tag::Id(ptag); vifqwc--; @@ -599,30 +599,30 @@ void mfifoVIF1transfer(int qwc) vif1.done = true; } } - + vif1.inprogress |= 1; - + SPR_LOG("mfifoVIF1transfer end %x madr %x, tadr %x vifqwc %x", vif1ch->chcr._u32, vif1ch->madr, vif1ch->tadr, vifqwc); } void vifMFIFOInterrupt() { g_vifCycles = 0; - + if (schedulepath3msk) Vif1MskPath3(); if ((vif1Regs->stat.VGW)) { if (gif->chcr.STR) - { + { CPU_INT(10, 16); return; - } - else + } + else { vif1Regs->stat.VGW = false; } - + } if ((spr0->chcr.STR) && (spr0->qwc == 0)) @@ -636,7 +636,7 @@ void vifMFIFOInterrupt() vif1Regs->stat.INT = true; hwIntcIrq(INTC_VIF1); --vif1.irq; - + if (vif1Regs->stat.test(VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) { vif1Regs->stat.FQC = 0; // FQC=0 @@ -644,7 +644,7 @@ void vifMFIFOInterrupt() return; } } - + if (vif1.done == false || vif1ch->qwc) { switch(vif1.inprogress & 1) @@ -667,15 +667,15 @@ void vifMFIFOInterrupt() CPU_INT(10, vif1ch->qwc * BIAS); return; - + case 1: //Transfer data - mfifo_VIF1chain(); + mfifo_VIF1chain(); CPU_INT(10, 0); return; } return; - } - + } + /*if (vifqwc <= 0) { //Console.WriteLn("Empty 2"); diff --git a/pcsx2/Vif.h b/pcsx2/Vif.h index 5d1ff7ff7e..35ce1f688d 100644 --- a/pcsx2/Vif.h +++ b/pcsx2/Vif.h @@ -1,6 +1,6 @@ /* PCSX2 - PS2 Emulator for PCs * Copyright (C) 2002-2009 PCSX2 Dev Team - * + * * PCSX2 is free software: you can redistribute it and/or modify it under the terms * of the GNU Lesser General Public License as published by the Free Software Found- * ation, either version 3 of the License, or (at your option) any later version. @@ -103,7 +103,7 @@ union tVIF_STAT { u32 FQC : 5; // Amount of data. Up to 8 qwords on Vif0, 16 on Vif1. }; u32 _u32; - + tVIF_STAT(u32 val) { _u32 = val; } bool test(u32 flags) { return !!(_u32 & flags); } @@ -221,8 +221,8 @@ extern "C" extern void dmaVIF0(); extern void dmaVIF1(); extern void mfifoVIF1transfer(int qwc); -extern int VIF0transfer(u32 *data, int size, int istag); -extern int VIF1transfer(u32 *data, int size, int istag); +extern bool VIF0transfer(u32 *data, int size, bool istag); +extern bool VIF1transfer(u32 *data, int size, bool istag); extern void vifMFIFOInterrupt(); // -------------------------------------------------------------------------------------- diff --git a/pcsx2/Vif0Dma.cpp b/pcsx2/Vif0Dma.cpp index 86e49a317d..b550268b60 100644 --- a/pcsx2/Vif0Dma.cpp +++ b/pcsx2/Vif0Dma.cpp @@ -43,7 +43,6 @@ __forceinline void vif0FLUSH() g_vifCycles += (VU0.cycle - _cycles) * BIAS; } - void vif0Init() { for (u32 i = 0; i < 256; ++i) @@ -136,7 +135,7 @@ static int __fastcall Vif0TransSTRow(u32 *data) // STROW pxAssert(vif0.tag.addr < 4); ret = min(4 - vif0.tag.addr, vif0.vifpacketsize); pxAssert(ret > 0); - + switch (ret) { case 4: @@ -155,7 +154,7 @@ static int __fastcall Vif0TransSTRow(u32 *data) // STROW jNO_DEFAULT } - + vif0.tag.addr += ret; vif0.tag.size -= ret; if (vif0.tag.size == 0) vif0.cmd = 0; @@ -170,7 +169,7 @@ static int __fastcall Vif0TransSTCol(u32 *data) // STCOL u32* pmem = &vif0Regs->c0 + (vif0.tag.addr << 2); u32* pmem2 = g_vifmask.Col0 + vif0.tag.addr; ret = min(4 - vif0.tag.addr, vif0.vifpacketsize); - + switch (ret) { case 4: @@ -189,7 +188,7 @@ static int __fastcall Vif0TransSTCol(u32 *data) // STCOL jNO_DEFAULT } - + vif0.tag.addr += ret; vif0.tag.size -= ret; if (vif0.tag.size == 0) vif0.cmd = 0; @@ -364,7 +363,7 @@ static void Vif0CMDNull() // invalid opcode vif0.cmd &= ~0x7f; } -int VIF0transfer(u32 *data, int size, int istag) +bool VIF0transfer(u32 *data, int size, bool istag) { int ret; int transferred = vif0.vifstalled ? vif0.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman) @@ -438,7 +437,6 @@ int VIF0transfer(u32 *data, int size, int istag) if (vif0.tag.size == 0) break; } } - } //End of Transfer loop transferred += size - vif0.vifpacketsize; @@ -462,7 +460,7 @@ int VIF0transfer(u32 *data, int size, int istag) vif0ch->qwc -= transferred; } //else Console.WriteLn("Stall on vif0, FromSPR = %x, Vif0MADR = %x Sif0MADR = %x STADR = %x", psHu32(0x1000d010), vif0ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR)); - return -2; + return false; } vif0Regs->stat.VPS = VPS_IDLE; //Vif goes idle as the stall happened between commands; @@ -475,15 +473,14 @@ int VIF0transfer(u32 *data, int size, int istag) vif0ch->qwc -= transferred; } - return 0; + return true; } -int _VIF0chain() +bool _VIF0chain() { u32 *pMem; - u32 ret; - if ((vif0ch->qwc == 0) && !vif0.vifstalled) return 0; + if ((vif0ch->qwc == 0) && !vif0.vifstalled) return true; pMem = (u32*)dmaGetAddr(vif0ch->madr); if (pMem == NULL) @@ -491,24 +488,22 @@ int _VIF0chain() vif0.cmd = 0; vif0.tag.size = 0; vif0ch->qwc = 0; - return 0; + return true; } if (vif0.vifstalled) - ret = VIF0transfer(pMem + vif0.irqoffset, vif0ch->qwc * 4 - vif0.irqoffset, 0); + return VIF0transfer(pMem + vif0.irqoffset, vif0ch->qwc * 4 - vif0.irqoffset, false); else - ret = VIF0transfer(pMem, vif0ch->qwc * 4, 0); - - return ret; + return VIF0transfer(pMem, vif0ch->qwc * 4, false); } -int _chainVIF0() +bool _chainVIF0() { - int id, ret; + int id; vif0ptag = (u32*)dmaGetAddr(vif0ch->tadr); //Set memory pointer to TADR - if (!(Tag::Transfer("Vif0 Tag", vif0ch, vif0ptag))) return -1; + if (!(Tag::Transfer("Vif0 Tag", vif0ch, vif0ptag))) return false; vif0ch->madr = vif0ptag[1]; // MADR = ADDR field id = Tag::Id(vif0ptag); // ID for DmaChain copied from bit 28 of the tag @@ -520,13 +515,14 @@ int _chainVIF0() // Transfer dma tag if tte is set if (vif0ch->chcr.TTE) { - if (vif0.vifstalled) - ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, 1); //Transfer Tag on stall - else - ret = VIF0transfer(vif0ptag + 2, 2, 1); //Transfer Tag + bool ret; - if (ret == -1) return -1; //There has been an error - if (ret == -2) return -2; //IRQ set by VIFTransfer + if (vif0.vifstalled) + ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, true); //Transfer Tag on stall + else + ret = VIF0transfer(vif0ptag + 2, 2, true); //Transfer Tag + + if (!(ret)) return false; //IRQ set by VIFTransfer } vif0.done |= hwDmacSrcChainWithStack(vif0ch, id); @@ -534,15 +530,15 @@ int _chainVIF0() VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx", vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr); - ret = _VIF0chain(); //Transfers the data set by the switch + _VIF0chain(); //Transfers the data set by the switch - if (vif0ch->chcr.TIE && Tag::IRQ(vif0ptag)) //Check TIE bit of CHCR and IRQ bit of tag + if (vif0ch->chcr.TIE && Tag::IRQ(vif0ptag)) //Check TIE bit of CHCR and IRQ bit of tag { VIF_LOG("dmaIrq Set\n"); - - vif0.done = true; //End Transfer + vif0.done = true; //End Transfer } - return (vif0.done) ? 1: 0; //Return Done + + return vif0.done; } void vif0Interrupt() @@ -655,7 +651,7 @@ void dmaVIF0() if (_VIF0chain() == -2) { Console.WriteLn("Stall on normal %x", vif0Regs->stat._u32); - + vif0.vifstalled = true; return; } @@ -688,7 +684,7 @@ void vif0Write32(u32 mem, u32 value) if (value & 0x1) // Reset Vif. { //Console.WriteLn("Vif0 Reset %x", vif0Regs->stat._u32); - + memzero(vif0); vif0ch->qwc = 0; //? cpuRegs.interrupt &= ~1; //Stop all vif0 DMA's @@ -785,13 +781,13 @@ void vif0Reset() memzero(vif0); memzero(*vif0Regs); SetNewMask(g_vif0Masks, g_vif0HasMask3, 0, 0xffffffff); - + psHu64(VIF0_FIFO) = 0; psHu64(VIF0_FIFO + 8) = 0; vif0Regs->stat.VPS = VPS_IDLE; vif0Regs->stat.FQC = 0; - + vif0.done = true; } diff --git a/pcsx2/Vif1Dma.cpp b/pcsx2/Vif1Dma.cpp index e64054a244..12503e3a61 100644 --- a/pcsx2/Vif1Dma.cpp +++ b/pcsx2/Vif1Dma.cpp @@ -73,7 +73,7 @@ static __forceinline void vif1UNPACK(u32 *data) vif1.cmd &= ~0x7f; return; } - + //vif1FLUSH(); vif1.usn = (vif1Regs->code >> 14) & 0x1; @@ -153,7 +153,7 @@ static int __fastcall Vif1TransSTRow(u32 *data) // STROW pxAssert(vif1.tag.addr < 4); ret = min(4 - vif1.tag.addr, vif1.vifpacketsize); pxAssert(ret > 0); - + switch (ret) { case 4: @@ -171,7 +171,7 @@ static int __fastcall Vif1TransSTRow(u32 *data) // STROW break; jNO_DEFAULT; } - + vif1.tag.addr += ret; vif1.tag.size -= ret; if (vif1.tag.size == 0) vif1.cmd = 0; @@ -250,7 +250,6 @@ static int __fastcall Vif1TransDirectHL(u32 *data) gifRegs->stat.APATH |= GIF_APATH2; gifRegs->stat.OPH = true; - if (splitptr > 0) //Leftover data from the last packet, filling the rest and sending to the GS { if ((splitptr < 4) && (vif1.vifpacketsize >= (4 - splitptr))) @@ -278,7 +277,7 @@ static int __fastcall Vif1TransDirectHL(u32 *data) splitptr = 0; return ret; } - + if (vif1.vifpacketsize < vif1.tag.size) { if (vif1.vifpacketsize < 4 && splitptr != 4) //Not a full QW left in the buffer, saving left over data @@ -341,7 +340,7 @@ static int __fastcall Vif1TransUnpack(u32 *data) ProcessMemSkip<1>(vif1.vifpacketsize << 2, (vif1.cmd & 0xf)); vif1.tag.size -= vif1.vifpacketsize; } - + XMMRegisters::Thaw(); return vif1.vifpacketsize; } @@ -360,7 +359,7 @@ static int __fastcall Vif1TransUnpack(u32 *data) /* we got all the data, transfer it fully */ VIFunpack<1>(data, &vif1.tag, vif1.tag.size); } - + vif1.tag.size = 0; vif1.cmd = 0; XMMRegisters::Thaw(); @@ -574,7 +573,7 @@ void (*Vif1CMDTLB[82])() = }; //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -int VIF1transfer(u32 *data, int size, int istag) +bool VIF1transfer(u32 *data, int size, bool istag) { int ret; int transferred = vif1.vifstalled ? vif1.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman) @@ -610,7 +609,7 @@ int VIF1transfer(u32 *data, int size, int istag) vif1.cmd = (data[0] >> 24); vif1Regs->code = data[0]; vif1Regs->stat.VPS |= VPS_DECODING; - + if ((vif1.cmd & 0x60) == 0x60) { vif1UNPACK(data); @@ -669,7 +668,7 @@ int VIF1transfer(u32 *data, int size, int istag) if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1; // spiderman doesn't break on qw boundaries - if (istag) return -2; + if (istag) return false; transferred = transferred >> 2; vif1ch->madr += (transferred << 4); @@ -677,7 +676,7 @@ int VIF1transfer(u32 *data, int size, int istag) if ((vif1ch->qwc == 0) && (vif1.irqoffset == 0)) vif1.inprogress = 0; //Console.WriteLn("Stall on vif1, FromSPR = %x, Vif1MADR = %x Sif0MADR = %x STADR = %x", psHu32(0x1000d010), vif1ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR)); - return -2; + return false; } vif1Regs->stat.VPS = VPS_IDLE; //Vif goes idle as the stall happened between commands; @@ -690,14 +689,11 @@ int VIF1transfer(u32 *data, int size, int istag) vif1ch->qwc -= transferred; } - if (vif1Regs->stat.VGW) - { - vif1.vifstalled = true; - } + if (vif1Regs->stat.VGW) vif1.vifstalled = true; if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1; - return vif1.vifstalled ? -2 : 0; + return (!(vif1.vifstalled)); } void vif1TransferFromMemory() @@ -711,7 +707,7 @@ void vif1TransferFromMemory() Console.WriteLn("Vif1 Tag BUSERR"); dmacRegs->stat.BEIS = true; //Bus Error vif1Regs->stat.FQC = 0; - + vif1ch->qwc = 0; vif1.done = true; CPU_INT(1, 0); @@ -731,7 +727,7 @@ void vif1TransferFromMemory() if (size > 1) { GetMTGS().WaitGS(); - GSreadFIFO((u64*)&PS2MEM_HW[0x5000]); + GSreadFIFO(&psHu64(VIF1_FIFO)); } pMem[0] = psHu64(VIF1_FIFO); pMem[1] = psHu64(VIF1_FIFO + 8); @@ -755,22 +751,21 @@ void vif1TransferFromMemory() vif1ch->qwc = 0; } -int _VIF1chain() +bool _VIF1chain() { u32 *pMem; - u32 ret; if (vif1ch->qwc == 0) { vif1.inprogress = 0; - return 0; + return true; } if (vif1.dmamode == VIF_NORMAL_FROM_MEM_MODE) { vif1TransferFromMemory(); vif1.inprogress = 0; - return 0; + return true; } pMem = (u32*)dmaGetAddr(vif1ch->madr); @@ -779,18 +774,16 @@ int _VIF1chain() vif1.cmd = 0; vif1.tag.size = 0; vif1ch->qwc = 0; - return 0; + return true; } VIF_LOG("VIF1chain size=%d, madr=%lx, tadr=%lx", vif1ch->qwc, vif1ch->madr, vif1ch->tadr); if (vif1.vifstalled) - ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, 0); + return VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, false); else - ret = VIF1transfer(pMem, vif1ch->qwc * 4, 0); - - return ret; + return VIF1transfer(pMem, vif1ch->qwc * 4, false); } bool _chainVIF1() @@ -811,7 +804,6 @@ __forceinline void vif1SetupTransfer() case VIF_CHAIN_MODE: int id; - int ret; vif1ptag = (u32*)dmaGetAddr(vif1ch->tadr); //Set memory pointer to TADR @@ -841,13 +833,14 @@ __forceinline void vif1SetupTransfer() if (vif1ch->chcr.TTE) { + bool ret; if (vif1.vifstalled) - ret = VIF1transfer(vif1ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on stall + ret = VIF1transfer(vif1ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, true); //Transfer Tag on stall else - ret = VIF1transfer(vif1ptag + 2, 2, 1); //Transfer Tag + ret = VIF1transfer(vif1ptag + 2, 2, true); //Transfer Tag - if (ret < 0 && vif1.irqoffset < 2) + if ((ret == false) && vif1.irqoffset < 2) { vif1.inprogress = 0; //Better clear this so it has to do it again (Jak 1) return; //There has been an error or an interrupt @@ -885,7 +878,7 @@ __forceinline void vif1Interrupt() CPU_INT(1, gif->qwc * BIAS); return; } - else + else { vif1Regs->stat.VGW = false; } @@ -1092,7 +1085,7 @@ void vif1Write32(u32 mem, u32 value) //Console.WriteLn("MFIFO Stall"); CPU_INT(10, vif1ch->qwc * BIAS); break; - + case NO_MFD: case MFD_RESERVED: case MFD_GIF: // Wonder if this should be with VIF? @@ -1133,7 +1126,8 @@ void vif1Write32(u32 mem, u32 value) //vif1Regs->stat._u32 = (vif1Regs->stat._u32 & ~VIF1_STAT_FDR) | (value & VIF1_STAT_FDR); if (vif1Regs->stat.FDR) { - vif1Regs->stat.FQC = 1; // Hack but it checks this is true before transfer? (fatal frame) + // Hack but it checks this is true before transfer? (fatal frame) + vif1Regs->stat.FQC = 0x1; } else { @@ -1179,13 +1173,13 @@ void vif1Reset() memzero(vif1); memzero(*vif1Regs); SetNewMask(g_vif1Masks, g_vif1HasMask3, 0, 0xffffffff); - + psHu64(VIF1_FIFO) = 0; psHu64(VIF1_FIFO + 8) = 0; - + vif1Regs->stat.VPS = VPS_IDLE; vif1Regs->stat.FQC = 0; // FQC=0 - + vif1.done = true; cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's }