wxgui: sync with trunk (boooring)

git-svn-id: http://pcsx2.googlecode.com/svn/branches/wxgui@1660 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-08-20 16:19:33 +00:00 · 2009-08-20 16:19:33 +00:00 · e25db2a0ba
parent 4b320294fc cd5934fb57
commit e25db2a0ba
97 changed files with 4752 additions and 3183 deletions
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@ -1,12 +1,12 @@
-- clean_msvc.cmd
+:: clean_msvc.cmd
--
+::
-- This batch file cleans up some files that MSVC's Clean/Rebuild commands tend to miss.
+:: This batch file cleans up some files that MSVC's Clean/Rebuild commands tend to miss.
-- In particular the .ilk and .pdb files are known to get corrupted and cause all sorts of odd
+:: In particular the .ilk and .pdb files are known to get corrupted and cause all sorts of odd
-- linker errors, and the .ncb files can also get corrupted and cause intellisense breakges.
+:: linker errors, and the .ncb files can also get corrupted and cause intellisense breakges.
--
+::
-- Safety: This tool should be pretty safe.  None of the files it deletes are important.  That
+:: Safety: This tool should be pretty safe.  None of the files it deletes are important.  That
-- is, they're all files MSVC just rebuilds automatically next time you run/recompile.  But even
+:: is, they're all files MSVC just rebuilds automatically next time you run/recompile.  But even
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+:: so, don't go running this batch file in your root c:\ folder.  It's probably not a wise action.
-- Enjoy. :)
+:: Enjoy. :)
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--- a/common/include/x86emitter/implement/group3.h
+++ b/common/include/x86emitter/implement/group3.h
@ -92,7 +92,7 @@ class xImpl_iMul : public ImplMulDivBase<G3Type_iMUL,0x59>
 	{
 		xOpWrite0F( (sizeof(ImmType) == 2) ? 0x66 : 0, is_s8( imm8 ) ? 0x6b : 0x69, param1, param2 );
 		if( is_s8( imm8 ) )
-			xWrite8( imm8 );
+			xWrite8( (u8)imm8 );
 		else
 			xWrite<ImmType>( imm8 );
 	}
--- a/common/src/x86emitter/cpudetect.cpp
+++ b/common/src/x86emitter/cpudetect.cpp
@ -95,7 +95,7 @@ static void SetSingleAffinity()
 		if( availProcCpus & (1<<i) ) break;
 	}
-	HANDLE s_threadId = GetCurrentThread();
+	s_threadId = GetCurrentThread();
 	s_oldmask = SetThreadAffinityMask( s_threadId, (1UL<<i) );
 	if( s_oldmask == ERROR_INVALID_PARAMETER )
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 <Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ImportGroup Label="PropertySheets" />
  <PropertyGroup Label="UserMacros" />
  <PropertyGroup>
    <_PropertySheetDisplayName>debug</_PropertySheetDisplayName>
    <LinkIncremental>true</LinkIncremental>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <Optimization>Disabled</Optimization>
      <PreprocessorDefinitions>PCSX2_DEBUG;PCSX2_DEVBUILD;_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <RuntimeLibrary>MultiThreadedDebugDLL</RuntimeLibrary>
      <BufferSecurityCheck>true</BufferSecurityCheck>
    </ClCompile>
  </ItemDefinitionGroup>
  <ItemGroup />
 </Project>
--- a/common/vsprops/devel.props
+++ b/common/vsprops/devel.props
@ -0,0 +1,23 @@
 <Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ImportGroup Label="PropertySheets" />
  <PropertyGroup Label="UserMacros" />
  <PropertyGroup>
    <_PropertySheetDisplayName>devel</_PropertySheetDisplayName>
    <LinkIncremental>true</LinkIncremental>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <Optimization>MaxSpeed</Optimization>
      <InlineFunctionExpansion>AnySuitable</InlineFunctionExpansion>
      <FavorSizeOrSpeed>Speed</FavorSizeOrSpeed>
      <PreprocessorDefinitions>PCSX2_DEVBUILD;NDEBUG;_SECURE_SCL=0;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <StringPooling>true</StringPooling>
      <RuntimeLibrary>MultiThreadedDLL</RuntimeLibrary>
      <BufferSecurityCheck>false</BufferSecurityCheck>
      <FloatingPointModel>Fast</FloatingPointModel>
      <FloatingPointExceptions>false</FloatingPointExceptions>
    </ClCompile>
    <Link />
  </ItemDefinitionGroup>
  <ItemGroup />
 </Project>
--- a/common/vsprops/lib.props
+++ b/common/vsprops/lib.props
@ -0,0 +1,18 @@
 <Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ImportGroup Label="PropertySheets" />
  <PropertyGroup Label="UserMacros" />
  <PropertyGroup>
    <_PropertySheetDisplayName>lib</_PropertySheetDisplayName>
    <OutDir>$(SolutionDir)deps\$(Platform)\$(Configuration)\</OutDir>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <Link>
      <ImportLibrary>
      </ImportLibrary>
    </Link>
    <ClCompile>
      <PreprocessorDefinitions>_LIB;%(PreprocessorDefinitions)</PreprocessorDefinitions>
    </ClCompile>
  </ItemDefinitionGroup>
  <ItemGroup />
 </Project>
--- a/common/vsprops/plugin.props
+++ b/common/vsprops/plugin.props
@ -0,0 +1,18 @@
 <Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ImportGroup Label="PropertySheets" />
  <PropertyGroup Label="UserMacros">
    <PcsxSubsection>plugins\</PcsxSubsection>
  </PropertyGroup>
  <PropertyGroup>
    <_PropertySheetDisplayName>plugin</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <Link>
      <ImportLibrary>
      </ImportLibrary>
    </Link>
    <ClCompile>
    </ClCompile>
  </ItemDefinitionGroup>
  <ItemGroup />
 </Project>
--- a/plugins/CDVDolio/vsprops/release.props
+++ b/plugins/CDVDolio/vsprops/release.props
@ -1,4 +1,6 @@
-<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+<Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ImportGroup Label="PropertySheets" />
  <PropertyGroup Label="UserMacros" />
  <PropertyGroup>
    <_PropertySheetDisplayName>release</_PropertySheetDisplayName>
    <LinkIncremental>false</LinkIncremental>
@ -7,7 +9,6 @@
    <ClCompile>
      <Optimization>MaxSpeed</Optimization>
      <InlineFunctionExpansion>AnySuitable</InlineFunctionExpansion>
      <IntrinsicFunctions>true</IntrinsicFunctions>
      <FavorSizeOrSpeed>Speed</FavorSizeOrSpeed>
      <OmitFramePointers>true</OmitFramePointers>
      <WholeProgramOptimization>true</WholeProgramOptimization>
@ -15,10 +16,16 @@
      <StringPooling>true</StringPooling>
      <RuntimeLibrary>MultiThreadedDLL</RuntimeLibrary>
      <BufferSecurityCheck>false</BufferSecurityCheck>
      <FloatingPointModel>Fast</FloatingPointModel>
      <FloatingPointExceptions>false</FloatingPointExceptions>
    </ClCompile>
    <Link>
      <OptimizeReferences>true</OptimizeReferences>
      <EnableCOMDATFolding>true</EnableCOMDATFolding>
    </Link>
    <Lib>
      <LinkTimeCodeGeneration>true</LinkTimeCodeGeneration>
    </Lib>
  </ItemDefinitionGroup>
  <ItemGroup />
 </Project>
--- a/plugins/GSdx/vsprops/sse2.props
+++ b/plugins/GSdx/vsprops/sse2.props
--- a/plugins/GSdx/vsprops/sse4.props
+++ b/plugins/GSdx/vsprops/sse4.props
--- a/plugins/GSdx/vsprops/ssse3.props
+++ b/plugins/GSdx/vsprops/ssse3.props
@ -3,7 +3,7 @@
    <SSEtype>SSSE3</SSEtype>
  </PropertyGroup>
  <PropertyGroup>
-    <_PropertySheetDisplayName>sse3</_PropertySheetDisplayName>
+    <_PropertySheetDisplayName>ssse3</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
--- a/pcsx2/CDVD/CDVD.cpp
+++ b/pcsx2/CDVD/CDVD.cpp
@ -1101,8 +1101,9 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND
 		break;
 		case N_CD_READ: // CdRead
-			cdvd.SeekToSector = *(uint*)(cdvd.Param+0);
+			// Assign the seek to sector based on cdvd.Param[0]-[3], and the number of  sectors based on cdvd.Param[4]-[7].
-			cdvd.nSectors = *(int*)(cdvd.Param+4);
+			cdvd.SeekToSector =  *(u32*) (cdvd.Param+0); 
 			cdvd.nSectors =  *(u32*)(cdvd.Param+4);
 			cdvd.RetryCnt = (cdvd.Param[8] == 0) ? 0x100 : cdvd.Param[8];
 			cdvd.SpindlCtrl = cdvd.Param[9];
 			cdvd.Speed = 24;
@ -1136,8 +1137,9 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND
 		case N_CD_READ_CDDA: // CdReadCDDA
 		case N_CD_READ_XCDDA: // CdReadXCDDA
-			cdvd.SeekToSector = *(int*)(cdvd.Param+0);
+			// Assign the seek to sector based on cdvd.Param[0]-[3], and the number of  sectors based on cdvd.Param[4]-[7].
-			cdvd.nSectors = *(int*)(cdvd.Param+4);
+			cdvd.SeekToSector =  *(u32*) (cdvd.Param+0); 
 			cdvd.nSectors =  *(u32*)(cdvd.Param+4);
 			if (cdvd.Param[8] == 0) 
 				cdvd.RetryCnt = 0x100;
@ -1182,8 +1184,9 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND
 		break;
 		case N_DVD_READ: // DvdRead
-			cdvd.SeekToSector   = *(int*)(cdvd.Param+0);
+			// Assign the seek to sector based on cdvd.Param[0]-[3], and the number of  sectors based on cdvd.Param[4]-[7].
-			cdvd.nSectors = *(int*)(cdvd.Param+4);
+			cdvd.SeekToSector =  *(u32*) (cdvd.Param+0); 
 			cdvd.nSectors =  *(u32*)(cdvd.Param+4);
 			if (cdvd.Param[8] == 0) 
 				cdvd.RetryCnt = 0x100;
--- a/pcsx2/CDVD/CDVDaccess.cpp
+++ b/pcsx2/CDVD/CDVDaccess.cpp
@ -476,7 +476,7 @@ s32 CALLBACK NODISCdummyS32()
 	return 0;
 }
-void CALLBACK NODISCnewDiskCB(void(CALLBACK*)())
+void CALLBACK NODISCnewDiskCB(__unused void (*callback)())
 {
 }
--- a/pcsx2/CDVD/CDVDisoReader.cpp
+++ b/pcsx2/CDVD/CDVDisoReader.cpp
@ -387,7 +387,7 @@ void CALLBACK ISOnewDiskCB(void(CALLBACK*)())
 {
 }
-wxString ISOgetUniqueFilename()
+wxString ISOgetUniqueFilename(__unused void (*callback)())
 {
 	return Path::GetFilenameWithoutExt(wxString::FromAscii(isoFileName));
 }
--- a/pcsx2/Elfheader.cpp
+++ b/pcsx2/Elfheader.cpp
@ -137,6 +137,11 @@ struct Elf32_Rel {
 char args[256]="ez.m2v";	//to be accessed by other files
 uptr args_ptr;		//a big value; in fact, it is an address
 static bool isEmpty(int addr)
 {
 	return ((PS2MEM_BASE[addr] == 0) || (PS2MEM_BASE[addr] == 32));
 }
 //in a0 is passed the address of the command line args,
 //i.e. a pointer to an area like this:
 //+00 unknown/unused
@ -148,19 +153,30 @@ uptr args_ptr;		//a big value; in fact, it is an address
 //+08+4*argc the program name(first param)						   <--
 //+08+4*argc+strlen(argv[0]+1) the rest of params; i.e. a copy of 'args'
 //                                         see above 'char args[256];'
 // The results of this function will normally be that it finds an arg at 13 chars, and another at 0.
 // It'd probably be easier to 0 out all 256 chars, split args, copy all the arguments in, and note
 // the locations of each split...  --arcum42
 static uint parseCommandLine( const wxString& filename )
 {
-	if ( ( args_ptr != 0xFFFFFFFF ) && ( args_ptr > 264 ) )
+	if ( ( args_ptr != 0xFFFFFFFF ) && ( args_ptr > (4 + 4 + 256) ) )
-	{	// 4 + 4 + 256
+	{
 		const char *p;
-		int  argc;
+		int argc, i, ret = 0;
-		int i;
+		u32 args_end;
 		args_ptr -= 256;
 		args[ 255 ] = 0;
-		memcpy( &PS2MEM_BASE[ args_ptr ], args, 256 );				//params 1, 2, etc copied
+		
 		// Copy the parameters into the section of memory at args_ptr, 
 		// then zero out anything past the end of args till 256 chars is reached.
 		memcpy( &PS2MEM_BASE[ args_ptr ], args, 256 );
 		memset( &PS2MEM_BASE[ args_ptr + strlen( args ) ], 0, 256 - strlen( args ) );
 		args_end = args_ptr + strlen( args );
 		// Set p to just the filename, no path.
 #ifdef _WIN32
 		p = strrchr( filename, '\\' );
 #else	//linux
@ -172,45 +188,52 @@ static uint parseCommandLine( const wxString& filename )
 		else
 			p = filename;
 		args_ptr -= strlen( p ) + 1;
-		strcpy( (char*)&PS2MEM_BASE[ args_ptr ], p );						//fill param 0; i.e. name of the program
+		//fill param 0; i.e. name of the program
 		strcpy( (char*)&PS2MEM_BASE[ args_ptr ], p );
-		for ( i = strlen( p ) + 1 + 256, argc = 0; i > 0; i-- )
+		// Start from the end of where we wrote to, not including all the zero'd out area.
 		for ( i = args_end - args_ptr + 1, argc = 0; i > 0; i-- )
 		{
-			while (i && ((PS2MEM_BASE[ args_ptr + i ] == 0) || (PS2MEM_BASE[ args_ptr + i ] == 32)))
+			while (i && isEmpty(args_ptr + i ))  { i--; }
 			{ i--; }
 			// If the last char is a space, set it to 0.
 			if ( PS2MEM_BASE[ args_ptr + i + 1 ] == ' ') PS2MEM_BASE[ args_ptr + i + 1 ] = 0;
-			while (i && (PS2MEM_BASE[ args_ptr + i ] != 0) && (PS2MEM_BASE[ args_ptr + i] != 32))
+			while (i && !isEmpty(args_ptr + i )) { i--; }
 			{ i--; }
-			if ((PS2MEM_BASE[ args_ptr + i ] != 0) && (PS2MEM_BASE[ args_ptr + i ] != 32))
+			// Now that we've gone back a word, increase the number of arguments, 
-			{	//i==0
+			// and mark the location of the argument. 
 			if (!isEmpty(args_ptr + i )) // i <= 0
 			{
 				// If the spot we are on is not a space or null , use it.
 				argc++;
 				ret = args_ptr - 4 - 4 - argc * 4;
-				if ( args_ptr - 4 - 4 - argc * 4 < 0 ) // fixme - Should this be cast to a signed int?
+				if (ret < 0 ) return 0;
 					return 0;
 				((u32*)PS2MEM_BASE)[ args_ptr / 4 - argc ] = args_ptr + i;
 			}
 			else
 			{
-				if ( ( PS2MEM_BASE[ args_ptr + i + 1 ] != 0 ) && ( PS2MEM_BASE[ args_ptr + i + 1 ] != 32 ) )
+				if (!isEmpty(args_ptr + i + 1))
 				{
 					// Otherwise, use the next character .
 					argc++;
-					if ( args_ptr - 4 - 4 - argc * 4 < 0 ) // fixme - Should this be cast to a signed int?
+					ret = args_ptr - 4 - 4 - argc * 4;
 						return 0;
 					if (ret < 0 ) return 0;
 					((u32*)PS2MEM_BASE)[ args_ptr / 4 - argc ] = args_ptr + i + 1;
 				}
 			}
 		}
 		// Pass the number of arguments, and if we have arguments.
 		((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 1 ] = argc;		      //how many args
 		((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 2 ] = ( argc > 0);	//have args?	//not used, cannot be filled at all
-		return ( args_ptr - argc * 4 - 8 );
+		return ret;
 	}
 	return 0;
@ -495,8 +518,11 @@ u32 loadElfCRC( const char* filename )
 	TocEntry toc;
 	IsoFS_init( );
-	if ( IsoFS_findFile( filename + strlen( "cdromN:" ), &toc ) == -1 )
+	
-		return 0;
+	Console::Status("loadElfCRC: %s", params filename);
 	int mylen = strlen( "cdromN:" );
 	if ( IsoFS_findFile( filename + mylen, &toc ) == -1 ) return 0;
 	DevCon::Status( "loadElfFile: %d bytes", params toc.fileSize );
 	u32 crcval = ElfObject( wxString::FromAscii( filename ), toc.fileSize ).GetCRC();
@ -528,13 +554,13 @@ void loadElfFile(const wxString& filename)
 	if( !filename.StartsWith( L"cdrom0:" ) && !filename.StartsWith( L"cdrom1:" ) )
 	{
-		// Loading from a file (or non-cd image)
+		DevCon::WriteLn("Loading from a file (or non-cd image)");
 		elfsize = Path::GetFileSize( filename );
 	}
 	else
 	{
-		// Loading from a CD rom or CD image.
+		DevCon::WriteLn("Loading from a CD rom or CD image");
 		useCdvdSource = true;
 		TocEntry toc;
 		IsoFS_init( );
--- a/pcsx2/Gif.cpp
+++ b/pcsx2/Gif.cpp
@ -25,6 +25,7 @@
 #include "Counters.h"
 #include "VifDma.h"
 #include "Tags.h"
 using std::min;
@ -43,8 +44,7 @@ static int gifstate = GIF_STATE_READY;
 //static u64 s_gstag = 0; // used for querying the last tag
-// This should be a bool, as should the return value of hwDmacSrcChainWithStack.
+// This should be a bool. Next time I feel like breaking the save state, it will be. --arcum42
 // Next time I feel like breaking the save state, it will be. --arcum42
 static int gspath3done = 0;
 static u32 gscycles = 0, prevcycles = 0, mfifocycles = 0;
@ -65,7 +65,7 @@ __forceinline void gsInterrupt()
 {
 	GIF_LOG("gsInterrupt: %8.8x", cpuRegs.cycle);
-	if ((gif->chcr & 0x100) == 0) 
+	if (!(CHCR::STR(gif)))
 	{
 		//Console::WriteLn("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x", params gif->chcr, gif->qwc, done);
 		return;
@ -94,7 +94,7 @@ __forceinline void gsInterrupt()
 	gspath3done = 0;
 	gscycles = 0;
-	gif->chcr &= ~0x100;
+	CHCR::clearSTR(gif);
 	vif1Regs->stat &= ~VIF1_STAT_VGW;
 	psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0
@ -132,7 +132,6 @@ static u32 WRITERING_DMA(u32 *pMem, u32 qwc)
 int  _GIFchain() 
 {
 	//u32 qwc = ((psHu32(GIF_MODE) & 0x4) || vif1Regs->mskpath3) ? min(8, (int)gif->qwc) : min( gifsplit, (int)gif->qwc );
 	u32 qwc = min( gifsplit, (int)gif->qwc );
 	u32 *pMem;
@ -161,7 +160,7 @@ static __forceinline void GIFchain()
 static __forceinline bool checkTieBit(u32* &ptag)
 {
-	if ((gif->chcr & 0x80) && (ptag[0] >> 31))  //Check TIE bit of CHCR and IRQ bit of tag
+	if ((CHCR::TIE(gif)) && (Tag::IRQ(ptag)))  //Check TIE bit of CHCR and IRQ bit of tag
 	{
 		GIF_LOG("dmaIrq Set");
 		gspath3done = 1;
@ -175,19 +174,13 @@ static __forceinline bool ReadTag(u32* &ptag, u32 &id)
 {
 	ptag = (u32*)dmaGetAddr(gif->tadr);  //Set memory pointer to TADR
-	if (ptag == NULL) //Is ptag empty?
+	// If this messes things up, uncommenting the "Safe" will set it back to the way it was.
-	{
+	if (!(Tag::/*Safe*/Transfer("Gif", gif, ptag))) return false;
 		//If yes, set BEIS (BUSERR) in DMAC_STAT register
 		psHu32(DMAC_STAT)|= DMAC_STAT_BEIS;		 
 		return false;
 	}
 	gscycles+=2; // Add 1 cycles from the QW read for the tag
 	gif->chcr = ( gif->chcr & 0xFFFF ) | ((*ptag) & 0xFFFF0000);  //Transfer upper part of tag to CHCR bits 31-15
 	id = (ptag[0] >> 28) & 0x7;		//ID for DmaChain copied from bit 28 of the tag
 	gif->qwc  = (u16)ptag[0];			    //QWC set to lower 16bits of the tag
 	gif->madr = ptag[1];				    //MADR = ADDR field
 	id = Tag::Id(ptag);		//ID for DmaChain copied from bit 28 of the tag
 	gscycles+=2; // Add 1 cycles from the QW read for the tag
 	gspath3done = hwDmacSrcChainWithStack(gif, id);
 	return true;
 }
@ -195,11 +188,11 @@ static __forceinline bool ReadTag(u32* &ptag, u32 &id)
 static __forceinline void ReadTag2(u32* &ptag)
 {
 	ptag = (u32*)dmaGetAddr(gif->tadr);  //Set memory pointer to TADR
-	gif->qwc  = (u16)ptag[0];			    //QWC set to lower 16bits of the tag
+	
-	gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 );  //Transfer upper part of tag to CHCR bits 31-15
+	Tag::UnsafeTransfer(gif, ptag);
 	gif->madr = ptag[1];
-	gspath3done = hwDmacSrcChainWithStack(gif, (ptag[0] >> 28) & 0x7);
+	gspath3done = hwDmacSrcChainWithStack(gif, Tag::Id(ptag));
 }
 void GIFdma() 
@ -245,7 +238,8 @@ void GIFdma()
 	{
 		if (gif->qwc == 0) 
 		{
-			if ((gif->chcr & 0x10c) == 0x104) 
+			//if ((gif->chcr & 0x10c) == 0x104) 
 			if ((CHCR::MOD(gif) == CHAIN_MODE) && CHCR::STR(gif))
 			{
 				if (!ReadTag(ptag, id)) return;
 				GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1], ptag[0], gif->qwc, id, gif->madr);
@ -268,10 +262,10 @@ void GIFdma()
 	}
 	// Transfer Dn_QWC from Dn_MADR to GIF
-	if (((gif->chcr & 0xc) == 0) || (gif->qwc > 0)) // Normal Mode
+	if ((CHCR::MOD(gif) == NORMAL_MODE) || (gif->qwc > 0)) // Normal Mode
 	{ 
-		if (((psHu32(DMAC_CTRL) & 0xC0) == 0x80) && ((gif->chcr & 0xc) == 0))
+		if (((psHu32(DMAC_CTRL) & 0xC0) == 0x80) && (CHCR::MOD(gif) == NORMAL_MODE))
 		{ 
 			Console::WriteLn("DMA Stall Control on GIF normal");
 		}
@ -281,7 +275,8 @@ void GIFdma()
 		CPU_INT(2, gscycles * BIAS);
 		return;	
 	}
-	if (((gif->chcr & 0xc) == 0x4) && (gspath3done == 0)) // Chain Mode
+	
 	if ((CHCR::MOD(gif) == CHAIN_MODE) && (gspath3done == 0)) // Chain Mode
 	{
 		if (!ReadTag(ptag, id)) return;
 		GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1], ptag[0], gif->qwc, id, gif->madr);
@ -310,11 +305,11 @@ void GIFdma()
 	if ((gspath3done == 0) && (gif->qwc == 0))
 	{
 		ptag = (u32*)dmaGetAddr(gif->tadr);  //Set memory pointer to TADR
-		gif->qwc  = (u16)ptag[0];			    //QWC set to lower 16bits of the tag
+		
-		gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 );  //Transfer upper part of tag to CHCR bits 31-15
+		Tag::UnsafeTransfer(gif, ptag);
 		gif->madr = ptag[1];
-		gspath3done = hwDmacSrcChainWithStack(gif, (ptag[0] >> 28) & 0x7);
+		gspath3done = hwDmacSrcChainWithStack(gif, Tag::Id(ptag));
 		checkTieBit(ptag);
@ -347,7 +342,7 @@ void dmaGIF()
 		return;
 	}	
-	if ((gif->qwc == 0) && ((gif->chcr & 0xc) != 0))
+	if ((gif->qwc == 0) && ((CHCR::MOD(gif) != NORMAL_MODE)))
 	{
 		u32 *ptag;
@ -379,7 +374,7 @@ static __forceinline int mfifoGIFrbTransfer()
 		// fixme - I don't think these should use WRITERING_DMA, since our source
 		// isn't the DmaGetAddr(gif->madr) address that WRITERING_DMA expects.
-		/* it does, so first copy 's1' bytes from 'addr' to 'data' */
+		/* it does (wrap around), so first copy 's1' bytes from 'addr' to 'data' */
 		src = (u32*)PSM(gif->madr);
 		if (src == NULL) return -1;
 		s1 = WRITERING_DMA(src, s1);
@ -400,8 +395,7 @@ static __forceinline int mfifoGIFrbTransfer()
 	} 
 	else 
 	{
-		/* it doesn't, so just transfer 'qwc*16' words 
+		/* it doesn't, so just transfer 'qwc*16' words from 'gif->madr' to GS */
 		   from 'gif->madr' to GS */
 		src = (u32*)PSM(gif->madr);
 		if (src == NULL) return -1;
@ -443,8 +437,8 @@ void mfifoGIFtransfer(int qwc)
 	u32 *ptag;
 	int id;
 	u32 temp = 0;
 	mfifocycles = 0;
 	mfifocycles = 0;
 	gifmfifoirq = false;
 	if(qwc > 0 ) 
@ -469,50 +463,50 @@ void mfifoGIFtransfer(int qwc)
 		gif->tadr = psHu32(DMAC_RBOR) + (gif->tadr & psHu32(DMAC_RBSR));
 		ptag = (u32*)dmaGetAddr(gif->tadr);
-		id = (ptag[0] >> 28) & 0x7;
+		Tag::UnsafeTransfer(gif, ptag);
-		gif->qwc  = (ptag[0] & 0xffff);
+		
 		gif->madr = ptag[1];
 		id =Tag::Id(ptag);
 		mfifocycles += 2;
 		gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 );
 		GIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x",
 				ptag[1], ptag[0], gif->qwc, id, gif->madr, gif->tadr, gifqwc, spr0->madr);
 		gifqwc--;
 		switch (id) 
 		{
-			case 0: // Refe - Transfer Packet According to ADDR field
+			case TAG_REFE: // Refe - Transfer Packet According to ADDR field
 				gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR));
 				gifstate = GIF_STATE_DONE;										//End Transfer
 				break;
-			case 1: // CNT - Transfer QWC following the tag.
+			case TAG_CNT: // CNT - Transfer QWC following the tag.
 				gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR));						//Set MADR to QW after Tag            
 				gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR));			//Set TADR to QW following the data
 				gifstate = GIF_STATE_READY;
 				break;
-			case 2: // Next - Transfer QWC following tag. TADR = ADDR
+			case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR
 				temp = gif->madr;								//Temporarily Store ADDR
 				gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); 					  //Set MADR to QW following the tag
 				gif->tadr = temp;								//Copy temporarily stored ADDR to Tag
 				gifstate = GIF_STATE_READY;
 				break;
-			case 3: // Ref - Transfer QWC from ADDR field
+			case TAG_REF: // Ref - Transfer QWC from ADDR field
-			case 4: // Refs - Transfer QWC from ADDR field (Stall Control) 
+			case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) 
 				gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR));							//Set TADR to next tag
 				gifstate = GIF_STATE_READY;
 				break;
-			case 7: // End - Transfer QWC following the tag
+			case TAG_END: // End - Transfer QWC following the tag
 				gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR));		//Set MADR to data following the tag
 				gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR));			//Set TADR to QW following the data
 				gifstate = GIF_STATE_DONE;						//End Transfer
 				break;
 			}
-		if ((gif->chcr & 0x80) && (ptag[0] >> 31)) 
+		if ((CHCR::TIE(gif)) && (Tag::IRQ(ptag)))
 		{
 			SPR_LOG("dmaIrq Set");
 			gifstate = GIF_STATE_DONE;
@ -540,13 +534,13 @@ void gifMFIFOInterrupt()
 	mfifocycles = 0;
 	if (Path3progress == STOPPED_MODE) psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0
-	if ((spr0->chcr & 0x100) && (spr0->qwc == 0))
+	if ((CHCR::STR(spr0)) && (spr0->qwc == 0))
 	{
-		spr0->chcr &= ~0x100;
+		CHCR::clearSTR(spr0);
 		hwDmacIrq(DMAC_FROM_SPR);
 	}
-	if (!(gif->chcr & 0x100)) 
+	if (!(CHCR::STR(gif))) 
 	{ 
 		Console::WriteLn("WTF GIFMFIFO");
 		cpuRegs.interrupt &= ~(1 << 11); 
@ -592,7 +586,7 @@ void gifMFIFOInterrupt()
 	psHu32(GIF_STAT)&= ~0x1F000000; // QFC=0
 	vif1Regs->stat &= ~VIF1_STAT_VGW;
-	gif->chcr &= ~0x100;
+	CHCR::clearSTR(gif);
 	gifstate = GIF_STATE_READY;
 	hwDmacIrq(DMAC_GIF);
 	clearFIFOstuff(false);
--- a/pcsx2/Hw.cpp
+++ b/pcsx2/Hw.cpp
@ -32,6 +32,7 @@
 #include "VifDma.h"
 #include "SPR.h"
 #include "Sif.h"
 #include "Tags.h"
 using namespace R5900;
@ -150,68 +151,83 @@ bool hwMFIFOWrite(u32 addr, u8 *data, u32 size) {
 bool hwDmacSrcChainWithStack(DMACh *dma, int id) {
 	switch (id) {
-		case 0: // Refe - Transfer Packet According to ADDR field
+		case TAG_REFE: // Refe - Transfer Packet According to ADDR field
 			return true;										//End Transfer
-		case 1: // CNT - Transfer QWC following the tag.
+		case TAG_CNT: // CNT - Transfer QWC following the tag.
 			dma->madr = dma->tadr + 16;						//Set MADR to QW after Tag            
 			dma->tadr = dma->madr + (dma->qwc << 4);			//Set TADR to QW following the data
 			return false;
-		case 2: // Next - Transfer QWC following tag. TADR = ADDR
+		case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR
 		{
 			u32 temp = dma->madr;								//Temporarily Store ADDR
 			dma->madr = dma->tadr + 16; 					  //Set MADR to QW following the tag
 			dma->tadr = temp;								//Copy temporarily stored ADDR to Tag
 			return false;
 		}
-		case 3: // Ref - Transfer QWC from ADDR field
+		case TAG_REF: // Ref - Transfer QWC from ADDR field
-		case 4: // Refs - Transfer QWC from ADDR field (Stall Control) 
+		case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) 
 			dma->tadr += 16;									//Set TADR to next tag
 			return false;
-		case 5: // Call - Transfer QWC following the tag, save succeeding tag
+		case TAG_CALL: // Call - Transfer QWC following the tag, save succeeding tag
 		{
 			u32 temp = dma->madr;								//Temporarily Store ADDR
 			dma->madr = dma->tadr + 16;						//Set MADR to data following the tag
-			if ((dma->chcr & 0x30) == 0x0) {						//Check if ASR0 is empty
+			switch(CHCR::ASP(dma))
 			{
 			case 0: {						//Check if ASR0 is empty
 				dma->asr0 = dma->madr + (dma->qwc << 4);			//If yes store Succeeding tag
 				dma->chcr = (dma->chcr & 0xffffffcf) | 0x10; //1 Address in call stack
 				break;
 			}
-			else if((dma->chcr & 0x30) == 0x10){
+			case 1: {
 				dma->chcr = (dma->chcr & 0xffffffcf) | 0x20; //2 Addresses in call stack
 				dma->asr1 = dma->madr + (dma->qwc << 4);	//If no store Succeeding tag in ASR1
-			}else {
+				break;
 			}
 			default:			{
 				Console::Notice("Call Stack Overflow (report if it fixes/breaks anything)");
 				return true;										//Return done
 			}
 			}
 			dma->tadr = temp;								//Set TADR to temporarily stored ADDR
 			return false;
 		}
-		case 6: // Ret - Transfer QWC following the tag, load next tag
+		case TAG_RET: // Ret - Transfer QWC following the tag, load next tag
 			dma->madr = dma->tadr + 16;						//Set MADR to data following the tag
-
+			switch(CHCR::ASP(dma))
-			if ((dma->chcr & 0x30) == 0x20) {							//If ASR1 is NOT equal to 0 (Contains address)
+			{
 			case 2: {							//If ASR1 is NOT equal to 0 (Contains address)
 				dma->chcr = (dma->chcr & 0xffffffcf) | 0x10; //1 Address left in call stack
 				dma->tadr = dma->asr1;						//Read ASR1 as next tag
 				dma->asr1 = 0;								//Clear ASR1
 				break;
 				} 
-			else {										//If ASR1 is empty (No address held)
+												//If ASR1 is empty (No address held)
-				if((dma->chcr & 0x30) == 0x10) {						   //Check if ASR0 is NOT equal to 0 (Contains address)
+			case 1:{						   //Check if ASR0 is NOT equal to 0 (Contains address)
 				dma->chcr = (dma->chcr & 0xffffffcf);  //No addresses left in call stack
 				dma->tadr = dma->asr0;					//Read ASR0 as next tag
 				dma->asr0 = 0;							//Clear ASR0
-				} else {									//Else if ASR1 and ASR0 are empty
+				break;
 				}
 			case 0: {									//Else if ASR1 and ASR0 are empty
 				//dma->tadr += 16;						   //Clear tag address - Kills Klonoa 2
 				return true;								//End Transfer
 				}
 			default: {									//Else if ASR1 and ASR0 are messed up
 				//Console::Error("TAG_RET: ASR 1 & 0 == 1. This shouldn't happen!");
 				//dma->tadr += 16;						   //Clear tag address - Kills Klonoa 2
 				return true;								//End Transfer
 				}
 			}
 			return false;
-		case 7: // End - Transfer QWC following the tag 
+		case TAG_END: // End - Transfer QWC following the tag 
 			dma->madr = dma->tadr + 16;						//Set MADR to data following the tag
 			//Dont Increment tadr, breaks Soul Calibur II and III
 			return true;										//End Transfer
@ -224,26 +240,26 @@ bool hwDmacSrcChain(DMACh *dma, int id) {
 	u32 temp;
 	switch (id) {
-		case 0: // Refe - Transfer Packet According to ADDR field
+		case TAG_REFE: // Refe - Transfer Packet According to ADDR field
 			return true;										//End Transfer
-		case 1: // CNT - Transfer QWC following the tag.
+		case TAG_CNT: // CNT - Transfer QWC following the tag.
 			dma->madr = dma->tadr + 16;						//Set MADR to QW after Tag            
 			dma->tadr = dma->madr + (dma->qwc << 4);			//Set TADR to QW following the data
 			return false;
-		case 2: // Next - Transfer QWC following tag. TADR = ADDR
+		case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR
 			temp = dma->madr;								//Temporarily Store ADDR
 			dma->madr = dma->tadr + 16; 					  //Set MADR to QW following the tag
 			dma->tadr = temp;								//Copy temporarily stored ADDR to Tag
 			return false;
-		case 3: // Ref - Transfer QWC from ADDR field
+		case TAG_REF: // Ref - Transfer QWC from ADDR field
-		case 4: // Refs - Transfer QWC from ADDR field (Stall Control) 
+		case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) 
 			dma->tadr += 16;									//Set TADR to next tag
 			return false;
-		case 7: // End - Transfer QWC following the tag
+		case TAG_END: // End - Transfer QWC following the tag
 			dma->madr = dma->tadr + 16;						//Set MADR to data following the tag
 			//Dont Increment tadr, breaks Soul Calibur II and III
 			return true;										//End Transfer
--- a/pcsx2/IPU/IPU.cpp
+++ b/pcsx2/IPU/IPU.cpp
@ -26,6 +26,7 @@
 #include "coroutine.h"
 #include "Vif.h"
 #include "Tags.h"
 using namespace std;			// for min / max
@ -36,7 +37,7 @@ using namespace std;			// for min / max
 //#define IPU_INT0_FROM()  CPU_INT( DMAC_FROM_IPU, 0 )
 // IPU Inline'd IRQs : Calls the IPU interrupt handlers directly instead of
-// feeding them through the EE's branch test. (see IPU.H for details)
+// feeding them through the EE's branch test. (see IPU.h for details)
 #ifdef IPU_INLINE_IRQS
 #	define IPU_INT_TO( cycles )  ipu1Interrupt()
@ -117,7 +118,7 @@ extern "C"
 PCSX2_ALIGNED16(u8 _readbits[80]);	//local buffer (ring buffer)
 u8* readbits = _readbits; // always can decrement by one 1qw
-#define SATURATE_4BITS(val) ((val)>15 ? 15 : (val))
+//#define SATURATE_4BITS(val) ((val)>15 ? 15 : (val))
 __forceinline void IPUProcessInterrupt()
 {
@ -317,21 +318,20 @@ __forceinline u64 ipuRead64(u32 mem)
 void ipuSoftReset()
 {
 	mpeg2_init();
 	FIFOto_clear();
-	memzero_obj(fifo_output);
+	FIFOfrom_clear();
-	FOwritepos = 0;
+	
 	FOreadpos = 0;
 	coded_block_pattern = 0;
 	ipuRegs->ctrl._u32 = 0;
 	ipuRegs->top = 0;
 	ipuCurCmd = 0xffffffff;
 	g_BP.BP = 0;
 	g_BP.IFC = 0;
 	g_BP.FP = 0;
 	g_BP.bufferhasnew = 0;
-	ipuRegs->top = 0;
+	
 	g_nCmdIndex = 0;
 	ipuCurCmd = 0xffffffff;
 	g_nCmdPos[0] = 0;
 	g_nCmdPos[1] = 0;
 }
@ -404,10 +404,10 @@ __forceinline void ipuWrite64(u32 mem, u64 value)
 static void ipuBCLR(u32 val)
 {
 	FIFOto_clear();
 	g_BP.BP = val & 0x7F;
 	g_BP.FP = 0;
 	g_BP.bufferhasnew = 0;
 	g_BP.IFC = 0;
 	ipuRegs->ctrl.BUSY = 0;
 	ipuRegs->cmd.BUSY = 0;
 	memzero_ptr<80>(readbits);
@ -811,7 +811,7 @@ void IPUCMD_WRITE(u32 val)
 		case SCE_IPU_FDEC:
 			IPU_LOG("IPU FDEC command. Skip 0x%X bits, FIFO 0x%X qwords, BP 0x%X, FP %d, CHCR 0x%x, %x",
-			        val & 0x3f, g_BP.IFC, (int)g_BP.BP, g_BP.FP, ((DMACh*)&PS2MEM_HW[0xb400])->chcr, cpuRegs.pc);
+			        val & 0x3f, g_BP.IFC, (int)g_BP.BP, g_BP.FP, ipu1dma->chcr, cpuRegs.pc);
 			g_BP.BP += val & 0x3F;
 			if (ipuFDEC(val)) return;
 			ipuRegs->cmd.BUSY = 0x80000000;
@ -840,7 +840,7 @@ void IPUCMD_WRITE(u32 val)
 			if (ipuCSC(ipuRegs->cmd.DATA))
 			{
-				if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100))  IPU_INT0_FROM();
+				if (ipu0dma->qwc > 0 && (CHCR::STR(ipu0dma)))  IPU_INT0_FROM();
 				return;
 			}
 			break;
@ -855,7 +855,7 @@ void IPUCMD_WRITE(u32 val)
 			if (ipuIDEC(val))
 			{
 				// idec done, ipu0 done too
-				if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM();
+				if (ipu0dma->qwc > 0 && (CHCR::STR(ipu0dma))) IPU_INT0_FROM();
 				return;
 			}
 			ipuRegs->topbusy = 0x80000000;
@ -867,7 +867,7 @@ void IPUCMD_WRITE(u32 val)
 		case SCE_IPU_BDEC:
 			if (ipuBDEC(val))
 			{
-				if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM();
+				if (ipu0dma->qwc > 0 && (CHCR::STR(ipu0dma))) IPU_INT0_FROM();
 				if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) hwIntcIrq(INTC_IPU);
 				return;
 			}
@ -931,7 +931,7 @@ void IPUWorker()
 				hwIntcIrq(INTC_IPU);
 				return;
 			}
-			if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100))  IPU_INT0_FROM();
+			if ((ipu0dma->qwc > 0) && (CHCR::STR(ipu0dma)))  IPU_INT0_FROM();
 			break;
 		case SCE_IPU_PACK:
@ -957,7 +957,7 @@ void IPUWorker()
 			ipuCurCmd = 0xffffffff;
 			// CHECK!: IPU0dma remains when IDEC is done, so we need to clear it
-			if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM();
+			if ((ipu0dma->qwc > 0) && (CHCR::STR(ipu0dma))) IPU_INT0_FROM();
 			s_routine = NULL;
 			break;
@ -974,7 +974,7 @@ void IPUWorker()
 			ipuRegs->cmd.BUSY = 0;
 			ipuCurCmd = 0xffffffff;
-			if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM();
+			if ((ipu0dma->qwc > 0) && (CHCR::STR(ipu0dma))) IPU_INT0_FROM();
 			s_routine = NULL;
 			if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) hwIntcIrq(INTC_IPU);
 			return;
@ -1328,19 +1328,18 @@ int FIFOto_read(void *value)
 	// wait until enough data
 	if (g_BP.IFC == 0)
 	{
 		// This is the only spot that wants a return value for IPU1dma.
 		if (IPU1dma() == 0) return 0;
 		assert(g_BP.IFC > 0);
 	}
 	// transfer 1 qword, split into two transfers
-	((u32*)value)[0] = fifo_input[FIreadpos];
+	for (int i = 0; i <= 3; i++)
-	fifo_input[FIreadpos] = 0;
+	{
-	((u32*)value)[1] = fifo_input[FIreadpos+1];
+		((u32*)value)[i] = fifo_input[FIreadpos + i];
-	fifo_input[FIreadpos+1] = 0;
+		fifo_input[FIreadpos + i] = 0;
-	((u32*)value)[2] = fifo_input[FIreadpos+2];
+	}
-	fifo_input[FIreadpos+2] = 0;
+	
 	((u32*)value)[3] = fifo_input[FIreadpos+3];
 	fifo_input[FIreadpos+3] = 0;
 	FIreadpos = (FIreadpos + 4) & 31;
 	g_BP.IFC--;
 	return 1;
@ -1356,10 +1355,10 @@ int FIFOto_write(u32* pMem, int size)
 	while (transsize-- > 0)
 	{
-		fifo_input[FIwritepos] = pMem[0];
+		for (int i = 0; i <= 3; i++)
-		fifo_input[FIwritepos+1] = pMem[1];
+		{
-		fifo_input[FIwritepos+2] = pMem[2];
+			fifo_input[FIwritepos + i] = pMem[i];
-		fifo_input[FIwritepos+3] = pMem[3];
+		}
 		FIwritepos = (FIwritepos + 4) & 31;
 		pMem += 4;
 	}
@ -1367,11 +1366,12 @@ int FIFOto_write(u32* pMem, int size)
 	return firsttrans;
 }
-static __forceinline bool IPU1chain(u32* &pMem, int &totalqwc) 
+static __forceinline bool IPU1chain(int &totalqwc) 
 {
 	if (ipu1dma->qwc > 0)
 	{
 		int qwc = ipu1dma->qwc; 
 		u32 *pMem;
 		pMem = (u32*)dmaGetAddr(ipu1dma->madr); 
@ -1395,15 +1395,16 @@ static __forceinline bool IPU1chain(u32* &pMem, int &totalqwc)
 	return false;
 }
 // Remind me to give this a better name. --arcum42
 static __forceinline bool IncreaseTadr(u32 tag)
 {
-	switch (tag & 0x70000000)
+	switch (Tag::Id(tag))
 	{
-		case 0x00000000:
+		case TAG_REFE:  // refe
 			ipu1dma->tadr += 16;
 			return true;
-		case 0x70000000:
+		case TAG_END: // end
 			ipu1dma->tadr = ipu1dma->madr;
 			return true;
 	}
@ -1412,33 +1413,77 @@ static __forceinline bool IncreaseTadr(u32 tag)
 extern void gsInterrupt();
-int IPU1dma()
+static __forceinline bool ipuDmacSrcChain(DMACh *tag, u32 *ptag)
 {
-	u32 *ptag, *pMem;
+	switch (Tag::Id(ptag))
-	bool done = FALSE;
+	{
-	int ipu1cycles = 0;
+		case TAG_REFE: // refe
-	int totalqwc = 0;
+			// do not change tadr
 			tag->madr = ptag[1];
 			return true;
 			break;
-	assert(!(ipu1dma->chcr & 0x40));
+		case TAG_CNT: // cnt
 			tag->madr = tag->tadr + 16;
 			// Set the taddr to the next tag
 			tag->tadr += 16 + (tag->qwc << 4);
 			break;
-	if (!(ipu1dma->chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_TO_IPU))) return 0;
+		case TAG_NEXT: // next
 			tag->madr = tag->tadr + 16;
 			tag->tadr = ptag[1];
 			break;
-	assert(!(g_nDMATransfer & IPU_DMA_TIE1));
+		case TAG_REF: // ref
 			tag->madr = ptag[1];
 			tag->tadr += 16;
 			break;
-	//We need to make sure GIF has flushed before sending IPU data, it seems to REALLY screw FFX videos
+		case TAG_END: // end
-	while(gif->chcr & 0x100 && vif1Regs->mskpath3 == 0) 
+			// do not change tadr
 			tag->madr = tag->tadr + 16;
 			return true;
 			break;
 		default:
 			Console::Error("IPU ERROR: different transfer mode!, Please report to PCSX2 Team");
 			break;
 	}
 	return false;
 }
 static __forceinline void flushGIF()
 {
 	while(CHCR::STR(gif) && (vif1Regs->mskpath3 == 0)) 
 	{
 		GIF_LOG("Flushing gif chcr %x tadr %x madr %x qwc %x", gif->chcr, gif->tadr, gif->madr, gif->qwc);
 		gsInterrupt();
 	}
 }
 int IPU1dma()
 {
 	u32 *ptag; 
 	bool done = false;
 	int ipu1cycles = 0, totalqwc = 0;
 	assert(!(CHCR::TTE(ipu1dma)));
 	if (!(CHCR::STR(ipu1dma)) || (cpuRegs.interrupt & (1 << DMAC_TO_IPU))) return 0;
 	assert(!(g_nDMATransfer & IPU_DMA_TIE1));
 	//We need to make sure GIF has flushed before sending IPU data, it seems to REALLY screw FFX videos
 	flushGIF();
 	// in kh, qwc == 0 when dma_actv1 is set
 	if ((g_nDMATransfer & IPU_DMA_ACTV1) && ipu1dma->qwc > 0)
 	{
-		if (IPU1chain(pMem, totalqwc)) return totalqwc;
+		if (IPU1chain(totalqwc)) return totalqwc;
 		//Check TIE bit of CHCR and IRQ bit of tag
-		if ((ipu1dma->chcr & 0x80) && (g_nDMATransfer & IPU_DMA_DOTIE1))
+		if (CHCR::TIE(ipu1dma) && (g_nDMATransfer & IPU_DMA_DOTIE1))
 		{
 			Console::WriteLn("IPU1 TIE");
@ -1448,22 +1493,24 @@ int IPU1dma()
 			return totalqwc;
 		}
-		if (!(ipu1dma->chcr & 0xc))
+		if (CHCR::MOD(ipu1dma) == NORMAL_MODE) // If mode is normal mode.
 		{
 			IPU_INT_TO(totalqwc * BIAS);
 			return totalqwc;
 		}
 		else
 		{
 			// Chain mode.
 			u32 tag = ipu1dma->chcr; // upper bits describe current tag
-			if ((ipu1dma->chcr & 0x80) && (tag & 0x80000000))
+			if (CHCR::TIE(ipu1dma) && Tag::IRQ(tag))
 			{
 				ptag = (u32*)dmaGetAddr(ipu1dma->tadr);
 				IncreaseTadr(tag);
-				ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);
+				Tag::UpperTransfer(ipu1dma, ptag);
 				IPU_LOG("IPU dmaIrq Set");
 				IPU_INT_TO(totalqwc * BIAS);
 				g_nDMATransfer |= IPU_DMA_TIE1;
@ -1480,7 +1527,8 @@ int IPU1dma()
 		g_nDMATransfer &= ~(IPU_DMA_ACTV1 | IPU_DMA_DOTIE1);
 	}
-	if (((ipu1dma->chcr & 0xc) == 0) && (ipu1dma->qwc == 0))   // Normal Mode
+	// Normal Mode & qwc is finished
 	if ((CHCR::MOD(ipu1dma) == NORMAL_MODE) && (ipu1dma->qwc == 0))
 	{
 		//Console::WriteLn("ipu1 normal empty qwc?");
 		return totalqwc;
@ -1492,7 +1540,7 @@ int IPU1dma()
 		IPU_LOG("dmaIPU1 Normal size=%d, addr=%lx, fifosize=%x",
 		        ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC);
-		if (!IPU1chain(pMem, totalqwc)) IPU_INT_TO((ipu1cycles + totalqwc) * BIAS);
+		if (!IPU1chain(totalqwc)) IPU_INT_TO((ipu1cycles + totalqwc) * BIAS);
 		return totalqwc;
 	}
@ -1500,70 +1548,31 @@ int IPU1dma()
 	{
 		// Chain Mode & ipu1dma->qwc is 0
 		ptag = (u32*)dmaGetAddr(ipu1dma->tadr);  //Set memory pointer to TADR
-		if (ptag == NULL)  					 //Is ptag empty?
+		
-		{
+		// Transfer the tag.
-			Console::Error("IPU1 BUSERR");
+		if (!(Tag::Transfer("IPU1", ipu1dma, ptag))) return totalqwc;
 			ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);      //Transfer upper part of tag to CHCR bits 31-15
 			psHu32(DMAC_STAT) |= DMAC_STAT_BEIS;		 //If yes, set BEIS (BUSERR) in DMAC_STAT register
 			return totalqwc;
 		}
 		ipu1cycles += 1; // Add 1 cycles from the QW read for the tag
-		ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);      //Transfer upper part of tag to CHCR bits 31-15
+		done = ipuDmacSrcChain(ipu1dma, ptag);
 		ipu1dma->qwc  = (u16)ptag[0];			    //QWC set to lower 16bits of the tag
 		switch (ptag[0] & 0x70000000)
 		{
 			case 0x00000000: // refe
 				// do not change tadr
 				ipu1dma->madr = ptag[1];
 				done = TRUE;
 				break;
 			case 0x10000000: // cnt
 				ipu1dma->madr = ipu1dma->tadr + 16;
 				// Set the taddr to the next tag
 				ipu1dma->tadr += 16 + (ipu1dma->qwc << 4);
 				break;
 			case 0x20000000: // next
 				ipu1dma->madr = ipu1dma->tadr + 16;
 				ipu1dma->tadr = ptag[1];
 				break;
 			case 0x30000000: // ref
 				ipu1dma->madr = ptag[1];
 				ipu1dma->tadr += 16;
 				break;
 			case 0x70000000: // end
 				// do not change tadr
 				ipu1dma->madr = ipu1dma->tadr + 16;
 				done = TRUE;
 				break;
 			default:
 				Console::Error("IPU ERROR: different transfer mode!, Please report to PCSX2 Team");
 				break;
 		}
 		IPU_LOG("dmaIPU1 dmaChain %8.8x_%8.8x size=%d, addr=%lx, fifosize=%x",
 		        ptag[1], ptag[0], ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC);
-		if ((ipu1dma->chcr & 0x80) && ptag[0] & 0x80000000)
+		
 		if (CHCR::TIE(ipu1dma) && Tag::IRQ(ptag))
 			g_nDMATransfer |= IPU_DMA_DOTIE1;
 		else
 			g_nDMATransfer &= ~IPU_DMA_DOTIE1;
 		if (ipu1dma->qwc == 0)
 		{
-			//if ((ipu1dma->chcr & 0x80) && (ptag[0] & 0x80000000))  	 //Check TIE bit of CHCR and IRQ bit of tag
+			//Check TIE bit of CHCR and IRQ bit of tag
 			if (g_nDMATransfer & IPU_DMA_DOTIE1)
 			{
 				Console::WriteLn("IPU1 TIE");
-				if (IPU1chain(pMem, totalqwc)) return totalqwc;
+				if (IPU1chain(totalqwc)) return totalqwc;
 				if (done)
 				{
@ -1571,7 +1580,8 @@ int IPU1dma()
 					IncreaseTadr(ptag[0]);
-					ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);
+					// Transfer the last of ptag into chcr.
 					Tag::UpperTransfer(ipu1dma, ptag);
 				}
 				IPU_INT_TO(ipu1cycles + totalqwc * BIAS);  // Should it be (ipu1cycles + totalqwc) * BIAS?
@ -1582,14 +1592,14 @@ int IPU1dma()
 			{
 				//Britney Dance beat does a blank NEXT tag, for some odd reason the fix doesnt work if after IPU1Chain O_o
 				if (!done) IPU1dma();
-				if (IPU1chain(pMem, totalqwc)) return totalqwc;
+				if (IPU1chain(totalqwc)) return totalqwc;
 			}
 			IncreaseTadr(ptag[0]);
 		}
 		else
 		{
-			if (IPU1chain(pMem, totalqwc)) return totalqwc;
+			if (IPU1chain(totalqwc)) return totalqwc;
 		}
 	}
@ -1597,6 +1607,13 @@ int IPU1dma()
 	return totalqwc;
 }
 void FIFOfrom_clear()
 {
 	memzero_obj(fifo_output);
 	ipuRegs->ctrl.OFC = 0;
 	FOreadpos = 0;
 	FOwritepos = 0;
 }
 int FIFOfrom_write(const u32 *value, int size)
 {
@ -1609,10 +1626,10 @@ int FIFOfrom_write(const u32 *value, int size)
 	while (transsize-- > 0)
 	{
-		fifo_output[FOwritepos] = ((u32*)value)[0];
+		for (int i = 0; i <= 3; i++)
-		fifo_output[FOwritepos+1] = ((u32*)value)[1];
+		{
-		fifo_output[FOwritepos+2] = ((u32*)value)[2];
+			fifo_output[FOwritepos + i] = ((u32*)value)[i];
-		fifo_output[FOwritepos+3] = ((u32*)value)[3];
+		}
 		FOwritepos = (FOwritepos + 4) & 31;
 		value += 4;
 	}
@ -1627,14 +1644,11 @@ int FIFOfrom_write(const u32 *value, int size)
 static __forceinline void _FIFOfrom_readsingle(void *value)
 {
 	// transfer 1 qword, split into two transfers
-	((u32*)value)[0] = fifo_output[FOreadpos];
+	for (int i = 0; i <= 3; i++)
-	fifo_output[FOreadpos] = 0;
+	{
-	((u32*)value)[1] = fifo_output[FOreadpos+1];
+		((u32*)value)[i] = fifo_output[FOreadpos + i];
-	fifo_output[FOreadpos+1] = 0;
+		fifo_output[FOreadpos + i] = 0;
-	((u32*)value)[2] = fifo_output[FOreadpos+2];
+	}
 	fifo_output[FOreadpos+2] = 0;
 	((u32*)value)[3] = fifo_output[FOreadpos+3];
 	fifo_output[FOreadpos+3] = 0;
 	FOreadpos = (FOreadpos + 4) & 31;
 }
@ -1658,17 +1672,15 @@ void FIFOfrom_read(void *value, int size)
 	}
 }
 int IPU0dma()
 {
 	int readsize;
 	void* pMem;
-	if ((!(ipu0dma->chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_FROM_IPU))) || (ipu0dma->qwc == 0))
+	if ((!(CHCR::STR(ipu0dma)) || (cpuRegs.interrupt & (1 << DMAC_FROM_IPU))) || (ipu0dma->qwc == 0))
 		return 0;
-	assert(!(ipu0dma->chcr&0x40));
+	assert(!(CHCR::TTE(ipu0dma)));
 	IPU_LOG("dmaIPU0 chcr = %lx, madr = %lx, qwc  = %lx",
 	        ipu0dma->chcr, ipu0dma->madr, ipu0dma->qwc);
@ -1727,14 +1739,14 @@ void ipu0Interrupt()
 	{
 		// gif
 		g_nDMATransfer &= ~IPU_DMA_GIFSTALL;
-		if (((DMACh*)&PS2MEM_HW[0xA000])->chcr & 0x100) GIFdma();
+		if (CHCR::STR(gif)) GIFdma();
 	}
 	if (g_nDMATransfer & IPU_DMA_VIFSTALL)
 	{
 		// vif
 		g_nDMATransfer &= ~IPU_DMA_VIFSTALL;
-		if (((DMACh*)&PS2MEM_HW[0x9000])->chcr & 0x100)dmaVIF1();
+		if (CHCR::STR(vif1ch)) dmaVIF1();
 	}
 	if (g_nDMATransfer & IPU_DMA_TIE0)
@ -1742,7 +1754,7 @@ void ipu0Interrupt()
 		g_nDMATransfer &= ~IPU_DMA_TIE0;
 	}
-	ipu0dma->chcr &= ~0x100;
+	CHCR::clearSTR(ipu0dma);
 	hwDmacIrq(DMAC_FROM_IPU);
 }
@ -1760,7 +1772,7 @@ IPU_FORCEINLINE void ipu1Interrupt()
 	if (g_nDMATransfer & IPU_DMA_TIE1)
 		g_nDMATransfer &= ~IPU_DMA_TIE1;
 	else
-		ipu1dma->chcr &= ~0x100;
+		CHCR::clearSTR(ipu1dma);
 	hwDmacIrq(DMAC_TO_IPU);
 }
--- a/pcsx2/IPU/IPU.h
+++ b/pcsx2/IPU/IPU.h
@ -233,14 +233,11 @@ extern u8* g_pIPU0Pointer;
 PCSX2_ALIGNED16(extern macroblock_rgb32 rgb32);
 PCSX2_ALIGNED16(extern macroblock_8 mb8);
-void dmaIPU0();
+extern int ipuInit();
-void dmaIPU1();
+extern void ipuReset();
-
+extern void ipuShutdown();
-int ipuInit();
+extern int  ipuFreeze(gzFile f, int Mode);
-void ipuReset();
+extern bool ipuCanFreeze();
 void ipuShutdown();
 int  ipuFreeze(gzFile f, int Mode);
 bool ipuCanFreeze();
 extern u32 ipuRead32(u32 mem);
@ -248,11 +245,6 @@ extern u64 ipuRead64(u32 mem);
 extern void ipuWrite32(u32 mem,u32 value);
 extern void ipuWrite64(u32 mem,u64 value);
 int ipuConstRead32(u32 x86reg, u32 mem);
 void ipuConstRead64(u32 mem, int mmreg);
 void ipuConstWrite32(u32 mem, int mmreg);
 void ipuConstWrite64(u32 mem, int mmreg);
 extern void IPUCMD_WRITE(u32 val);
 extern void ipuSoftReset();
 extern void IPUProcessInterrupt();
@ -273,5 +265,6 @@ void FIFOfrom_read(void *value,int size);
 int FIFOto_read(void *value);
 int FIFOto_write(u32* pMem, int size);
 void FIFOto_clear();
 void FIFOfrom_clear();
 #endif
--- a/pcsx2/MTGS.cpp
+++ b/pcsx2/MTGS.cpp
@ -204,6 +204,7 @@ mtgsThreadObject::mtgsThreadObject() :
 void mtgsThreadObject::Start()
 {
 	m_post_InitDone.Reset();
 	PersistentThread::Start();
 	// Wait for the thread to finish initialization (it runs GSopen, which can take
--- a/pcsx2/Memory.cpp
+++ b/pcsx2/Memory.cpp
@ -22,7 +22,7 @@ RAM
 ---
 0x00100000-0x01ffffff this is the physical address for the ram.its cached there
 0x20100000-0x21ffffff uncached 
-0x30100000-0x31ffffff uncached & acceleretade
+0x30100000-0x31ffffff uncached & accelerated
 0xa0000000-0xa1ffffff MIRROR might...???
 0x80000000-0x81ffffff MIRROR might... ????
--- a/pcsx2/MemoryCard.h
+++ b/pcsx2/MemoryCard.h
@ -46,6 +46,26 @@ public:
 	static u64 GetCRC( uint mcdId );
 };
 struct superblock
 {
 	char magic[28]; 			// 0x00
 	char version[12]; 		// 0x1c
 	u16 page_len; 			// 0x28
 	u16 pages_per_cluster; 	// 0x2a
 	u16 pages_per_block;		// 0x2c
 	u16 unused; 			// 0x2e
 	u32 clusters_per_card; 	// 0x30
 	u32 alloc_offset; 			// 0x34
 	u32 alloc_end; 			// 0x38
 	u32 rootdir_cluster;		// 0x3c
 	u32 backup_block1;		// 0x40
 	u32 backup_block2;		// 0x44
 	u32 ifc_list[32]; 			// 0x50
 	u32 bad_block_list[32]; 	// 0xd0
 	u8 card_type; 			// 0x150
 	u8 card_flags; 			// 0x151
 };
 #if 0		// unused code?
 struct McdBlock
 {
--- a/pcsx2/SPR.cpp
+++ b/pcsx2/SPR.cpp
@ -22,6 +22,7 @@
 #include "SPR.h"
 #include "iR5900.h"
 #include "VUmicro.h"
 #include "Tags.h"
 extern void mfifoGIFtransfer(int);
@ -139,13 +140,15 @@ static __forceinline void _dmaSPR0()
 	}
 	// Transfer Dn_QWC from SPR to Dn_MADR
-	if ((spr0->chcr & 0xc) == 0x0)   // Normal Mode
+	switch(CHCR::MOD(spr0))
 	{
 		case NORMAL_MODE:
 		{
 			SPR0chain();
 			spr0finished = 1;
 			return;
 		}
-	else if ((spr0->chcr & 0xc) == 0x4)
+		case CHAIN_MODE:
 		{
 			u32 *ptag;
 			int id;
@ -161,11 +164,9 @@ static __forceinline void _dmaSPR0()
 			ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff];
 			spr0->sadr += 16;
-		// Transfer dma tag if tte is set
+			Tag::UnsafeTransfer(spr0, ptag);
-		spr0->chcr = (spr0->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);	//Transfer upper part of tag to CHCR bits 31-15
+			id = Tag::Id(ptag);
 		id = (ptag[0] >> 28) & 0x7;		//ID for DmaChain copied from bit 28 of the tag
 		spr0->qwc  = (u16)ptag[0];				//QWC set to lower 16bits of the tag
 			spr0->madr = ptag[1];					//MADR = ADDR field
 			SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx",
@ -178,20 +179,20 @@ static __forceinline void _dmaSPR0()
 			switch (id)
 			{
-			case 0: // CNTS - Transfer QWC following the tag (Stall Control)
+				case TAG_CNTS: // CNTS - Transfer QWC following the tag (Stall Control)
 					if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) psHu32(DMAC_STADR) = spr0->madr + (spr0->qwc * 16);					//Copy MADR to DMAC_STADR stall addr register
 					break;
-			case 1: // CNT - Transfer QWC following the tag.
+				case TAG_CNT: // CNT - Transfer QWC following the tag.
 					done = FALSE;
 					break;
-			case 7: // End - Transfer QWC following the tag
+				case TAG_END: // End - Transfer QWC following the tag
 					done = TRUE;
 					break;
 			}
 			SPR0chain();
-		if (spr0->chcr & 0x80 && ptag[0] >> 31)  			 //Check TIE bit of CHCR and IRQ bit of tag
+			if (CHCR::TIE(spr0) && Tag::IRQ(ptag))  			 //Check TIE bit of CHCR and IRQ bit of tag
 			{
 				//Console::WriteLn("SPR0 TIE");
 				done = TRUE;
@ -207,10 +208,14 @@ static __forceinline void _dmaSPR0()
 			}
 			SPR_LOG("spr0 dmaChain complete %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx",
 				ptag[1], ptag[0], spr0->qwc, id, spr0->madr);
 			break;
 		}
-	else   // Interleave Mode
+		//case INTERLEAVE_MODE:
 		default:
 		{
 			_SPR0interleave();
 			break;
 		}
 	}
 }
@ -227,7 +232,7 @@ void SPRFROMinterrupt()
 			//Console::WriteLn("mfifoGIFtransfer %x madr %x, tadr %x", params gif->chcr, gif->madr, gif->tadr);
 			mfifoGIFtransfer(mfifotransferred);
 			mfifotransferred = 0;
-			if(gif->chcr & 0x100)return;
+			if (CHCR::STR(gif)) return;
 		}
 		else if ((psHu32(DMAC_CTRL) & 0xC) == 0x8)   // VIF1 MFIFO
 		{
@ -236,11 +241,11 @@ void SPRFROMinterrupt()
 			//Console::WriteLn("mfifoVIF1transfer %x madr %x, tadr %x", params vif1ch->chcr, vif1ch->madr, vif1ch->tadr);
 			mfifoVIF1transfer(mfifotransferred);
 			mfifotransferred = 0;
-			if(vif1ch->chcr & 0x100)return;
+			if (CHCR::STR(vif1ch)) return;
 		}
 	}
 	if (spr0finished == 0) return;
-	spr0->chcr &= ~0x100;
+	CHCR::clearSTR(spr0);
 	hwDmacIrq(DMAC_FROM_SPR);
 }
@ -250,7 +255,7 @@ void dmaSPR0()   // fromSPR
 	SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc  = %lx, sadr = %lx",
 	        spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr);
-	if ((spr0->chcr & 0xc) == 0x4 && spr0->qwc == 0)
+	if ((CHCR::MOD(spr0) == CHAIN_MODE) && spr0->qwc == 0)
 	{
 		u32 *ptag;
 		ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff];		//Set memory pointer to SADR
@ -319,7 +324,9 @@ void _SPR1interleave()
 void _dmaSPR1()   // toSPR work function
 {
-	if ((spr1->chcr & 0xc) == 0)   // Normal Mode
+	switch(CHCR::MOD(spr1))
 	{
 		case NORMAL_MODE:
 		{
 			//int cycles = 0;
 			// Transfer Dn_QWC from Dn_MADR to SPR1
@ -327,7 +334,7 @@ void _dmaSPR1()   // toSPR work function
 			spr1finished = 1;
 			return;
 		}
-	else if ((spr1->chcr & 0xc) == 0x4)
+		case CHAIN_MODE:
 		{
 			u32 *ptag;
 			int id;
@ -343,23 +350,18 @@ void _dmaSPR1()   // toSPR work function
 			// Chain Mode
 			ptag = (u32*)dmaGetAddr(spr1->tadr);		//Set memory pointer to TADR
-		if (ptag == NULL)  							//Is ptag empty?
+			
 			if (!(Tag::Transfer("SPR1 Tag", spr1, ptag)))
 			{
 			Console::WriteLn("SPR1 Tag BUSERR");
 			spr1->chcr = (spr1->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);	//Transfer upper part of tag to CHCR bits 31-15
 			psHu32(DMAC_STAT) |= DMAC_STAT_BEIS;				//If yes, set BEIS (BUSERR) in DMAC_STAT register
 				done = TRUE;
 				spr1finished = (done) ? 1: 0;
 			return;
 			}
 		spr1->chcr = (spr1->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);	//Transfer upper part of tag to CHCR bits 31-15
-		id = (ptag[0] >> 28) & 0x7;			//ID for DmaChain copied from bit 28 of the tag
+			id = Tag::Id(ptag);
 		spr1->qwc  = (u16)ptag[0];					//QWC set to lower 16bits of the tag until SPR1chain is called in a few lines.
 			spr1->madr = ptag[1];						//MADR = ADDR field
 			// Transfer dma tag if tte is set
-		if (spr1->chcr & 0x40)
+			if (CHCR::TTE(spr1))
 			{
 				SPR_LOG("SPR TTE: %x_%x\n", ptag[3], ptag[2]);
 				SPR1transfer(ptag, 4);				//Transfer Tag
@ -371,7 +373,7 @@ void _dmaSPR1()   // toSPR work function
 			done = (hwDmacSrcChain(spr1, id) == 1);
 			SPR1chain();										//Transfers the data set by the switch
-		if (spr1->chcr & 0x80 && ptag[0] >> 31)  			//Check TIE bit of CHCR and IRQ bit of tag
+			if (CHCR::TIE(spr1) && Tag::IRQ(ptag))  			//Check TIE bit of CHCR and IRQ bit of tag
 			{
 				SPR_LOG("dmaIrq Set");
@ -385,10 +387,14 @@ void _dmaSPR1()   // toSPR work function
 				ptag = (u32*)dmaGetAddr(spr1->tadr);		//Set memory pointer to TADR
 				CPU_INT(9, (((u16)ptag[0]) / BIAS));// the lower 16 bits of the tag / BIAS);
 			}
 			break;
 		}
-	else   // Interleave Mode
+		//case INTERLEAVE_MODE:
 		default:
 		{
 			_SPR1interleave();
 			break;
 		}
 	}
 }
@ -400,7 +406,7 @@ void dmaSPR1()   // toSPR
 	        spr1->chcr, spr1->madr, spr1->qwc,
 	        spr1->tadr, spr1->sadr);
-	if (((spr1->chcr & 0xc) == 0x4) && (spr1->qwc == 0))
+	if ((CHCR::MOD(spr1) == CHAIN_MODE) && (spr1->qwc == 0))
 	{
 		u32 *ptag;
 		ptag = (u32*)dmaGetAddr(spr1->tadr);		//Set memory pointer to TADR
@ -417,7 +423,7 @@ void SPRTOinterrupt()
 {
 	_dmaSPR1();
 	if (spr1finished == 0) return;
-	spr1->chcr &= ~0x100;
+	CHCR::clearSTR(spr1);
 	hwDmacIrq(DMAC_TO_SPR);
 }
--- a/pcsx2/Sif.cpp
+++ b/pcsx2/Sif.cpp
@ -22,6 +22,7 @@
 #include "IopCommon.h"
 #include "Sifcmd.h"
 #include "Tags.h"
 using namespace std;
@ -139,6 +140,7 @@ __forceinline void SIF0Dma()
 			if (sif0.counter == 0) // If there's no more to transfer
 			{
 				// Note.. add normal mode here
 				// The if statement doesn't seem to match the description...
 				if (sif0.sifData.data & 0xC0000000) // If NORMAL mode or end of CHAIN, or interrupt then stop DMA
 				{
 					SIF_LOG(" IOP SIF Stopped");
@ -152,7 +154,7 @@ __forceinline void SIF0Dma()
 					PSX_INT(IopEvt_SIF0, psxCycles);
 					sif0.sifData.data = 0;
-					done = TRUE;
+					done = true;
 				}
 				else  // Chain mode
 				{
@ -172,7 +174,7 @@ __forceinline void SIF0Dma()
 						SIF_LOG("   END");
 					else
 						SIF_LOG("   CNT %08X, %08X", sif0.sifData.data, sif0.sifData.words);
-					done = FALSE;
+					done = false;
 				}
 			}
 			else // There's some data ready to transfer into the fifo..
@ -219,7 +221,8 @@ __forceinline void SIF0Dma()
 			if (sif0dma->qwc == 0)
 			{
-				if (((sif0dma->chcr & 0x80000080) == 0x80000080) || (sif0.end)) // Stop on tag IRQ or END
+				// Stop if TIE & the IRQ are set, or at the end. (I'll try to convert this to use the tags code later.)
 				if (((sif0dma->chcr & 0x80000080) == 0x80000080) || (sif0.end)) 
 				{
 					if (sif0.end)
 						SIF_LOG(" EE SIF end"); 
@ -228,7 +231,7 @@ __forceinline void SIF0Dma()
 					eesifbusy[0] = 0;
 					CPU_INT(5, cycles*BIAS);
-					done = TRUE;
+					done = true;
 				}
 				else if (sif0.fifoSize >= 4) // Read a tag
 				{
@ -242,11 +245,12 @@ __forceinline void SIF0Dma()
 					SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)", sif0dma->madr, sif0dma->qwc, (tag[0] >> 28)&3, (tag[0] >> 31)&1, tag[1], tag[0]);
 					//  (tag[0] >> 28) & 3? Surely this is supposed to be (tag[0] >> 28) & 7? --arcum42
 					if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0] >> 28) & 3) == 0)
 						psHu32(DMAC_STADR) = sif0dma->madr + (sif0dma->qwc * 16);
 					sif0.chain = 1;
 					if (tag[0] & 0x40000000) sif0.end = 1;
-					done = FALSE;
+					done = false;
 				}
 			}
@ -257,7 +261,6 @@ __forceinline void SIF0Dma()
 __forceinline void SIF1Dma()
 {
 	int id;
 	u32 *ptag;
 	bool done = FALSE;
 	int cycles = 0, psxCycles = 0;
@ -271,12 +274,12 @@ __forceinline void SIF1Dma()
 			if (sif1dma->qwc == 0) // If there's no more to transfer
 			{
-				if ((sif1dma->chcr & 0xc) == 0 || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA
+				if ((CHCR::MOD(sif1dma) == NORMAL_MODE) || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA
 				{
 					// Stop & signal interrupts on EE
 					SIF_LOG("EE SIF1 End %x", sif1.end);
 					eesifbusy[1] = 0;
-					done = TRUE;
+					done = true;
 					CPU_INT(6, cycles*BIAS);
 					sif1.chain = 0;
 					sif1.end = 0;
@ -284,7 +287,7 @@ __forceinline void SIF1Dma()
 				else // Chain mode
 				{
 					// Process DMA tag at sif1dma->tadr
-					done = FALSE;
+					done = false;
 					ptag = _dmaGetAddr(sif1dma, sif1dma->tadr, 6);
 					if (ptag == NULL) return;
@ -294,44 +297,43 @@ __forceinline void SIF1Dma()
 					sif1dma->chcr = (sif1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);     // Copy the tag
 					sif1dma->qwc = (u16)ptag[0];
-					if (sif1dma->chcr & 0x40)
+					if (CHCR::TTE(sif1dma))
 					{
 						Console::WriteLn("SIF1 TTE");
 						SIF1write(ptag + 2, 2);
 					}
 					sif1.chain = 1;
 					id = (ptag[0] >> 28) & 0x7;
-					switch (id)
+					switch (Tag::Id(ptag))
 					{
-						case 0: // refe
+						case TAG_REFE: // refe
 							SIF_LOG("   REFE %08X", ptag[1]);
 							sif1.end = 1;
 							sif1dma->madr = ptag[1];
 							sif1dma->tadr += 16;
 							break;
-						case 1: // cnt
+						case TAG_CNT: // cnt
 							SIF_LOG("   CNT");
 							sif1dma->madr = sif1dma->tadr + 16;
 							sif1dma->tadr = sif1dma->madr + (sif1dma->qwc << 4);
 							break;
-						case 2: // next
+						case TAG_NEXT: // next
 							SIF_LOG("   NEXT %08X", ptag[1]);
 							sif1dma->madr = sif1dma->tadr + 16;
 							sif1dma->tadr = ptag[1];
 							break;
-						case 3: // ref
+						case TAG_REF: // ref
-						case 4: // refs
+						case TAG_REFS: // refs
 							SIF_LOG("   REF %08X", ptag[1]);
 							sif1dma->madr = ptag[1];
 							sif1dma->tadr += 16;
 							break;
-						case 7: // end
+						case TAG_END: // end
 							SIF_LOG("   END");
 							sif1.end = 1;
 							sif1dma->madr = sif1dma->tadr + 16;
@ -341,7 +343,7 @@ __forceinline void SIF1Dma()
 						default:
 							Console::WriteLn("Bad addr1 source chain");
 					}
-					if ((sif1dma->chcr & 0x80) && (ptag[0] >> 31))
+					if ((CHCR::TIE(sif1dma)) && (Tag::IRQ(ptag)))
 					{
 						Console::WriteLn("SIF1 TIE");
 						sif1.end = 1;
@ -373,7 +375,7 @@ __forceinline void SIF1Dma()
 		{
 			int size = sif1.counter;
-			if (size > 0) // If we're reading something continue to do so
+			if (size > 0) // If we're reading something, continue to do so.
 			{
 				int readSize = size;
@ -400,7 +402,7 @@ __forceinline void SIF1Dma()
 					iopsifbusy[1] = 0;
 					PSX_INT(IopEvt_SIF1, psxCycles);
 					sif1.tagMode = 0;
-					done = TRUE;
+					done = true;
 				}
 				else if (sif1.fifoSize >= 4) // Read a tag
 				{
@ -410,7 +412,7 @@ __forceinline void SIF1Dma()
 					HW_DMA10_MADR = d.data & 0xffffff;
 					sif1.counter = d.words;
 					sif1.tagMode = (d.data >> 24) & 0xFF;
-					done = FALSE;
+					done = false;
 				}
 			}
 		}
@ -432,14 +434,14 @@ __forceinline void  sif1Interrupt()
 __forceinline void  EEsif0Interrupt()
 {
 	sif0dma->chcr &= ~0x100;
 	hwDmacIrq(DMAC_SIF0);
 	CHCR::clearSTR(sif0dma);
 }
 __forceinline void  EEsif1Interrupt()
 {
 	hwDmacIrq(DMAC_SIF1);
-	sif1dma->chcr &= ~0x100;
+	CHCR::clearSTR(sif1dma);
 }
 __forceinline void dmaSIF0()
@ -494,7 +496,7 @@ __forceinline void dmaSIF2()
 	SIF_LOG("dmaSIF2 chcr = %lx, madr = %lx, qwc  = %lx",
 	        sif2dma->chcr, sif2dma->madr, sif2dma->qwc);
-	sif2dma->chcr &= ~0x100;
+	CHCR::clearSTR(sif2dma);
 	hwDmacIrq(DMAC_SIF2);
 	Console::WriteLn("*PCSX2*: dmaSIF2");
 }
--- a/pcsx2/Tags.h
+++ b/pcsx2/Tags.h
@ -0,0 +1,312 @@
 /*  Pcsx2 - Pc Ps2 Emulator
 *  Copyright (C) 2002-2009  Pcsx2 Team
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
 */
 // This is meant to be a collection of generic functions dealing with tags.
 // I kept seeing the same code over and over with different structure names
 // and the same members, and figured it'd be a good spot to use templates...
 // Actually, looks like I didn't need templates after all... :)
 enum mfd_type 
 {
 	NO_MFD,
 	MFD_RESERVED,
 	MFD_VIF1,
 	MFD_GIF
 };
 enum sts_type 
 {
 	NO_STS,
 	STS_SIF0,
 	STS_fromSPR,
 	STS_fromIPU
 };
 enum std_type 
 {
 	NO_STD,
 	STD_VIF1,
 	STD_GIF,
 	STD_SIF1
 };
 enum d_ctrl_flags
 {
 	CTRL_DMAE = 0x1, // 0/1 - disables/enables all DMAs
 	CTRL_RELE = 0x2, // 0/1 - cycle stealing off/on
 	CTRL_MFD = 0xC, // Memory FIFO drain channel (mfd_type)
 	CTRL_STS = 0x30, // Stall Control source channel (sts type)
 	CTRL_STD = 0xC0, // Stall Controll drain channel (std_type)
 	CTRL_RCYC = 0x100 // Release cycle (8/16/32/64/128/256)
 	// When cycle stealing is on, the release cycle sets the period to release
 	// the bus to EE.
 };
 enum pce_values
 {
 	PCE_NOTHING = 0, 
 	PCE_RESERVED,
 	PCE_DISABLED,
 	PCE_ENABLED
 };
 enum tag_id
 {
 	TAG_CNTS = 0,	
 	TAG_REFE = 0, 	// Transfer Packet According to ADDR field, clear STR, and end
 	TAG_CNT, 		// Transfer QWC following the tag.
 	TAG_NEXT,		// Transfer QWC following tag. TADR = ADDR
 	TAG_REF,			// Transfer QWC from ADDR field
 	TAG_REFS,		// Transfer QWC from ADDR field (Stall Control)
 	TAG_CALL,		// Transfer QWC following the tag, save succeeding tag
 	TAG_RET,			// Transfer QWC following the tag, load next tag
 	TAG_END			// Transfer QWC following the tag
 };
 enum chcr_flags
 {
 	CHCR_DIR = 0x1, 	// Direction: 0 - to memory, 1 - from memory. VIF1 & SIF2 only.
 	CHCR_MOD1 = 0x4, 
 	CHCR_MOD2 = 0x8,
 	CHCR_MOD = 0xC, 	// MOD1 & MOD2; Holds which of the Transfer modes above is used.
 	CHCR_ASP1 = 0x10,
 	CHCR_ASP2 = 0x20,
 	CHCR_ASP = 0x30, 	// ASP1 & ASP2; Address stack pointer. 0, 1, or 2 addresses.
 	CHCR_TTE = 0x40, 	// Tag Transfer Enable. 0 - Diable / 1 - Enable.
 	CHCR_TIE = 0x80, 	// Tag Interrupt Enable. 0 - Diable / 1 - Enable.
 	CHCR_STR = 0x100 	// Start. 0 while stopping DMA, 1 while it's running.
 };
 enum TransferMode
 {
 	NORMAL_MODE = 0,
 	CHAIN_MODE,
 	INTERLEAVE_MODE,
 	UNDEFINED_MODE
 };
 namespace Tag
 {
 	// Transfer functions,
 	static __forceinline void UpperTransfer(DMACh *tag, u32* ptag)
 	{
 		// Transfer upper part of tag to CHCR bits 31-15
 		tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);
 	}
 	static __forceinline void LowerTransfer(DMACh *tag, u32* ptag)
 	{
 		//QWC set to lower 16bits of the tag
 		tag->qwc = (u16)ptag[0];
 	}
 	static __forceinline bool Transfer(const char *s, DMACh *tag, u32* ptag)
 	{
 		if (ptag == NULL)  					 // Is ptag empty?
 		{
 			Console::Error("%s BUSERR", params s);
 			UpperTransfer(tag, ptag);
 			// Set BEIS (BUSERR) in DMAC_STAT register
 			psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; 
 			return false;
 		}
 		else
 		{
 			UpperTransfer(tag, ptag);
 			LowerTransfer(tag, ptag);
 			return true;
 		}
 	}
 	/*// Not sure if I'll need this one.
 	static __forceinline bool SafeTransfer(const char *s, DMACh *tag, u32* ptag)
 	{
 		if (ptag == NULL)  					 // Is ptag empty?
 		{
 			Console::Error("%s BUSERR", params s);
 			// Set BEIS (BUSERR) in DMAC_STAT register
 			psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; 
 			return false;
 		}
 		else
 		{
 			UpperTransfer(tag, ptag);
 			LowerTransfer(tag, ptag);
 			return true;
 		}
 	}*/
 	static __forceinline void UnsafeTransfer(DMACh *tag, u32* ptag)
 	{
 		UpperTransfer(tag, ptag);
 		LowerTransfer(tag, ptag);
 	}
 	// Untested
 	static __forceinline u16 QWC(u32 *tag)
 	{
 		return (tag[0] & 0xffff);
 	}
 	// Untested
 	static __forceinline pce_values PCE(u32 *tag)
 	{
 		return (pce_values)((tag[0] >> 22) & 0x3);
 	}
 	static __forceinline tag_id Id(u32* tag)
 	{
 		return (tag_id)((tag[0] >> 28) & 0x7);
 	}
 	static __forceinline tag_id Id(u32 tag)
 	{
 		return (tag_id)((tag >> 28) & 0x7);
 	}
 	static __forceinline bool IRQ(u32 *tag)
 	{
 		return !!(tag[0] >> 31);
 	}
 	static __forceinline bool IRQ(u32 tag)
 	{
 		return !!(tag >> 31);
 	}
 }
 namespace CHCR
 {
 	// Query the flags in the channel control register.
 	static __forceinline bool STR(DMACh *tag) { return !!(tag->chcr & CHCR_STR); }
 	static __forceinline bool TIE(DMACh *tag) { return !!(tag->chcr & CHCR_TIE); }
 	static __forceinline bool TTE(DMACh *tag) { return !!(tag->chcr & CHCR_TTE); }
 	static __forceinline u8 DIR(DMACh *tag) { return (tag->chcr & CHCR_DIR); }
 	static __forceinline TransferMode MOD(DMACh *tag)
 	{
 		return (TransferMode)((tag->chcr & CHCR_MOD) >> 2);
 	}
 	static __forceinline u8 ASP(DMACh *tag)
 	{
 		return (TransferMode)((tag->chcr & CHCR_ASP) >> 4);
 	}
 	// Clear the individual flags.
 	static __forceinline void clearSTR(DMACh *tag) { tag->chcr &= ~CHCR_STR; }
 	static __forceinline void clearTIE(DMACh *tag) { tag->chcr &= ~CHCR_TIE; }
 	static __forceinline void clearTTE(DMACh *tag) { tag->chcr &= ~CHCR_TTE; }
 	static __forceinline void clearDIR(DMACh *tag) { tag->chcr &= ~CHCR_DIR; }
 	// Set them.
 	static __forceinline void setSTR(DMACh *tag) { tag->chcr |= CHCR_STR; }
 	static __forceinline void setTIE(DMACh *tag) { tag->chcr |= CHCR_TIE; }
 	static __forceinline void setTTE(DMACh *tag) { tag->chcr |= CHCR_TTE; }
 	static __forceinline void setDIR(DMACh *tag) { tag->chcr |= CHCR_DIR; }
 	static __forceinline void setMOD(DMACh *tag, TransferMode mode)
 	{
 		if (mode & (1 << 0))
 			tag->chcr |= CHCR_MOD1; 
 		else
 			tag->chcr &= CHCR_MOD1; 
 		if (mode & (1 << 1)) 
 			tag->chcr |= CHCR_MOD2;
 		else
 			tag->chcr &= CHCR_MOD2;
 	}
 	static __forceinline void setASP(DMACh *tag, u8 num)
 	{
 		if (num & (1 << 0))
 			tag->chcr |= CHCR_ASP1; 
 		else
 			tag->chcr &= CHCR_ASP2; 
 		if (num & (1 << 1)) 
 			tag->chcr |= CHCR_ASP1;
 		else
 			tag->chcr &= CHCR_ASP2;
 	}
 	// Print information about a chcr tag.
 	static __forceinline void Print(const char*  s, DMACh *tag)
 	{
 		u8 num_addr = ASP(tag);
 		TransferMode mode = MOD(tag);
 		Console::Write("%s chcr %s mem: ", params s, (DIR(tag)) ? "from" : "to");
 		if (mode == NORMAL_MODE)
 			Console::Write(" normal mode; ");
 		else if (mode == CHAIN_MODE)
 			Console::Write(" chain mode; ");
 		else if (mode == INTERLEAVE_MODE)
 			Console::Write(" interleave mode; ");
 		else
 			Console::Write(" ?? mode; ");
 		if (num_addr != 0) Console::Write("ASP = %d;", params num_addr);
 		if (TTE(tag)) Console::Write("TTE;");
 		if (TIE(tag)) Console::Write("TIE;");
 		if (STR(tag)) Console::Write(" (DMA started)."); else Console::Write(" (DMA stopped).");
 		Console::WriteLn("");
 	}
 }
 namespace QWC
 {
 	static __forceinline bool Empty(DMACh *tag)
 	{
 		return (tag->qwc == 0);
 	}
 	static __forceinline void Clear(DMACh *tag)
 	{
 		tag->qwc = 0;
 	}
 }
 namespace D_CTRL
 {
 	static __forceinline bool DMAE() { return !!(psHu32(DMAC_CTRL) & CTRL_DMAE); }
 	static __forceinline bool RELE() { return !!(psHu32(DMAC_CTRL) & CTRL_RELE); }
 	static __forceinline mfd_type MFD() 
 	{ 
 		return (mfd_type)((psHu32(DMAC_CTRL) & CTRL_MFD) >> 2);
 	}
 	static __forceinline sts_type STS() 
 	{ 
 		return (sts_type)((psHu32(DMAC_CTRL) & CTRL_STS) >> 4);
 	}
 	static __forceinline std_type STD() 
 	{ 
 		return (std_type)((psHu32(DMAC_CTRL) & CTRL_STD) >> 6);
 	}
 	static __forceinline int RCLC() 
 	{ 
 		return ((((psHu32(DMAC_CTRL) & CTRL_RCYC) >> 3) + 1) * 8);
 	}
 }
--- a/pcsx2/Vif.cpp
+++ b/pcsx2/Vif.cpp
@ -24,6 +24,7 @@
 #include "VUmicro.h"
 #include "Vif.h"
 #include "VifDma.h"
 #include "Tags.h"
 VIFregisters *vifRegs;
 u32* vifRow = NULL;
@ -452,7 +453,7 @@ void mfifoVIF1transfer(int qwc)
 	{
 		ptag = (u32*)dmaGetAddr(vif1ch->tadr);
-		if (vif1ch->chcr & 0x40)
+		if (CHCR::TTE(vif1ch))
 		{
 			if (vif1.stallontag)
 				ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1);  //Transfer Tag on Stall
@ -467,30 +468,29 @@ void mfifoVIF1transfer(int qwc)
 			}
 		}
-		id = (ptag[0] >> 28) & 0x7;
+		Tag::UnsafeTransfer(vif1ch, ptag);
 		vif1ch->qwc  = (ptag[0] & 0xffff);
 		vif1ch->madr = ptag[1];
-		vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000);
+		vif1ch->madr = ptag[1];
 		id =Tag::Id(ptag);
 		vifqwc--;
 		SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x",
        ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr);
 		vifqwc--;
 		switch (id)
 		{
-			case 0: // Refe - Transfer Packet According to ADDR field
+			case TAG_REFE: // Refe - Transfer Packet According to ADDR field
 				vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR));
 				vif1.done = true;										//End Transfer
 				break;
-			case 1: // CNT - Transfer QWC following the tag.
+			case TAG_CNT: // CNT - Transfer QWC following the tag.
 				vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR));						//Set MADR to QW after Tag
 				vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR));			//Set TADR to QW following the data
 				vif1.done = false;
 				break;
-			case 2: // Next - Transfer QWC following tag. TADR = ADDR
+			case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR
 			{
 				int temp = vif1ch->madr;								//Temporarily Store ADDR
 				vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); 					  //Set MADR to QW following the tag
@ -500,20 +500,20 @@ void mfifoVIF1transfer(int qwc)
 				break;
 			}
-			case 3: // Ref - Transfer QWC from ADDR field
+			case TAG_REF: // Ref - Transfer QWC from ADDR field
-			case 4: // Refs - Transfer QWC from ADDR field (Stall Control)
+			case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control)
 				vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR));							//Set TADR to next tag
 				vif1.done = false;
 				break;
-			case 7: // End - Transfer QWC following the tag
+			case TAG_END: // End - Transfer QWC following the tag
 				vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR));		//Set MADR to data following the tag
 				vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR));			//Set TADR to QW following the data
 				vif1.done = true;										//End Transfer
 				break;
 		}
-		if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31))
+		if ((CHCR::TIE(vif1ch)) && (Tag::IRQ(ptag)))
 		{
 			VIF_LOG("dmaIrq Set");
 			vif1.done = true;
@ -533,25 +533,24 @@ void vifMFIFOInterrupt()
 	if ((vif1Regs->stat & VIF1_STAT_VGW))
 	{
-		if(gif->chcr & 0x100)
+		if (CHCR::STR(gif))
 		{			
 			CPU_INT(10, 16);
 			return;
 		} 
-		else vif1Regs->stat &= ~VIF1_STAT_VGW;
+		else 
 		{
 			vif1Regs->stat &= ~VIF1_STAT_VGW;
 		}
 	}
-	if((spr0->chcr & 0x100) && spr0->qwc == 0)
+	if ((CHCR::STR(spr0)) && (spr0->qwc == 0))
 	{
-		spr0->chcr &= ~0x100;
+		CHCR::clearSTR(spr0);
 		hwDmacIrq(DMAC_FROM_SPR);
 	}
 	if (vif1.irq && vif1.tag.size == 0)
 	{
 		vif1Regs->stat |= VIF1_STAT_INT;
@ -560,7 +559,7 @@ void vifMFIFOInterrupt()
 		if (vif1Regs->stat & (VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS))
 		{
 			vif1Regs->stat &= ~0x1F000000; // FQC=0
-			vif1ch->chcr &= ~0x100;
+			CHCR::clearSTR(vif1ch);
 			return;
 		}
 	}
@ -607,7 +606,7 @@ void vifMFIFOInterrupt()
 	vif1.done = 1;
 	g_vifCycles = 0;
-	vif1ch->chcr &= ~0x100;
+	CHCR::clearSTR(vif1ch);
 	hwDmacIrq(DMAC_VIF1);
 	VIF_LOG("vif mfifo dma end");
--- a/pcsx2/VifDma.cpp
+++ b/pcsx2/VifDma.cpp
@ -23,6 +23,7 @@
 #include "VUmicro.h"
 #include "GS.h"
 #include "VifDma.h"
 #include "Tags.h"
 #include <xmmintrin.h>
 #include <emmintrin.h>
@ -425,23 +426,19 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int
 			{
 				vif->tag.addr += (((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + ((4 - ft->qsize) + unpacksize)) * 4;
 				dest += ((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + (4 - ft->qsize) + unpacksize;
 				if(vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) 
 				{
 					vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff);
 					dest = (u32*)(VU->Mem + v->addr);
 				}
 			}
 			else
 			{
 				vif->tag.addr += ((4 - ft->qsize) + unpacksize) * 4;
 				dest += (4 - ft->qsize) + unpacksize;
 			}
 			if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) 
 			{
 				vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff);
 				dest = (u32*)(VU->Mem + v->addr);
 			}
 			}
 			cdata += unpacksize * ft->dsize;
 			vif->cl = 0;
 			VIFUNPACK_LOG("Aligning packet done size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr);
@ -452,11 +449,13 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int
 		{
 			vif->tag.addr += ((4 - ft->qsize) + unpacksize) * 4;
 			dest += (4 - ft->qsize) + unpacksize;
 			if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) 
 			{
 				vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff);
 				dest = (u32*)(VU->Mem + v->addr);
 			}
 			cdata += unpacksize * ft->dsize;
 			VIFUNPACK_LOG("Aligning packet done size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr);
 		}
@ -498,6 +497,8 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int
 					dest += 4;
 					vif->tag.addr += 16;
 				}
 				// Hurrah for the 4th occurrance of this piece of code in this function...
 				if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) 
 				{
 					vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff);
@ -629,7 +630,7 @@ static void VIFunpack(u32 *data, vifCode *v, unsigned int size, const unsigned i
 			       ((memlimit + (vifRegs->cycle.cl - vifRegs->cycle.wl) * 16) == tempsize) || 
 			       (tempsize == memlimit)))
 			{
-				//Its a red herring! so ignore it! SSE unpacks will be much quicker
+				//It's a red herring, so ignore it! SSE unpacks will be much quicker.
 				tempsize = 0;
 			}
 			else
@ -985,6 +986,7 @@ static int __fastcall Vif0TransNull(u32 *data)  // Shouldnt go here
 	vif0.cmd = 0;
 	return 0;
 }
 static int __fastcall Vif0TransSTMask(u32 *data)  // STMASK
 {
 	SetNewMask(g_vif0Masks, g_vif0HasMask3, data[0], vif0Regs->mask);
@ -1372,30 +1374,24 @@ int _chainVIF0()
 	int id, ret;
 	vif0ptag = (u32*)dmaGetAddr(vif0ch->tadr); //Set memory pointer to TADR
 	if (vif0ptag == NULL)  						//Is vif0ptag empty?
 	{
 		Console::Error("Vif0 Tag BUSERR");
 		vif0ch->chcr = (vif0ch->chcr & 0xFFFF) | ((*vif0ptag) & 0xFFFF0000);     //Transfer upper part of tag to CHCR bits 31-15
 		psHu32(DMAC_STAT) |= DMAC_STAT_BEIS;       //If yes, set BEIS (BUSERR) in DMAC_STAT register
 		return -1;						   //Return -1 as an error has occurred
 	}
-	id = (vif0ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag
+	if (!(Tag::Transfer("Vif0 Tag", vif0ch, vif0ptag))) return -1;
-	vif0ch->qwc  = (u16)vif0ptag[0];       //QWC set to lower 16bits of the tag
+	
 	vif0ch->madr = vif0ptag[1];		// MADR = ADDR field
-	g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag
+	id = Tag::Id(vif0ptag); 	// ID for DmaChain copied from bit 28 of the tag
 	g_vifCycles += 1; 				// Increase the QW read for the tag
 	VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx",
 	        vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr);
 	vif0ch->chcr = (vif0ch->chcr & 0xFFFF) | ((*vif0ptag) & 0xFFFF0000);     //Transfer upper part of tag to CHCR bits 31-15
 	// Transfer dma tag if tte is set
-
+	if (CHCR::TTE(vif0ch))
 	if (vif0ch->chcr & 0x40)
 	{
 		if (vif0.vifstalled) 
 			ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, 1);  //Transfer Tag on stall
 		else 
 			ret = VIF0transfer(vif0ptag + 2, 2, 1);  //Transfer Tag
 		if (ret == -1) return -1;       //There has been an error
 		if (ret == -2) return -2;        //IRQ set by VIFTransfer
 	}
@ -1407,7 +1403,7 @@ int _chainVIF0()
 	ret = _VIF0chain();											   //Transfers the data set by the switch
-	if ((vif0ch->chcr & 0x80) && (vif0ptag[0] >> 31))  			       //Check TIE bit of CHCR and IRQ bit of tag
+	if (CHCR::TIE(vif0ch) && Tag::IRQ(vif0ptag))  			       //Check TIE bit of CHCR and IRQ bit of tag
 	{
 		VIF_LOG("dmaIrq Set\n");
@ -1430,7 +1426,7 @@ void  vif0Interrupt()
 		if (vif0Regs->stat & (VIF0_STAT_VSS | VIF0_STAT_VIS | VIF0_STAT_VFS))
 		{
 			vif0Regs->stat &= ~0xF000000; // FQC=0
-			vif0ch->chcr &= ~0x100;
+			CHCR::clearSTR(vif0ch);
 			return;
 		}
@ -1446,9 +1442,9 @@ void  vif0Interrupt()
 		}
 	}
-	if ((vif0ch->chcr & 0x100) == 0) Console::WriteLn("Vif0 running when CHCR = %x", params vif0ch->chcr);
+	if (!CHCR::STR(vif0ch)) Console::WriteLn("Vif0 running when CHCR = %x", params vif0ch->chcr);
-	if ((vif0ch->chcr & 0x4) && (!vif0.done) && (!vif0.vifstalled))
+	if ((CHCR::MOD(vif0ch) == CHAIN_MODE) && (!vif0.done) && (!vif0.vifstalled))
 	{
 		if (!(psHu32(DMAC_CTRL) & 0x1))
@ -1469,7 +1465,7 @@ void  vif0Interrupt()
 	if (vif0ch->qwc > 0) Console::WriteLn("VIF0 Ending with QWC left");
 	if (vif0.cmd != 0) Console::WriteLn("vif0.cmd still set %x", params vif0.cmd);
-	vif0ch->chcr &= ~0x100;
+	CHCR::clearSTR(vif0ch);
 	hwDmacIrq(DMAC_VIF0);
 	vif0Regs->stat &= ~0xF000000; // FQC=0
 }
@ -1612,7 +1608,7 @@ void vif0Write32(u32 mem, u32 value)
 						else
 							_VIF0chain();
-						vif0ch->chcr |= 0x100;
+						CHCR::setSTR(vif0ch);
 						CPU_INT(0, g_vifCycles); // Gets the timing right - Flatout
 					}
 				}
@ -1658,7 +1654,7 @@ void vif0Reset()
 	memzero_obj(*vif0Regs);
 	SetNewMask(g_vif0Masks, g_vif0HasMask3, 0, 0xffffffff);
 	psHu64(VIF0_FIFO) = 0;
-	psHu64(0x10004008) = 0; // VIF0_FIFO + 8
+	psHu64(VIF0_FIFO + 8) = 0;
 	vif0Regs->stat &= ~VIF0_STAT_VPS;
 	vif0.done = true;
 	vif0Regs->stat &= ~0xF000000; // FQC=0
@ -1866,7 +1862,7 @@ static int __fastcall Vif1TransDirectHL(u32 *data)
 	if ((vif1.cmd & 0x7f) == 0x51)
 	{
-		if (gif->chcr & 0x100 && (!vif1Regs->mskpath3 && (Path3progress == IMAGE_MODE))) //PATH3 is in image mode, so wait for end of transfer
+		if (CHCR::STR(gif) && (!vif1Regs->mskpath3 && (Path3progress == IMAGE_MODE))) //PATH3 is in image mode, so wait for end of transfer
 		{
 			vif1Regs->stat |= VIF1_STAT_VGW;
 			return 0;
@ -1948,8 +1944,7 @@ static int  __fastcall Vif1TransUnpack(u32 *data)
 	if (vif1.vifpacketsize < vif1.tag.size)
 	{
 		int ret = vif1.tag.size;
-		/* size is less that the total size, transfer is
+		/* size is less that the total size, transfer is  'in pieces' */
 		   'in pieces' */
 		if(vif1Regs->offset != 0 || vif1.cl != 0) 
 		{
 			vif1.tag.size -= vif1.vifpacketsize - VIFalign(data, &vif1.tag, vif1.vifpacketsize, VIF1dmanum);
@ -2060,7 +2055,7 @@ void Vif1MskPath3()  // MSKPATH3
 }
 static void Vif1CMDMskPath3()  // MSKPATH3
 {
-	if(vif1ch->chcr & 0x100)
+	if (CHCR::STR(vif1ch))
 	{
 		schedulepath3msk = 0x10 | ((vif1Regs->code >> 15) & 0x1);
 		vif1.vifstalled = true;
@ -2088,7 +2083,7 @@ static void Vif1CMDFlush()  // FLUSH/E/A
 	if ((vif1.cmd & 0x7f) == 0x13)
 	{
 		// Gif is already transferring so wait for it.
-		if (((Path3progress != STOPPED_MODE) || !vif1Regs->mskpath3) && gif->chcr & 0x100)
+		if (((Path3progress != STOPPED_MODE) || !vif1Regs->mskpath3) && CHCR::STR(gif))
 		{	
 			vif1Regs->stat |= VIF1_STAT_VGW;	
 			CPU_INT(2, 4);
@ -2223,7 +2218,9 @@ int VIF1transfer(u32 *data, int size, int istag)
 			ret = Vif1TransTLB[vif1.cmd](data);
 			data += ret;
 			vif1.vifpacketsize -= ret;
-			if (vif1.cmd == 0) vif1Regs->stat &= ~VIF1_STAT_VPS_T; //We are once again waiting for a new vifcode as the command has cleared
+			
 			//We are once again waiting for a new vifcode as the command has cleared
 			if (vif1.cmd == 0) vif1Regs->stat &= ~VIF1_STAT_VPS_T; 
 			continue;
 		}
@ -2290,8 +2287,7 @@ int VIF1transfer(u32 *data, int size, int istag)
 		if (((vif1Regs->code >> 24) & 0x7f) != 0x7) vif1Regs->stat |= VIF1_STAT_VIS; // Note: commenting this out fixes WALL-E
-		if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1))
+		if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1;
 			vif1.inprogress &= ~0x1;
 		// spiderman doesn't break on qw boundaries
 		if (istag) return -2;
@ -2321,8 +2317,7 @@ int VIF1transfer(u32 *data, int size, int istag)
 	}
-	if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1))
+	if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1;
 		vif1.inprogress &= ~0x1;
 	return vif1.vifstalled ? -2 : 0;
 }
@ -2393,7 +2388,7 @@ int  _VIF1chain()
 		return 0;
 	}
-	if (vif1.dmamode == VIF_NORMAL_MEM_MODE)
+	if (vif1.dmamode == VIF_NORMAL_FROM_MEM_MODE)
 	{
 		vif1TransferFromMemory();
 		vif1.inprogress = 0;
@ -2429,8 +2424,8 @@ __forceinline void vif1SetupTransfer()
 {
 	switch (vif1.dmamode)
 	{
-		case VIF_NORMAL_MODE: //Normal
+		case VIF_NORMAL_TO_MEM_MODE:		// Normal
-		case VIF_NORMAL_MEM_MODE: //Normal (From memory)
+		case VIF_NORMAL_FROM_MEM_MODE:	// Normal (From memory)
 			vif1.inprogress = 1;
 			vif1.done = true;
 			g_vifCycles = 2;
@ -2441,21 +2436,12 @@ __forceinline void vif1SetupTransfer()
 			int ret;
 			vif1ptag = (u32*)dmaGetAddr(vif1ch->tadr); //Set memory pointer to TADR
 			if (vif1ptag == NULL)  						//Is vif0ptag empty?
 			{
 				Console::Error("Vif1 Tag BUSERR");
 				vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*vif1ptag) & 0xFFFF0000);     //Transfer upper part of tag to CHCR bits 31-15
 				psHu32(DMAC_STAT) |= DMAC_STAT_BEIS;       //If yes, set BEIS (BUSERR) in DMAC_STAT register
 				return;						   //Return -1 as an error has occurred
 			}
-			id = (vif1ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag
+			if (!(Tag::Transfer("Vif1 Tag", vif1ch, vif1ptag))) return;
 			vif1ch->qwc  = (u16)vif1ptag[0];       //QWC set to lower 16bits of the tag
 			vif1ch->madr = vif1ptag[1];            //MADR = ADDR field
 			vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*vif1ptag) & 0xFFFF0000);     //Transfer upper part of tag to CHCR bits 31-15
 			g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag
 			id = Tag::Id(vif1ptag); //ID for DmaChain copied from bit 28 of the tag
 			// Transfer dma tag if tte is set
@ -2475,7 +2461,7 @@ __forceinline void vif1SetupTransfer()
 			vif1.inprogress = 1;
-			if (vif1ch->chcr & 0x40)
+			if (CHCR::TTE(vif1ch))
 			{
 				if (vif1.vifstalled)
@ -2493,7 +2479,8 @@ __forceinline void vif1SetupTransfer()
 			vif1.irqoffset = 0;
 			vif1.done |= hwDmacSrcChainWithStack(vif1ch, id);
-			if ((vif1ch->chcr & 0x80) && (vif1ptag[0] >> 31))  			       //Check TIE bit of CHCR and IRQ bit of tag
+			//Check TIE bit of CHCR and IRQ bit of tag
 			if ((CHCR::TIE(vif1ch)) && (Tag::IRQ(vif1ptag)))  			       
 			{
 				VIF_LOG("dmaIrq Set");
@ -2514,7 +2501,7 @@ __forceinline void vif1Interrupt()
 	if((vif1Regs->stat & VIF1_STAT_VGW))
 	{
-		if(gif->chcr & 0x100)
+		if (CHCR::STR(gif))
 		{			
 			CPU_INT(1, gif->qwc * BIAS);
 			return;
@ -2523,7 +2510,7 @@ __forceinline void vif1Interrupt()
 	}
-	if ((vif1ch->chcr & 0x100) == 0) Console::WriteLn("Vif1 running when CHCR == %x", params vif1ch->chcr);
+	if (!(CHCR::STR(vif1ch))) Console::WriteLn("Vif1 running when CHCR == %x", params vif1ch->chcr);
 	if (vif1.irq && vif1.tag.size == 0)
 	{
@ -2535,7 +2522,7 @@ __forceinline void vif1Interrupt()
 			vif1Regs->stat &= ~0x1F000000; // FQC=0
 			// One game doesnt like vif stalling at end, cant remember what. Spiderman isnt keen on it tho
-			vif1ch->chcr &= ~0x100;
+			CHCR::clearSTR(vif1ch);
 			return;
 		}
 		else if ((vif1ch->qwc > 0) || (vif1.irqoffset > 0))
@ -2580,7 +2567,7 @@ __forceinline void vif1Interrupt()
 #endif
 	vif1Regs->stat &= ~VIF1_STAT_VPS; //Vif goes idle as the stall happened between commands;
-	vif1ch->chcr &= ~0x100;
+	CHCR::clearSTR(vif1ch);
 	g_vifCycles = 0;
 	hwDmacIrq(DMAC_VIF1);
@ -2588,7 +2575,7 @@ __forceinline void vif1Interrupt()
 	//Games effected by setting, Fatal Frame, KH2, Shox, Crash N Burn, GT3/4 possibly
 	//Im guessing due to the full gs fifo before the reverse? (Refraction)
 	//Note also this is only the condition for reverse fifo mode, normal direction clears it as normal
-	if(!vif1Regs->mskpath3 || (vif1ch->chcr & 0x1))vif1Regs->stat &= ~0x1F000000; // FQC=0
+	if (!vif1Regs->mskpath3 || (CHCR::DIR(vif1ch))) vif1Regs->stat &= ~0x1F000000; // FQC=0
 }
 void dmaVIF1()
@ -2604,7 +2591,8 @@ void dmaVIF1()
 	if (((psHu32(DMAC_CTRL) & 0xC) == 0x8))   // VIF MFIFO
 	{
 		//Console::WriteLn("VIFMFIFO\n");
-		if (!(vif1ch->chcr & 0x4)) Console::WriteLn("MFIFO mode != Chain! %x", params vif1ch->chcr);
+		// Test changed because the Final Fantasy 12 opening somehow has the tag in *Undefined* mode, which is not in the documentation that I saw.
 		if (CHCR::MOD(vif1ch) == NORMAL_MODE) Console::WriteLn("MFIFO mode is normal (which isn't normal here)! %x", params vif1ch->chcr);
 		vifMFIFOInterrupt();
 		return;
 	} 
@ -2616,23 +2604,23 @@ void dmaVIF1()
 	}
 #endif
-	if (!(vif1ch->chcr & 0x4) || vif1ch->qwc > 0)   // Normal Mode
+	if ((CHCR::MOD(vif1ch) == NORMAL_MODE) || vif1ch->qwc > 0)   // Normal Mode
 	{
 		if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40)
 			Console::WriteLn("DMA Stall Control on VIF1 normal");
-		if ((vif1ch->chcr & 0x1))  // to Memory
+		if ((CHCR::DIR(vif1ch)))  // to Memory
-			vif1.dmamode = VIF_NORMAL_MODE;
+			vif1.dmamode = VIF_NORMAL_TO_MEM_MODE;
 		else
-			vif1.dmamode = VIF_NORMAL_MEM_MODE;
+			vif1.dmamode = VIF_NORMAL_FROM_MEM_MODE;
 	}
 	else 
 	{
 		vif1.dmamode = VIF_CHAIN_MODE;
 	}
-	if(vif1.dmamode != VIF_NORMAL_MEM_MODE)
+	if (vif1.dmamode != VIF_NORMAL_FROM_MEM_MODE)
 		vif1Regs->stat |= 0x10000000; // FQC=16
 	else 
 		vif1Regs->stat |= min((u16)16, vif1ch->qwc) << 24; // FQC=16
@ -2664,14 +2652,16 @@ void vif1Write32(u32 mem, u32 value)
 				cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
 				vif1ch->qwc = 0; //?
 				psHu64(VIF1_FIFO) = 0;
-				psHu64(0x10005008) = 0; // VIF1_FIFO + 8
+				psHu64(VIF1_FIFO + 8) = 0;
 				vif1.done = true;
 				if(vif1Regs->mskpath3)
 				{
 					vif1Regs->mskpath3 = 0;
 					psHu32(GIF_STAT) &= ~0x2;
-					if(gif->chcr & 0x100) CPU_INT(2, 4);	
+					if (CHCR::STR(gif)) CPU_INT(2, 4);	
 				}
 				vif1Regs->err = 0;
 				vif1.inprogress = 0;
 				vif1Regs->stat &= ~(0x1F800000 | VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS | VIF1_STAT_VPS); // FQC=0
@ -2728,7 +2718,7 @@ void vif1Write32(u32 mem, u32 value)
 							// Gets the timing right - Flatout
 							CPU_INT(1, vif1ch->qwc * BIAS);
 						}
-						vif1ch->chcr |= 0x100;
+						CHCR::setSTR(vif1ch);
 					}
 				}
 			}
--- a/pcsx2/VifDma.h
+++ b/pcsx2/VifDma.h
@ -20,8 +20,8 @@
 enum VifModes
 {
-	VIF_NORMAL_MODE = 0,
+	VIF_NORMAL_TO_MEM_MODE = 0,
-	VIF_NORMAL_MEM_MODE = 1,
+	VIF_NORMAL_FROM_MEM_MODE = 1,
 	VIF_CHAIN_MODE = 2
 };
--- a/pcsx2/windows/VCprojects/pcsx2.props
+++ b/pcsx2/windows/VCprojects/pcsx2.props
@ -0,0 +1,23 @@
 <Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ImportGroup Label="PropertySheets" />
  <PropertyGroup Label="UserMacros" />
  <PropertyGroup>
    <_PropertySheetDisplayName>pcsx2</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <PrecompiledHeader>Use</PrecompiledHeader>
      <PrecompiledHeaderFile>PrecompiledHeader.h</PrecompiledHeaderFile>
      <AdditionalIncludeDirectories>..;../..;../libs;../../x86;../../IPU;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
      <ExceptionHandling>Async</ExceptionHandling>
    </ClCompile>
    <Link>
      <AdditionalLibraryDirectories>..\libs;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
      <AdditionalDependencies>gnu_gettext.lib;w32pthreads.lib;zlib.lib;comctl32.lib;ws2_32.lib;winmm.lib;%(AdditionalDependencies)</AdditionalDependencies>
    </Link>
    <PreBuildEvent>
      <Command>"$(SolutionDir)common\vsprops\preBuild.cmd" "$(ProjectDir)..\.."</Command>
    </PreBuildEvent>
  </ItemDefinitionGroup>
  <ItemGroup />
 </Project>
--- a/pcsx2/windows/VCprojects/pcsx2.vcxproj
+++ b/pcsx2/windows/VCprojects/pcsx2.vcxproj
@ -0,0 +1,758 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <ItemGroup Label="ProjectConfigurations">
    <ProjectConfiguration Include="Debug|Win32">
      <Configuration>Debug</Configuration>
      <Platform>Win32</Platform>
    </ProjectConfiguration>
    <ProjectConfiguration Include="Devel|Win32">
      <Configuration>Devel</Configuration>
      <Platform>Win32</Platform>
    </ProjectConfiguration>
    <ProjectConfiguration Include="Release|Win32">
      <Configuration>Release</Configuration>
      <Platform>Win32</Platform>
    </ProjectConfiguration>
  </ItemGroup>
  <PropertyGroup Label="Globals">
    <ProjectName>pcsx2</ProjectName>
    <ProjectGUID>{1CEFD830-2B76-4596-A4EE-BCD7280A60BD}</ProjectGUID>
    <RootNamespace>pcsx2</RootNamespace>
  </PropertyGroup>
  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="Configuration">
    <ConfigurationType>Application</ConfigurationType>
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  <ItemGroup>
    <ResourceCompile Include="..\debugger.rc" />
    <ResourceCompile Include="..\pcsx2.rc" />
  </ItemGroup>
  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
  <ImportGroup Label="ExtensionTargets">
    <Import Project="$(VCINSTALLDIR)\VCProjectDefaults\masm.targets" />
  </ImportGroup>
 </Project>
--- a/pcsx2/windows/VCprojects/pcsx2.vcxproj.filters
+++ b/pcsx2/windows/VCprojects/pcsx2.vcxproj.filters
--- a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj
+++ b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj
@ -214,7 +214,7 @@
 				PreprocessorDefinitions="NDEBUG;wxUSE_UNICODE=1"
 				ExceptionHandling="2"
 				EnableEnhancedInstructionSet="0"
-				UsePrecompiledHeader="2"
+				UsePrecompiledHeader="0"
 				PrecompiledHeaderThrough="PrecompiledHeader.h"
 				PrecompiledHeaderFile="$(IntDir)\$(TargetName).pch"
 				CompileAs="2"
@ -1482,6 +1482,10 @@
 								RelativePath="..\..\x86\microVU_Analyze.inl"
 								>
 							</File>
 							<File
 								RelativePath="..\..\x86\microVU_Branch.inl"
 								>
 							</File>
 							<File
 								RelativePath="..\..\x86\microVU_Compile.inl"
 								>
--- a/pcsx2/x86/microVU.cpp
+++ b/pcsx2/x86/microVU.cpp
@ -207,13 +207,13 @@ microVUt(void) mVUvsyncUpdate(mV) {
 			mVU->prog.prog[i].used  = 0;
 			mVU->prog.prog[i].frame = mVU->prog.curFrame;
 		}
-		if((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (360 * 10)) {
+		else if (((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (360 * 10)) && (i != mVU->prog.cur)) {
 			mVU->prog.total--;
 			if (!mVU->index) mVUclearProg<0>(i);
 			else			 mVUclearProg<1>(i);
 			DevCon::Status("microVU%d: Killing Dead Program [%03d]", params mVU->index, i+1);
 		}
-		else if (!mVU->prog.prog[i].isOld && ((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (30 * 1))) {
+		else if (((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (30  *  1)) && !mVU->prog.prog[i].isOld) {
 			mVU->prog.prog[i].isOld = 1;
 			//DevCon::Status("microVU%d: Aging Old Program [%03d]", params mVU->index, i+1);
 		}
@ -268,6 +268,7 @@ microVUf(int) mVUsearchProg() {
 		return 0;
 	}
 	mVU->prog.prog[mVU->prog.cur].used	= 1;
 	mVU->prog.prog[mVU->prog.cur].isOld	= 0;
 	return 1; // If !cleared, then we're still on the same program as last-time ;)
 }
--- a/pcsx2/x86/microVU.h
+++ b/pcsx2/x86/microVU.h
@ -88,7 +88,9 @@ public:
 				&&	(linkI->block->pState.vi15		== pState->vi15)
 				&&  (linkI->block->pState.flags		== pState->flags)
 				&&  (linkI->block->pState.xgkick	== pState->xgkick)
-				&& !(linkI->block->pState.needExactMatch & 0xf0f)) { return linkI->block; }
+				&&  (linkI->block->pState.viBackUp	== pState->viBackUp)
 				&&  (linkI->block->pState.blockType	== pState->blockType)
 				&& !(linkI->block->pState.needExactMatch & 5)) { return linkI->block; }
 				linkI = linkI->next;
 			}
 		}
@ -157,6 +159,8 @@ struct microVU {
 	u32		VIbackup;	 // Holds a backup of a VI reg if modified before a branch
 	u32		VIxgkick;	 // Holds a backup of a VI reg used for xgkick-delays
 	u32		branch;		 // Holds branch compare result (IBxx) OR Holds address to Jump to (JALR/JR)
 	u32		badBranch;	 // For Branches in Branch Delay Slots, holds Address the first Branch went to + 8
 	u32		evilBranch;	 // For Branches in Branch Delay Slots, holds Address to Jump to
 	u32		p;			 // Holds current P instance index
 	u32		q;			 // Holds current Q instance index
 	u32		totalCycles; // Total Cycles that mVU is expected to run for
@ -206,5 +210,6 @@ typedef void (__fastcall *mVUrecCall)(u32, u32);
 #include "microVU_Lower.inl"
 #include "microVU_Tables.inl"
 #include "microVU_Flags.inl"
 #include "microVU_Branch.inl"
 #include "microVU_Compile.inl"
 #include "microVU_Execute.inl"
--- a/pcsx2/x86/microVU_Alloc.inl
+++ b/pcsx2/x86/microVU_Alloc.inl
@ -117,12 +117,6 @@ microVUt(void) mVUallocVIb(mV, int GPRreg, int _reg_) {
 // I/P/Q Reg Allocators
 //------------------------------------------------------------------
 microVUt(void) getIreg(mV, int reg, bool modXYZW) {
 	SSE_MOVSS_M32_to_XMM(reg, (uptr)&mVU->regs->VI[REG_I].UL);
 	if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2(reg, -1, 8);
 	if (!((_XYZW_SS && modXYZW) || (_X_Y_Z_W == 8))) { mVUunpack_xyzw(reg, reg, 0); }
 }
 microVUt(void) getPreg(mV, int reg) {
 	mVUunpack_xyzw(reg, xmmPQ, (2 + mVUinfo.readP));
 	/*if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2(reg, xmmT1, 15);*/
--- a/pcsx2/x86/microVU_Analyze.inl
+++ b/pcsx2/x86/microVU_Analyze.inl
@ -297,7 +297,7 @@ microVUt(void) mVUanalyzeSflag(mV, int It) {
 		mVUsFlagHack = 0; // Don't Optimize Out Status Flags for this block
 		mVUinfo.swapOps = 1;
 		flagSet(mVU, 0);
-		if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf; }
+		if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 1; }
 	}
 }
@ -318,7 +318,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
 	else { // Need set _doMac for 4 previous Ops (need to do all 4 because stalls could change the result needed)
 		mVUinfo.swapOps = 1;
 		flagSet(mVU, 1);
-		if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << 4; }
+		if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 2; }
 	}
 }
@ -329,7 +329,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
 microVUt(void) mVUanalyzeCflag(mV, int It) {
 	mVUinfo.swapOps = 1;
 	mVUlow.readFlags = 1;
-	if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << 8; }
+	if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 4; }
 	analyzeVIreg2(It, mVUlow.VI_write, 1);
 }
@ -356,10 +356,17 @@ microVUt(void) mVUanalyzeXGkick(mV, int Fs, int xCycles) {
 microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) {
 	if (!xReg) return;
 	int i;
-	int iEnd = aMin(5, mVUcount);
+	int iEnd = aMin(5, (mVUcount+1));
 	int bPC = iPC;
 	incPC2(-2);
 	for (i = 0; i < iEnd; i++) {
 		if ((i == mVUcount) && (i < 5)) {
 			if (mVUpBlock->pState.viBackUp == xReg) {
 				infoVar = 1;
 				i++;
 			}
 			break; 
 		}
 		if ((mVUlow.VI_write.reg == xReg) && mVUlow.VI_write.used) {
 			if (mVUlow.readFlags || i == 5) break;
 			if (i == 0) { incPC2(-2); continue;	}
@ -370,32 +377,60 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) {
 		break;
 	}
 	if (i) {
 		if (!infoVar) {
 			incPC2(2);
 			mVUlow.backupVI = 1;
 		iPC = bPC;
 			infoVar = 1;
 		}
 		iPC = bPC;
 		DevCon::Status("microVU%d: Branch VI-Delay (%d) [%04x]", params getIndex, i, xPC);
 	}
-	iPC = bPC;
+	else iPC = bPC;
 }
-microVUt(void) mVUanalyzeBranch1(mV, int Is) {
+// Branch in Branch Delay-Slots
 microVUt(int) mVUbranchCheck(mV) {
 	if (!mVUcount) return 0;
 	incPC(-2);
 	if (mVUlow.branch) {
 		mVUlow.badBranch  = 1;
 		incPC(2);
 		mVUlow.evilBranch = 1;
 		mVUregs.blockType = 2;
 		DevCon::Status("microVU%d Warning: Branch in Branch delay slot! [%04x]", params mVU->index, xPC);
 		return 1;
 	}
 	incPC(2);
 	return 0;
 }
 microVUt(void) mVUanalyzeCondBranch1(mV, int Is) {
 	analyzeVIreg1(Is, mVUlow.VI_read[0]);
-	if (!mVUstall) { 
+	if (!mVUstall && !mVUbranchCheck(mVU)) { 
 		analyzeBranchVI(mVU, Is, mVUlow.memReadIs);
 	}
 }
-microVUt(void) mVUanalyzeBranch2(mV, int Is, int It) {
+microVUt(void) mVUanalyzeCondBranch2(mV, int Is, int It) {
 	analyzeVIreg1(Is, mVUlow.VI_read[0]);
 	analyzeVIreg1(It, mVUlow.VI_read[1]);
-	if (!mVUstall) {
+	if (!mVUstall && !mVUbranchCheck(mVU)) {
 		analyzeBranchVI(mVU, Is, mVUlow.memReadIs);
 		analyzeBranchVI(mVU, It, mVUlow.memReadIt);
 	}
 }
 microVUt(void) mVUanalyzeNormBranch(mV, int It, bool isBAL) {
 	mVUbranchCheck(mVU);
 	if (isBAL) {
 		analyzeVIreg2(It, mVUlow.VI_write, 1); 
 		setConstReg(It, bSaveAddr);
 	}
 }
 microVUt(void) mVUanalyzeJump(mV, int Is, int It, bool isJALR) {
 	mVUbranchCheck(mVU);
 	mVUlow.branch = (isJALR) ? 10 : 9;
 	if (mVUconstReg[Is].isValid && !CHECK_VU_CONSTHACK) {
 		mVUlow.constJump.isValid  = 1;
 		mVUlow.constJump.regValue = mVUconstReg[Is].regValue;
--- a/pcsx2/x86/microVU_Branch.inl
+++ b/pcsx2/x86/microVU_Branch.inl
@ -0,0 +1,194 @@
 /*  Pcsx2 - Pc Ps2 Emulator
 *  Copyright (C) 2009  Pcsx2 Team
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *  
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *  
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
 */
 #pragma once
 microVUt(void)  mVUincCycles(mV, int x);
 microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState);
 #define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); }
 #define sI ((mVUpBlock->pState.needExactMatch & 1) ? 3 : ((mVUpBlock->pState.flags >> 0) & 3))
 #define cI ((mVUpBlock->pState.needExactMatch & 4) ? 3 : ((mVUpBlock->pState.flags >> 2) & 3))
 microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
 	int fStatus = (isEbit) ? findFlagInst(mFC->xStatus, 0x7fffffff) : sI;
 	int fMac	= (isEbit) ? findFlagInst(mFC->xMac,	0x7fffffff) : 0;
 	int fClip	= (isEbit) ? findFlagInst(mFC->xClip,   0x7fffffff) : cI;
 	int qInst	= 0;
 	int pInst	= 0;
 	mVU->regAlloc->flushAll();
 	if (isEbit) {
 		mVUprint("mVUcompile ebit");
 		memset(&mVUinfo,	 0, sizeof(mVUinfo));
 		memset(&mVUregsTemp, 0, sizeof(mVUregsTemp));
 		mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0)
 		mVUcycles -= 100;
 		qInst = mVU->q;
 		pInst = mVU->p;
 		if (mVUinfo.doDivFlag) {
 			sFLAG.doFlag = 1;
 			sFLAG.write  = fStatus;
 			mVUdivSet(mVU);
 		}
 		if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); }
 	}
 	// Save P/Q Regs
 	if (qInst) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, 0xe5); }
 	SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_Q].UL, xmmPQ);
 	if (isVU1) {
 		SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, pInst ? 3 : 2);
 		SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_P].UL, xmmPQ);
 	}
 	// Save Flag Instances
 	mVUallocSFLAGc(gprT1, gprT2, fStatus);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL,	gprT1);
 	mVUallocMFLAGa(mVU, gprT1, fMac);
 	mVUallocCFLAGa(mVU, gprT2, fClip);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL,	gprT1);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL,	gprT2);
 	if (isEbit || isVU1) { // Clear 'is busy' Flags
 		AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
 		AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif
 	}
 	if (isEbit != 2) { // Save PC, and Jump to Exit Point
 		MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC);
 		JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5));
 	}
 }
 // Recompiles Code for Proper Flags and Q/P regs on Block Linkings
 microVUt(void) mVUsetupBranch(mV, microFlagCycles& mFC) {
 	mVU->regAlloc->flushAll();	// Flush Allocated Regs
 	mVUsetupFlags(mVU, mFC);	// Shuffle Flag Instances
 	// Shuffle P/Q regs since every block starts at instance #0
 	if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); }
 }
 void normBranchCompile(microVU* mVU, u32 branchPC) {
 	using namespace x86Emitter;
 	microBlock* pBlock;
 	blockCreate(branchPC/8);
 	pBlock = mVUblocks[branchPC/8]->search((microRegInfo*)&mVUregs);
 	if (pBlock)	{ xJMP(pBlock->x86ptrStart); }
 	else		{ mVUcompile(mVU, branchPC, (uptr)&mVUregs); }
 }
 void normJumpCompile(mV, microFlagCycles& mFC, bool isEvilJump) {
 	using namespace x86Emitter;
 	memcpy_fast(&mVUpBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
 	mVUsetupBranch(mVU, mFC);
 	mVUbackupRegs(mVU);
 	if (isEvilJump) MOV32MtoR(gprT2, (uptr)&mVU->evilBranch);
 	else			MOV32MtoR(gprT2, (uptr)&mVU->branch);
 	MOV32ItoR(gprR, (u32)&mVUpBlock->pStateEnd);
 	if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState)
 	else			 xCALL(mVUcompileJIT<1>);
 	mVUrestoreRegs(mVU);
 	JMPR(gprT1);  // Jump to rec-code address
 }
 void normBranch(mV, microFlagCycles& mFC) {
 	// E-bit Branch
 	if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; }
 	// Normal Branch
 	mVUsetupBranch(mVU, mFC);
 	normBranchCompile(mVU, branchAddr);
 }
 void condBranch(mV, microFlagCycles& mFC, int JMPcc) {
 	using namespace x86Emitter;
 	mVUsetupBranch(mVU, mFC);
 	xCMP(ptr16[&mVU->branch], 0);
 	incPC(3);
 	if (mVUup.eBit) { // Conditional Branch With E-Bit Set
 		mVUendProgram(mVU, &mFC, 2);
 		xForwardJump8 eJMP((JccComparisonType)JMPcc);
 			incPC(1); // Set PC to First instruction of Non-Taken Side
 			xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC);
 			xJMP(mVU->exitFunct);
 		eJMP.SetTarget();
 		incPC(-4); // Go Back to Branch Opcode to get branchAddr
 		iPC = branchAddr/4;
 		xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC);
 		xJMP(mVU->exitFunct);
 		return;
 	}
 	else { // Normal Conditional Branch
 		microBlock* bBlock;
 		incPC2(1); // Check if Branch Non-Taken Side has already been recompiled
 		blockCreate(iPC/2);
 		bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs);
 		incPC2(-1);
 		if (bBlock)	{ // Branch non-taken has already been compiled
 			xJcc(xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart);
 			incPC(-3); // Go back to branch opcode (to get branch imm addr)
 			normBranchCompile(mVU, branchAddr);
 		}
 		else { 
 			s32* ajmp = xJcc32((JccComparisonType)JMPcc); 
 			u32 bPC = iPC; // mVUcompile can modify iPC, mVUpBlock, and mVUregs so back them up
 			microBlock* pBlock = mVUpBlock;
 			memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
 			incPC2(1);  // Get PC for branch not-taken
 			mVUcompile(mVU, xPC, (uptr)&mVUregs);
 			iPC = bPC;
 			incPC(-3); // Go back to branch opcode (to get branch imm addr)
 			uptr jumpAddr = (uptr)mVUblockFetch(mVU, branchAddr, (uptr)&pBlock->pStateEnd);
 			*ajmp = (jumpAddr - ((uptr)ajmp + 4));
 		}
 	}
 }
 void normJump(mV, microFlagCycles& mFC) {
 	using namespace x86Emitter;
 	if (mVUlow.constJump.isValid) { // Jump Address is Constant
 		if (mVUup.eBit) { // E-bit Jump
 			iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1);
 			mVUendProgram(mVU, &mFC, 1);
 			return;
 		}
 		int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8);
 		mVUsetupBranch(mVU, mFC);
 		normBranchCompile(mVU, jumpAddr);
 		return;
 	}
 	if (mVUup.eBit) { // E-bit Jump
 		mVUendProgram(mVU, &mFC, 2);
 		MOV32MtoR(gprT1, (uptr)&mVU->branch);
 		MOV32RtoM((uptr)&mVU->regs->VI[REG_TPC].UL, gprT1);
 		xJMP(mVU->exitFunct);
 	}
 	else normJumpCompile(mVU, mFC, 0);
 }
--- a/pcsx2/x86/microVU_Compile.inl
+++ b/pcsx2/x86/microVU_Compile.inl
@ -22,23 +22,6 @@
 // Helper Macros
 //------------------------------------------------------------------
 #define branchCase(JMPcond) branchCaseFunct(mVU, bBlock, xStatus, xMac, xClip, xCycles, ajmp, JMPcond); break
 #define branchWarning() {																						\
 	if (mVUbranch) {																							\
 		Console::Error("microVU%d Warning: Branch in E-bit/Branch delay slot! [%04x]", params mVU->index, xPC);	\
 		mVUlow.isNOP = 1;																						\
 	}																											\
 }
 #define startLoop() {																	\
 	if (curI & _Mbit_)	{ Console::Status("microVU%d: M-bit set!", params getIndex); }	\
 	if (curI & _Dbit_)	{ DevCon::Status ("microVU%d: D-bit set!", params getIndex); }	\
 	if (curI & _Tbit_)	{ DevCon::Status ("microVU%d: T-bit set!", params getIndex); }	\
 	memset(&mVUinfo,	 0, sizeof(mVUinfo));											\
 	memset(&mVUregsTemp, 0, sizeof(mVUregsTemp));										\
 }
 #define calcCycles(reg, x)	{ reg = ((reg > x) ? (reg - x) : 0); }
 #define optimizeReg(rState) { rState = (rState==1) ? 0 : rState; }
 #define tCycles(dest, src)	{ dest = aMax(dest, src); }
@ -46,48 +29,11 @@
 #define incQ()				{ mVU->q = (mVU->q+1) & 1; }
 #define doUpperOp()			{ mVUopU(mVU, 1); mVUdivSet(mVU); }
 #define doLowerOp()			{ incPC(-1); mVUopL(mVU, 1); incPC(1); }
 #define blockCreate(addr)	{ if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); }
 //------------------------------------------------------------------
 // Helper Functions
 //------------------------------------------------------------------
 microVUt(void) doSwapOp(mV) { 
 	if (mVUinfo.backupVF && !mVUlow.noWriteVF) {
 		DevCon::Status("microVU%d: Backing Up VF Reg [%04x]", params getIndex, xPC);
 		int t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg);
 		int t2 = mVU->regAlloc->allocReg();
 		SSE_MOVAPS_XMM_to_XMM(t2, t1);
 		mVU->regAlloc->clearNeeded(t1);
 		mVUopL(mVU, 1);
 		t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg, mVUlow.VF_write.reg, 0xf, 0);
 		SSE_XORPS_XMM_to_XMM(t2, t1);
 		SSE_XORPS_XMM_to_XMM(t1, t2);
 		SSE_XORPS_XMM_to_XMM(t2, t1);
 		mVU->regAlloc->clearNeeded(t1);
 		incPC(1); 
 		doUpperOp();
 		t1 = mVU->regAlloc->allocReg(-1, mVUlow.VF_write.reg, 0xf);
 		SSE_MOVAPS_XMM_to_XMM(t1, t2);
 		mVU->regAlloc->clearNeeded(t1);
 		mVU->regAlloc->clearNeeded(t2);
 	}
 	else { mVUopL(mVU, 1); incPC(1); doUpperOp(); }
 }
 microVUt(void) doIbit(mV) { 
 	if (mVUup.iBit) { 
 		incPC(-1);
 		if (CHECK_VU_OVERFLOW && ((curI & 0x7fffffff) >= 0x7f800000)) {
 			Console::Status("microVU%d: Clamping I Reg", params mVU->index);
 			int tempI = (0x80000000 & curI) | 0x7f7fffff; // Clamp I Reg
 			MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, tempI); 
 		}
 		else MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, curI); 
 		incPC(1);
 	} 
 }
 // Used by mVUsetupRange
 microVUt(void) mVUcheckIsSame(mV) {
@ -163,6 +109,88 @@ microVUt(void) mVUsetupRange(mV, s32 pc, bool isStartPC) {
 	}
 }
 microVUt(void) startLoop(mV) {
 	if (curI & _Mbit_)	{ Console::Status("microVU%d: M-bit set!", params getIndex); }
 	if (curI & _Dbit_)	{ DevCon::Status ("microVU%d: D-bit set!", params getIndex); }
 	if (curI & _Tbit_)	{ DevCon::Status ("microVU%d: T-bit set!", params getIndex); }
 	memset(&mVUinfo,	 0, sizeof(mVUinfo));
 	memset(&mVUregsTemp, 0, sizeof(mVUregsTemp));
 }
 microVUt(void) doIbit(mV) { 
 	if (mVUup.iBit) { 
 		incPC(-1);
 		u32 tempI;
 		mVU->regAlloc->clearRegVF(33);
 		if (CHECK_VU_OVERFLOW && ((curI & 0x7fffffff) >= 0x7f800000)) {
 			Console::Status("microVU%d: Clamping I Reg", params mVU->index);
 			tempI = (0x80000000 & curI) | 0x7f7fffff; // Clamp I Reg
 		}
 		else tempI = curI;
 		MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, tempI);
 		incPC(1);
 	} 
 }
 microVUt(void) doSwapOp(mV) { 
 	if (mVUinfo.backupVF && !mVUlow.noWriteVF) {
 		DevCon::Status("microVU%d: Backing Up VF Reg [%04x]", params getIndex, xPC);
 		int t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg);
 		int t2 = mVU->regAlloc->allocReg();
 		SSE_MOVAPS_XMM_to_XMM(t2, t1);
 		mVU->regAlloc->clearNeeded(t1);
 		mVUopL(mVU, 1);
 		t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg, mVUlow.VF_write.reg, 0xf, 0);
 		SSE_XORPS_XMM_to_XMM(t2, t1);
 		SSE_XORPS_XMM_to_XMM(t1, t2);
 		SSE_XORPS_XMM_to_XMM(t2, t1);
 		mVU->regAlloc->clearNeeded(t1);
 		incPC(1); 
 		doUpperOp();
 		t1 = mVU->regAlloc->allocReg(-1, mVUlow.VF_write.reg, 0xf);
 		SSE_MOVAPS_XMM_to_XMM(t1, t2);
 		mVU->regAlloc->clearNeeded(t1);
 		mVU->regAlloc->clearNeeded(t2);
 	}
 	else { mVUopL(mVU, 1); incPC(1); doUpperOp(); }
 }
 microVUt(void) branchWarning(mV) {
 	incPC(-2);
 	if (mVUup.eBit && mVUbranch) {
 		incPC(2);
 		Console::Error("microVU%d Warning: Branch in E-bit delay slot! [%04x]", params mVU->index, xPC);
 		mVUlow.isNOP = 1;
 	}
 	else incPC(2);
 	if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay Slot Instruction
 		if (mVUlow.VI_write.reg && mVUlow.VI_write.used && !mVUlow.readFlags) {
 			mVUlow.backupVI = 1;
 			mVUregs.viBackUp = mVUlow.VI_write.reg;
 		}
 	}
 }
 microVUt(void) eBitPass1(mV, int& branch) {
 	if (mVUregs.blockType != 1) {
 		branch = 1; 
 		mVUup.eBit = 1;
 	}
 }
 microVUt(void) eBitWarning(mV) {
 	if (mVUpBlock->pState.blockType == 1) Console::Error("microVU%d Warning: Branch, E-bit, Branch! [%04x]",  params mVU->index, xPC);
 	if (mVUpBlock->pState.blockType == 2) Console::Error("microVU%d Warning: Branch, Branch, Branch! [%04x]", params mVU->index, xPC);
 	incPC(2);
 	if (curI & _Ebit_) {
 		DevCon::Status("microVU%d: E-bit in Branch delay slot! [%04x]", params mVU->index, xPC);
 		mVUregs.blockType = 1;
 	}
 	incPC(-2);
 }
 // Optimizes the End Pipeline State Removing Unnecessary Info
 microVUt(void) mVUoptimizePipeState(mV) {
 	for (int i = 0; i < 32; i++) {
@ -174,21 +202,9 @@ microVUt(void) mVUoptimizePipeState(mV) {
 	for (int i = 0; i < 16; i++) {
 		optimizeReg(mVUregs.VI[i]);
 	}
-	mVUregs.r = 0;
+	if (mVUregs.q) { optimizeReg(mVUregs.q); if (!mVUregs.q) { incQ(); } }
-}
+	if (mVUregs.p) { optimizeReg(mVUregs.p); if (!mVUregs.p) { incP(); } }
-
+	mVUregs.r = 0; // There are no stalls on the R-reg, so its Safe to discard info
 // Recompiles Code for Proper Flags and Q/P regs on Block Linkings
 microVUt(void) mVUsetupBranch(mV, int* xStatus, int* xMac, int* xClip, int xCycles) {
 	mVUprint("mVUsetupBranch");
 	// Flush Allocated Regs
 	mVU->regAlloc->flushAll();
 	// Shuffle Flag Instances
 	mVUsetupFlags(mVU, xStatus, xMac, xClip, xCycles);
 	// Shuffle P/Q regs since every block starts at instance #0
 	if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); }
 }
 microVUt(void) mVUincCycles(mV, int x) {
@ -209,7 +225,7 @@ microVUt(void) mVUincCycles(mV, int x) {
 	}
 	if (mVUregs.p) {
 		calcCycles(mVUregs.p, x);
-		if (!mVUregs.p || (mVUregs.p && mVUregsTemp.p)) { incP(); }
+		if (!mVUregs.p || mVUregsTemp.p) { incP(); }
 	}
 	if (mVUregs.xgkick) {
 		calcCycles(mVUregs.xgkick, x);
@ -263,88 +279,8 @@ microVUt(void) mVUsetCycles(mV) {
 	tCycles(mVUregs.xgkick,					mVUregsTemp.xgkick);
 }
-#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3))
+void __fastcall mVUwarning0(mV)		{ Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x] [%x]", params xPC, mVU->prog.cur); }
-#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3))
+void __fastcall mVUwarning1(mV)		{ Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x] [%x]", params xPC, mVU->prog.cur); }
 microVUt(void) mVUendProgram(mV, int isEbit, int* xStatus, int* xMac, int* xClip) {
 	int fStatus = (isEbit) ? findFlagInst(xStatus, 0x7fffffff) : sI;
 	int fMac	= (isEbit) ? findFlagInst(xMac,	   0x7fffffff) : 0;
 	int fClip	= (isEbit) ? findFlagInst(xClip,   0x7fffffff) : cI;
 	int qInst	= 0;
 	int pInst	= 0;
 	mVU->regAlloc->flushAll();
 	if (isEbit) {
 		mVUprint("mVUcompile ebit");
 		memset(&mVUinfo, 0, sizeof(mVUinfo));
 		mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0)
 		mVUcycles -= 100;
 		qInst = mVU->q;
 		pInst = mVU->p;
 		if (mVUinfo.doDivFlag) {
 			sFLAG.doFlag = 1;
 			sFLAG.write  = fStatus;
 			mVUdivSet(mVU);
 		}
 		if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); }
 	}
 	// Save P/Q Regs
 	if (qInst) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, 0xe5); }
 	SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_Q].UL, xmmPQ);
 	if (isVU1) {
 		SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, pInst ? 3 : 2);
 		SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_P].UL, xmmPQ);
 	}
 	// Save Flag Instances
 	mVUallocSFLAGc(gprT1, gprT2, fStatus);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL,	gprT1);
 	mVUallocMFLAGa(mVU, gprT1, fMac);
 	mVUallocCFLAGa(mVU, gprT2, fClip);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL,	gprT1);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL,	gprT2);
 	if (isEbit || isVU1) { // Clear 'is busy' Flags
 		AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
 		AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif
 	}
 	if (isEbit != 2) { // Save PC, and Jump to Exit Point
 		MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC);
 		JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5));
 	}
 }
 void branchCaseFunct(mV, microBlock* &bBlock, int* xStatus, int* xMac, int* xClip, int &xCycles, s32* &ajmp, int JMPcc) {
 	using namespace x86Emitter;
 	mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles);
 	xCMP(ptr16[&mVU->branch], 0);
 	if (mVUup.eBit) { // Conditional Branch With E-Bit Set
 		mVUendProgram(mVU, 2, xStatus, xMac, xClip);
 		xForwardJump8 eJMP((JccComparisonType)JMPcc);
 			incPC(1); // Set PC to First instruction of Non-Taken Side
 			xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC);
 			xJMP(mVU->exitFunct);
 		eJMP.SetTarget();
 		incPC(-4); // Go Back to Branch Opcode to get branchAddr
 		iPC = branchAddr/4;
 		xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC);
 		xJMP(mVU->exitFunct);
 	}
 	else { // Normal Conditional Branch
 		incPC2(1); // Check if Branch Non-Taken Side has already been recompiled
 		blockCreate(iPC/2);
 		bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs);
 		incPC2(-1);
 		if (bBlock)	{ xJcc( xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart ); }
 		else		{ ajmp = xJcc32((JccComparisonType)JMPcc); }
 	}
 }
 void __fastcall mVUwarning0(u32 PC) { Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); }
 void __fastcall mVUwarning1(u32 PC) { Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); }
 void __fastcall mVUprintPC1(u32 PC) { Console::Write("Block PC [%04x] ", params PC); }
 void __fastcall mVUprintPC2(u32 PC) { Console::Write("[%04x]\n", params PC); }
@ -352,16 +288,19 @@ microVUt(void) mVUtestCycles(mV) {
 	iPC = mVUstartPC;
 	mVUdebugNOW(0);
 	SUB32ItoM((uptr)&mVU->cycles, mVUcycles);
 	if (IsDevBuild || !isVU1) {
 		u32* jmp32 = JG32(0);
-		MOV32ItoR(gprT2, xPC);
+			MOV32ItoR(gprT2, (uptr)mVU);
 			if (isVU1)  CALLFunc((uptr)mVUwarning1);
 			//else		CALLFunc((uptr)mVUwarning0); // VU0 is allowed early exit for COP2 Interlock Simulation
 			MOV32ItoR(gprR, Roffset); // Restore gprR
-		mVUendProgram(mVU, 0, NULL, NULL, NULL);
+			mVUendProgram(mVU, NULL, 0);
 		x86SetJ32(jmp32);
 	}
 }
-microVUt(void) mVUinitConstValues(mV) {
+// Initialize VI Constants (vi15 propagates through blocks)
 microVUt(void) mVUinitConstValues(microVU* mVU) {
 	for (int i = 0; i < 16; i++) {
 		mVUconstReg[i].isValid	= 0;
 		mVUconstReg[i].regValue	= 0;
@ -370,6 +309,25 @@ microVUt(void) mVUinitConstValues(mV) {
 	mVUconstReg[15].regValue = mVUconstReg[15].isValid ? (mVUregs.vi15&0xffff) : 0;
 }
 // Initialize Variables
 microVUt(void) mVUinitFirstPass(microVU* mVU, uptr pState, u8* thisPtr) {
 	mVUstartPC				= iPC;	// Block Start PC
 	mVUbranch				= 0;	// Branch Type
 	mVUcount				= 0;	// Number of instructions ran
 	mVUcycles				= 0;	// Skips "M" phase, and starts counting cycles at "T" stage
 	mVU->p					= 0;	// All blocks start at p index #0
 	mVU->q					= 0;	// All blocks start at q index #0
 	memcpy_fast(&mVUregs, (microRegInfo*)pState, sizeof(microRegInfo)); // Loads up Pipeline State Info
 	mVUblock.x86ptrStart	= thisPtr;
 	mVUpBlock				= mVUblocks[mVUstartPC/2]->add(&mVUblock); // Add this block to block manager
 	mVUregs.blockType		= 0;
 	mVUregs.viBackUp		= 0;
 	mVUregs.flags			= 0;
 	mVUregs.needExactMatch	= 0;
 	mVUsFlagHack			= CHECK_VU_FLAGHACK;
 	mVUinitConstValues(mVU);
 }
 //------------------------------------------------------------------
 // Recompiler
 //------------------------------------------------------------------
@ -377,41 +335,22 @@ microVUt(void) mVUinitConstValues(mV) {
 microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
 	using namespace x86Emitter;
-	microBlock*	pBlock	 = NULL;
+	microFlagCycles mFC;
 	u8*				thisPtr  = x86Ptr;
-	const u32	endCount = (mVU->microMemSize / 8) - 1;
+	const u32		endCount = (((microRegInfo*)pState)->blockType) ? 1 : (mVU->microMemSize / 8);
 	// Setup Program Bounds/Range
 	mVUsetupRange(mVU, startPC, 1);
 	// Reset regAlloc
 	mVU->regAlloc->reset();
 	// First Pass
 	iPC = startPC / 4;
-	setCode();
+	mVUsetupRange(mVU, startPC, 1);	// Setup Program Bounds/Range
-	mVUbranch	= 0;
+	mVU->regAlloc->reset();			// Reset regAlloc
-	mVUstartPC	= iPC;
+	mVUinitFirstPass(mVU, pState, thisPtr);
 	mVUcount	= 0;
 	mVUcycles	= 0; // Skips "M" phase, and starts counting cycles at "T" stage
 	mVU->p		= 0; // All blocks start at p index #0
 	mVU->q		= 0; // All blocks start at q index #0
 	memcpy_fast(&mVUregs, (microRegInfo*)pState, sizeof(microRegInfo)); // Loads up Pipeline State Info
 	mVUblock.x86ptrStart = thisPtr;
 	pBlock			= mVUblocks[startPC/8]->add(&mVUblock); // Add this block to block manager
 	mVUpBlock		= pBlock;
 	mVUregs.flags	= 0;
 	mVUflagInfo		= 0;
 	mVUsFlagHack	= CHECK_VU_FLAGHACK;
 	mVUinitConstValues(mVU);
 	for (int branch = 0; mVUcount < endCount; mVUcount++) {
 		incPC(1);
-		startLoop();
+		startLoop(mVU);
 		mVUincCycles(mVU, 1);
 		mVUopU(mVU, 0);
-		if (curI & _Ebit_)	  { branch = 1; mVUup.eBit = 1; }
+		if (curI & _Ebit_)	  { eBitPass1(mVU, branch); }
 		if (curI & _DTbit_)	  { branch = 4; }
 		if (curI & _Mbit_)	  { mVUup.mBit = 1; }
 		if (curI & _Ibit_)	  { mVUlow.isNOP = 1; mVUup.iBit = 1; }
@ -421,29 +360,25 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
 		mVUinfo.writeQ = !mVU->q;
 		mVUinfo.readP  =  mVU->p;
 		mVUinfo.writeP = !mVU->p;
-		if		(branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(); break; }
+		if		(branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; }
 		else if (branch == 1) { branch = 2; }
-		if		(mVUbranch)   { mVUsetFlagInfo(mVU); branch = 3; mVUbranch = 0; }
+		if		(mVUbranch)   { mVUsetFlagInfo(mVU); eBitWarning(mVU); branch = 3; mVUbranch = 0; }
 		incPC(1);
 	}
 	// Sets Up Flag instances
 	int xStatus[4], xMac[4], xClip[4];
 	int xCycles = mVUsetFlags(mVU, xStatus, xMac, xClip);
 	mVUtestCycles(mVU);
 	// Fix up vi15 const info for propagation through blocks
 	mVUregs.vi15 = (mVUconstReg[15].isValid && !CHECK_VU_CONSTHACK) ? ((1<<31) | (mVUconstReg[15].regValue&0xffff)) : 0;
-	// Optimize the End Pipeline State for nicer Block Linking
+	mVUsetFlags(mVU, mFC);	   // Sets Up Flag instances
-	mVUoptimizePipeState(mVU);
+	mVUoptimizePipeState(mVU); // Optimize the End Pipeline State for nicer Block Linking
 	mVUtestCycles(mVU);		   // Update VU Cycles and Exit Early if Necessary
 	// Second Pass
 	iPC = mVUstartPC;
 	setCode();
 	mVUbranch = 0;
-	uint x;
+	u32 x = 0;
-	for (x = 0; x < endCount; x++) {
+	for (; x < endCount; x++) {
 		if (mVUinfo.isEOB)			{ x = 0xffff; }
 		if (mVUup.mBit)				{ OR32ItoM((uptr)&mVU->regs->flags, VUFLAG_MFLAGSET); }
 		if (mVUlow.isNOP)			{ incPC(1); doUpperOp(); doIbit(mVU); }
@ -451,111 +386,29 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
 		else						{ doSwapOp(mVU); }
 		if (mVUinfo.doXGKICK)		{ mVU_XGKICK_DELAY(mVU, 1); }
 		if (!doRegAlloc)			{ mVU->regAlloc->flushAll(); }
-
+		if (isEvilBlock)			{ mVUsetupRange(mVU, xPC, 0); normJumpCompile(mVU, mFC, 1); return thisPtr; }
-		if (!mVUinfo.isBdelay) { incPC(1); }
+		else if (!mVUinfo.isBdelay)	{ incPC(1); }
 		else {
 			microBlock* bBlock = NULL;
 			s32* ajmp = 0;
 			mVUsetupRange(mVU, xPC, 0);
 			mVUdebugNOW(1);
-
+			incPC(-3); // Go back to branch opcode
-			switch (mVUbranch) {
+			switch (mVUlow.branch) {
-				case 3: branchCase(Jcc_Equal);			// IBEQ
+				case 1: case 2:  normBranch(mVU, mFC);			  return thisPtr; // B/BAL
-				case 4: branchCase(Jcc_GreaterOrEqual); // IBGEZ
+				case 9: case 10: normJump  (mVU, mFC);			  return thisPtr; // JR/JALR
-				case 5: branchCase(Jcc_Greater);		// IBGTZ
+				case 3: condBranch(mVU, mFC, Jcc_Equal);		  return thisPtr; // IBEQ
-				case 6: branchCase(Jcc_LessOrEqual);	// IBLEQ
+				case 4: condBranch(mVU, mFC, Jcc_GreaterOrEqual); return thisPtr; // IBGEZ
-				case 7: branchCase(Jcc_Less);			// IBLTZ
+				case 5: condBranch(mVU, mFC, Jcc_Greater);		  return thisPtr; // IBGTZ
-				case 8: branchCase(Jcc_NotEqual);		// IBNEQ
+				case 6: condBranch(mVU, mFC, Jcc_LessOrEqual);	  return thisPtr; // IBLEQ
-				case 1: case 2: // B/BAL
+				case 7: condBranch(mVU, mFC, Jcc_Less);			  return thisPtr; // IBLTZ
-
+				case 8: condBranch(mVU, mFC, Jcc_NotEqual);		  return thisPtr; // IBNEQ
 					mVUprint("mVUcompile B/BAL");
 					incPC(-3); // Go back to branch opcode (to get branch imm addr)
 					if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, 1, xStatus, xMac, xClip); } // E-bit Branch
 					mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles);
 					// Check if branch-block has already been compiled
 					blockCreate(branchAddr/8);
 					pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs);
 					if (pBlock)	{ xJMP(pBlock->x86ptrStart); }
 					else		{ mVUcompile(mVU, branchAddr, (uptr)&mVUregs); }
 					return thisPtr;
 				case 9: case 10: // JR/JALR
 					mVUprint("mVUcompile JR/JALR");
 					incPC(-3); // Go back to jump opcode
 					if (mVUlow.constJump.isValid) {
 						if (mVUup.eBit) { // E-bit Jump
 							iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1);
 							mVUendProgram(mVU, 1, xStatus, xMac, xClip);
 						}
 						else {
 							int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8);
 							mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles);
 							// Check if jump-to-block has already been compiled
 							blockCreate(jumpAddr/8);
 							pBlock = mVUblocks[jumpAddr/8]->search((microRegInfo*)&mVUregs);
 							if (pBlock)	{ xJMP(pBlock->x86ptrStart); }
 							else		{ mVUcompile(mVU, jumpAddr, (uptr)&mVUregs); }
 						}
 						return thisPtr;
 					}
 					if (mVUup.eBit) { // E-bit Jump
 						mVUendProgram(mVU, 2, xStatus, xMac, xClip);
 						MOV32MtoR(gprT1, (uptr)&mVU->branch);
 						MOV32RtoM((uptr)&mVU->regs->VI[REG_TPC].UL, gprT1);
 						xJMP(mVU->exitFunct);
 						return thisPtr;
 					}
 					memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
 					mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles);
 					mVUbackupRegs(mVU);
 					MOV32MtoR(gprT2, (uptr)&mVU->branch);	  // Get startPC (ECX first argument for __fastcall)
 					MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX second argument for __fastcall)
 					if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState)
 					else			 xCALL(mVUcompileJIT<1>);
 					mVUrestoreRegs(mVU);
 					JMPR(gprT1);  // Jump to rec-code address
 					return thisPtr;
 			}
 			// Conditional Branches
 			mVUprint("mVUcompile conditional branch");
 			if (mVUup.eBit) return thisPtr; // Handled in Branch Case
 			if (bBlock) {  // Branch non-taken has already been compiled
 				incPC(-3); // Go back to branch opcode (to get branch imm addr)
 				// Check if branch-block has already been compiled
 				blockCreate(branchAddr/8);
 				pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs);
 				if (pBlock)	{ xJMP( pBlock->x86ptrStart ); }
 				else		{ mVUblockFetch(mVU, branchAddr, (uptr)&mVUregs); }
 			}
 			else {
 				uptr jumpAddr;
 				u32 bPC = iPC; // mVUcompile can modify iPC and mVUregs so back them up
 				memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
 				incPC2(1);  // Get PC for branch not-taken
 				mVUcompile(mVU, xPC, (uptr)&mVUregs);
 				iPC = bPC;
 				incPC(-3); // Go back to branch opcode (to get branch imm addr)
 				jumpAddr = (uptr)mVUblockFetch(mVU, branchAddr, (uptr)&pBlock->pStateEnd);
 				*ajmp = (jumpAddr - ((uptr)ajmp + 4));
 			}
 			return thisPtr;
 			}
 		}
-	if (x == endCount) { Console::Error("microVU%d: Possible infinite compiling loop!", params mVU->index); }
+	}
 	if ((x == endCount) && (x!=1)) { Console::Error("microVU%d: Possible infinite compiling loop!", params mVU->index); }
 	// E-bit End
 	mVUsetupRange(mVU, xPC-8, 0);
-	mVUendProgram(mVU, 1, xStatus, xMac, xClip);
+	mVUendProgram(mVU, &mFC, 1);
 	return thisPtr;
 }
@ -576,4 +429,3 @@ microVUt(void*) mVUblockFetch(microVU* mVU, u32 startPC, uptr pState) {
 microVUx(void*) __fastcall mVUcompileJIT(u32 startPC, uptr pState) {
 	return mVUblockFetch(mVUx, startPC, pState);
 }
--- a/pcsx2/x86/microVU_Flags.inl
+++ b/pcsx2/x86/microVU_Flags.inl
@ -77,7 +77,7 @@ int sortFlag(int* fFlag, int* bFlag, int cycles) {
 #define sFlagCond ((sFLAG.doFlag && !mVUsFlagHack) || mVUlow.isFSSET || mVUinfo.doDivFlag)
 // Note: Flag handling is 'very' complex, it requires full knowledge of how microVU recs work, so don't touch!
-microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) {
+microVUt(void) mVUsetFlags(mV, microFlagCycles& mFC) {
 	int endPC  = iPC;
 	u32 aCount = 1; // Amount of instructions needed to get valid mac flag instances for block linking
@ -95,31 +95,31 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) {
 	// Status/Mac Flags Setup Code
 	int xS = 0, xM = 0, xC = 0;
 	for (int i = 0; i < 4; i++) {
-		xStatus[i] = i;
+		mFC.xStatus[i] = i;
-		xMac   [i] = i;
+		mFC.xMac   [i] = i;
-		xClip  [i] = i;
+		mFC.xClip  [i] = i;
 	}
-	if (!(mVUpBlock->pState.needExactMatch & 0x00f)) {
+	if (!(mVUpBlock->pState.needExactMatch & 1)) {
 		xS = (mVUpBlock->pState.flags >> 0) & 3;
-		xStatus[0] = -1; xStatus[1] = -1;
+		mFC.xStatus[0] = -1; mFC.xStatus[1] = -1;
-		xStatus[2] = -1; xStatus[3] = -1;
+		mFC.xStatus[2] = -1; mFC.xStatus[3] = -1;
-		xStatus[(xS-1)&3] = 0;
+		mFC.xStatus[(xS-1)&3] = 0;
 	}
-	if (!(mVUpBlock->pState.needExactMatch & 0xf00)) {
+	if (!(mVUpBlock->pState.needExactMatch & 4)) {
 		xC = (mVUpBlock->pState.flags >> 2) & 3;
-		xClip[0] = -1; xClip[1] = -1;
+		mFC.xClip[0] = -1; mFC.xClip[1] = -1;
-		xClip[2] = -1; xClip[3] = -1;
+		mFC.xClip[2] = -1; mFC.xClip[3] = -1;
-		xClip[(xC-1)&3] = 0;
+		mFC.xClip[(xC-1)&3] = 0;
 	}
-	if (!(mVUpBlock->pState.needExactMatch & 0x0f0)) {
+	if (!(mVUpBlock->pState.needExactMatch & 2)) {
-		xMac[0] = -1; xMac[1] = -1;
+		mFC.xMac[0] = -1; mFC.xMac[1] = -1;
-		xMac[2] = -1; xMac[3] = -1;
+		mFC.xMac[2] = -1; mFC.xMac[3] = -1;
 	}
-	int cycles	= 0;
+	mFC.cycles	= 0;
 	u32 xCount	= mVUcount; // Backup count
 	iPC			= mVUstartPC;
 	for (mVUcount = 0; mVUcount < xCount; mVUcount++) {
@ -129,11 +129,11 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) {
 			}
 			else mVUstatusFlagOp(mVU);
 		}
-		cycles += mVUstall;
+		mFC.cycles += mVUstall;
-		sFLAG.read = findFlagInst(xStatus, cycles);
+		sFLAG.read = findFlagInst(mFC.xStatus, mFC.cycles);
-		mFLAG.read = findFlagInst(xMac,	   cycles);
+		mFLAG.read = findFlagInst(mFC.xMac,	   mFC.cycles);
-		cFLAG.read = findFlagInst(xClip,   cycles);
+		cFLAG.read = findFlagInst(mFC.xClip,   mFC.cycles);
 		sFLAG.write = xS;
 		mFLAG.write = xM;
@ -143,16 +143,16 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) {
 		mFLAG.lastWrite = (xM-1) & 3;
 		cFLAG.lastWrite = (xC-1) & 3;
-		if (sFlagCond)	  { xStatus[xS] = cycles + 4; xS = (xS+1) & 3; }
+		if (sFlagCond)	  { mFC.xStatus[xS] = mFC.cycles + 4; xS = (xS+1) & 3; }
-		if (mFLAG.doFlag) { xMac   [xM] = cycles + 4; xM = (xM+1) & 3; }
+		if (mFLAG.doFlag) { mFC.xMac   [xM] = mFC.cycles + 4; xM = (xM+1) & 3; }
-		if (cFLAG.doFlag) { xClip  [xC] = cycles + 4; xC = (xC+1) & 3; }
+		if (cFLAG.doFlag) { mFC.xClip  [xC] = mFC.cycles + 4; xC = (xC+1) & 3; }
-		cycles++;
+		mFC.cycles++;
 		incPC2(2);
 	}
 	mVUregs.flags = ((__Clip) ? 0 : (xC << 2)) | ((__Status) ? 0 : xS);
-	return cycles;
+	iPC = endPC;
 }
 #define getFlagReg1(x)	((x == 3) ? gprF3 : ((x == 2) ? gprF2 : ((x == 1) ? gprF1 : gprF0)))
@ -163,11 +163,11 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) {
 #define shuffleClip		((bClip[3]<<6)|(bClip[2]<<4)|(bClip[1]<<2)|bClip[0])
 // Recompiles Code for Proper Flags on Block Linkings
-microVUt(void) mVUsetupFlags(mV, int* xStatus, int* xMac, int* xClip, int cycles) {
+microVUt(void) mVUsetupFlags(mV, microFlagCycles& mFC) {
 	if (__Status) {
 		int bStatus[4];
-		int sortRegs = sortFlag(xStatus, bStatus, cycles);
+		int sortRegs = sortFlag(mFC.xStatus, bStatus, mFC.cycles);
 		// DevCon::Status("sortRegs = %d", params sortRegs);
 		// Note: Emitter will optimize out mov(reg1, reg1) cases...
 		if (sortRegs == 1) {
@ -206,7 +206,7 @@ microVUt(void) mVUsetupFlags(mV, int* xStatus, int* xMac, int* xClip, int cycles
 	if (__Mac) {
 		int bMac[4];
-		sortFlag(xMac, bMac, cycles);
+		sortFlag(mFC.xMac, bMac, mFC.cycles);
 		SSE_MOVAPS_M128_to_XMM(xmmT1, (uptr)mVU->macFlag);
 		SSE_SHUFPS_XMM_to_XMM (xmmT1, xmmT1, shuffleMac);
 		SSE_MOVAPS_XMM_to_M128((uptr)mVU->macFlag, xmmT1);
@ -214,7 +214,7 @@ microVUt(void) mVUsetupFlags(mV, int* xStatus, int* xMac, int* xClip, int cycles
 	if (__Clip) {
 		int bClip[4];
-		sortFlag(xClip, bClip, cycles);
+		sortFlag(mFC.xClip, bClip, mFC.cycles);
 		SSE_MOVAPS_M128_to_XMM(xmmT2, (uptr)mVU->clipFlag);
 		SSE_SHUFPS_XMM_to_XMM (xmmT2, xmmT2, shuffleClip);
 		SSE_MOVAPS_XMM_to_M128((uptr)mVU->clipFlag, xmmT2);
@ -248,7 +248,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) {
 		if		(mVUbranch)		{ branch = ((mVUbranch>8)?(5):((mVUbranch<3)?3:4)); aBranchAddr = branchAddr; mVUbranch = 0; }
 		incPC(1);
 	}
-	if (mVUcount < 4) { mVUflagInfo |= 0xfff; }
+	if (mVUcount < 4) { mVUregs.needExactMatch |= 0x7; }
 	iPC		  = oldPC;
 	mVUcount  = oldCount;
 	mVUbranch = oldBranch;
@ -263,18 +263,18 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) {
 microVUt(void) mVUsetFlagInfo(mV) {
 	branchType1 { incPC(-1); mVUflagPass(mVU, branchAddr, 4); incPC(1); }
 	branchType2 { 
-		if (!mVUlow.constJump.isValid) { mVUflagInfo |= 0xfff; } 
+		if (!mVUlow.constJump.isValid) { mVUregs.needExactMatch |= 0x7; } 
 		else { mVUflagPass(mVU, (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8), 4); }
 	}
 	branchType3 {
 		incPC(-1); 
 		mVUflagPass(mVU, branchAddr, 4);
-		int backupFlagInfo = mVUflagInfo;
+		int backupFlagInfo = mVUregs.needExactMatch;
-		mVUflagInfo = 0;
+		mVUregs.needExactMatch = 0;
 		incPC(4); // Branch Not Taken
 		mVUflagPass(mVU, xPC, 4);
 		incPC(-3);		
-		mVUflagInfo |= backupFlagInfo;
+		mVUregs.needExactMatch |= backupFlagInfo;
 	}
 }
--- a/pcsx2/x86/microVU_IR.h
+++ b/pcsx2/x86/microVU_IR.h
@ -34,16 +34,18 @@ union regInfo {
 #endif
 __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares
 	u32 needExactMatch;	// If set, block needs an exact match of pipeline state
 	u32 vi15;			// Constant Prop Info for vi15 (only valid if sign-bit set)
 	u8 needExactMatch;	// If set, block needs an exact match of pipeline state
 	u8 q;
 	u8 p;
 	u8 r;
 	u8 xgkick;
 	u8 viBackUp;
 	u8 VI[16];
 	regInfo VF[32];
 	u8 flags;			// clip x2 :: status x2
-	u8 padding[3];		// 160 bytes
+	u8 blockType;		// 0 = Normal; 1,2 = Compile one instruction (E-bit/Branch Ending)
 	u8 padding[5];		// 160 bytes
 #if defined(_MSC_VER)
 };
 #else
@ -105,6 +107,8 @@ struct microLowerOp {
 	microVIreg VI_read[2];	  // VI regs read by this instruction
 	microConstInfo constJump; // Constant Reg Info for JR/JARL instructions
 	u32  branch;	// Branch Type (0 = Not a Branch, 1 = B. 2 = BAL, 3~8 = Conditional Branches, 9 = JALR, 10 = JR)
 	bool badBranch; // This instruction is a Branch who has another branch in its Delay Slot
 	bool evilBranch;// This instruction is a Branch in a Branch Delay Slot (Instruction after badBranch)
 	bool isNOP;		// This instruction is a NOP
 	bool isFSSET;	// This instruction is a FSSET
 	bool noWriteVF;	// Don't write back the result of a lower op to VF reg if upper op writes to same reg (or if VF = 0)
@ -122,6 +126,13 @@ struct microFlagInst {
 	u8	 read;		  // Points to the instance that should be read by a lower instruction (t-stage read)
 };
 struct microFlagCycles {
 	int xStatus[4];
 	int xMac[4];
 	int xClip[4];
 	int cycles;
 };
 struct microOp {
 	u8	 stall;			 // Info on how much current instruction stalled
 	bool isEOB;			 // Cur Instruction is last instruction in block (End of Block)
@ -163,9 +174,10 @@ struct microIR {
 void mVUmergeRegs(int dest, int src,  int xyzw, bool modXYZW);
 void mVUsaveReg(int reg, uptr offset, int xyzw, bool modXYZW);
 void mVUloadReg(int reg, uptr offset, int xyzw);
 void mVUloadIreg(int reg, int xyzw, VURegs* vuRegs);
 struct microXMM {
-	int  reg;		// VF Reg Number Stored (-1 = Temp; 0 = vf0 and will not be written back; 32 = ACC)
+	int  reg;		// VF Reg Number Stored (-1 = Temp; 0 = vf0 and will not be written back; 32 = ACC; 33 = I reg)
 	int  xyzw;		// xyzw to write back (0 = Don't write back anything AND cached vfReg has all vectors valid)
 	int  count;		// Count of when last used
 	bool isNeeded;	// Is needed for current instruction
@ -221,9 +233,15 @@ public:
 		xmmReg[reg].xyzw	 =  0;
 		xmmReg[reg].isNeeded =  0;
 	}
 	void clearRegVF(int VFreg) {
 		for (int i = 0; i < xmmTotal; i++) {
 			if (xmmReg[i].reg == VFreg) clearReg(i);
 		}
 	}
 	void writeBackReg(int reg, bool invalidateRegs = 1) {
 		if ((xmmReg[reg].reg > 0) && xmmReg[reg].xyzw) { // Reg was modified and not Temp or vf0
-			if (xmmReg[reg].reg == 32) mVUsaveReg(reg, (uptr)&vuRegs->ACC.UL[0], xmmReg[reg].xyzw, 1);
+			if		(xmmReg[reg].reg == 33) SSE_MOVSS_XMM_to_M32((uptr)&vuRegs->VI[REG_I].UL, reg);
 			else if (xmmReg[reg].reg == 32) mVUsaveReg(reg, (uptr)&vuRegs->ACC.UL[0],	 xmmReg[reg].xyzw, 1);
 			else							mVUsaveReg(reg, (uptr)&vuRegs->VF[xmmReg[reg].reg].UL[0], xmmReg[reg].xyzw, 1);
 			if (invalidateRegs) {
 				for (int i = 0; i < xmmTotal; i++) {
@ -307,13 +325,15 @@ public:
 		if (vfWriteReg >= 0) { // Reg Will Be Modified (allow partial reg loading)
 			if	   ((vfLoadReg ==  0) && !(xyzw & 1)) { SSE2_PXOR_XMM_to_XMM(x, x); }
 			else if	(vfLoadReg == 33) mVUloadIreg(x, xyzw, vuRegs);
 			else if	(vfLoadReg == 32) mVUloadReg (x, (uptr)&vuRegs->ACC.UL[0], xyzw);
 			else if (vfLoadReg >=  0) mVUloadReg (x, (uptr)&vuRegs->VF[vfLoadReg].UL[0], xyzw);
 			xmmReg[x].reg  = vfWriteReg;
 			xmmReg[x].xyzw = xyzw;
 		}
 		else { // Reg Will Not Be Modified (always load full reg for caching)
-			if		(vfLoadReg == 32) SSE_MOVAPS_M128_to_XMM(x, (uptr)&vuRegs->ACC.UL[0]);
+			if		(vfLoadReg == 33) mVUloadIreg(x, 0xf, vuRegs);
 			else if	(vfLoadReg == 32) SSE_MOVAPS_M128_to_XMM(x, (uptr)&vuRegs->ACC.UL[0]);
 			else if (vfLoadReg >=  0) SSE_MOVAPS_M128_to_XMM(x, (uptr)&vuRegs->VF[vfLoadReg].UL[0]);
 			xmmReg[x].reg  = vfLoadReg;
 			xmmReg[x].xyzw = 0;
--- a/pcsx2/x86/microVU_Lower.inl
+++ b/pcsx2/x86/microVU_Lower.inl
@ -458,7 +458,7 @@ mVUop(mVU_FCAND) {
 		mVUallocVIb(mVU, gprT1, 1);
 	}
 	pass3 { mVUlog("FCAND vi01, $%x", _Imm24_); }
-	pass4 { mVUflagInfo |= 0xf << 8; }
+	pass4 { mVUregs.needExactMatch |= 4; }
 }
 mVUop(mVU_FCEQ) {
@ -471,7 +471,7 @@ mVUop(mVU_FCEQ) {
 		mVUallocVIb(mVU, gprT1, 1);
 	}
 	pass3 { mVUlog("FCEQ vi01, $%x", _Imm24_); }
-	pass4 { mVUflagInfo |= 0xf << 8; }
+	pass4 { mVUregs.needExactMatch |= 4; }
 }
 mVUop(mVU_FCGET) {
@ -482,7 +482,7 @@ mVUop(mVU_FCGET) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FCGET vi%02d", _Ft_);	   }
-	pass4 { mVUflagInfo |= 0xf << 8; }
+	pass4 { mVUregs.needExactMatch |= 4; }
 }
 mVUop(mVU_FCOR) {
@ -495,7 +495,7 @@ mVUop(mVU_FCOR) {
 		mVUallocVIb(mVU, gprT1, 1);
 	}
 	pass3 { mVUlog("FCOR vi01, $%x", _Imm24_); }
-	pass4 { mVUflagInfo |= 0xf << 8; }
+	pass4 { mVUregs.needExactMatch |= 4; }
 }
 mVUop(mVU_FCSET) {
@ -520,7 +520,7 @@ mVUop(mVU_FMAND) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FMAND vi%02d, vi%02d", _Ft_, _Fs_); }
-	pass4 { mVUflagInfo |= 0xf << 4;   }
+	pass4 { mVUregs.needExactMatch |= 2;   }
 }
 mVUop(mVU_FMEQ) {
@ -534,7 +534,7 @@ mVUop(mVU_FMEQ) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FMEQ vi%02d, vi%02d", _Ft_, _Fs_); }
-	pass4 { mVUflagInfo |= 0xf << 4;  }
+	pass4 { mVUregs.needExactMatch |= 2;  }
 }
 mVUop(mVU_FMOR) {
@ -546,7 +546,7 @@ mVUop(mVU_FMOR) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FMOR vi%02d, vi%02d", _Ft_, _Fs_); }
-	pass4 { mVUflagInfo |= 0xf << 4;  }
+	pass4 { mVUregs.needExactMatch |= 2;  }
 }
 //------------------------------------------------------------------
@ -561,7 +561,7 @@ mVUop(mVU_FSAND) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FSAND vi%02d, $%x", _Ft_, _Imm12_); }
-	pass4 { mVUflagInfo |= 0xf; }
+	pass4 { mVUregs.needExactMatch |= 1; }
 }
 mVUop(mVU_FSOR) {
@ -572,7 +572,7 @@ mVUop(mVU_FSOR) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FSOR vi%02d, $%x", _Ft_, _Imm12_); }
-	pass4 { mVUflagInfo |= 0xf; }
+	pass4 { mVUregs.needExactMatch |= 1; }
 }
 mVUop(mVU_FSEQ) {
@ -604,7 +604,7 @@ mVUop(mVU_FSEQ) {
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
 	pass3 { mVUlog("FSEQ vi%02d, $%x", _Ft_, _Imm12_); }
-	pass4 { mVUflagInfo |= 0xf; }
+	pass4 { mVUregs.needExactMatch |= 1; }
 }
 mVUop(mVU_FSSET) {
@ -1149,109 +1149,166 @@ mVUop(mVU_XGKICK) {
 // Branches/Jumps
 //------------------------------------------------------------------
-#define setBranchA(x, _x_) {															\
+void setBranchA(mP, int x, int _x_) {
-	pass1 { if (_Imm11_ == 1 && !_x_) { mVUlow.isNOP = 1; return; } mVUbranch = x; }	\
+	pass1 { 
-	pass2 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; }						\
+		if (_Imm11_ == 1 && !_x_) { mVUlow.isNOP = 1; return; } 
-	pass3 { mVUbranch = x; }															\
+		mVUbranch	  = x; 
-	pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; }						\
+		mVUlow.branch = x;
 	}
 	pass2 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; }
 	pass3 { mVUbranch = x; }
 	pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; }
 }
 void condEvilBranch(mV, int JMPcc) {
 	using namespace x86Emitter;
 	if (mVUlow.badBranch) {
 		xMOV(ptr32[&mVU->branch], eax);
 		xMOV(ptr32[&mVU->badBranch], branchAddrN);
 		xCMP(ax, 0);
 		xForwardJump8 cJMP((JccComparisonType)JMPcc);
 			incPC(4); // Branch Not Taken
 			xMOV(ptr32[&mVU->badBranch], xPC);
 			incPC(-4);
 		cJMP.SetTarget();
 		return;
 	}
 	xMOV(ptr32[&mVU->evilBranch], branchAddr);
 	xCMP(ax, 0);
 	xForwardJump8 cJMP((JccComparisonType)JMPcc);
 		xMOV(eax, ptr32[&mVU->badBranch]); // Branch Not Taken
 		xMOV(ptr32[&mVU->evilBranch], eax);
 	cJMP.SetTarget();
 }
 mVUop(mVU_B) {
-	setBranchA(1, 0);
+	setBranchA(mX, 1, 0);
 	pass1 { mVUanalyzeNormBranch(mVU, 0, 0); }
 	pass2 { 
 		if (mVUlow.badBranch)  { MOV32ItoM((uptr)&mVU->badBranch,  branchAddrN); }
 		if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } 
 	}
 	pass3 { mVUlog("B [<a href=\"#addr%04x\">%04x</a>]", branchAddr, branchAddr); }
 }
 mVUop(mVU_BAL) {
-	setBranchA(2, _It_);
+	setBranchA(mX, 2, _It_);
-	pass1 { analyzeVIreg2(_It_, mVUlow.VI_write, 1); setConstReg(_It_, bSaveAddr); }
+	pass1 { mVUanalyzeNormBranch(mVU, _It_, 1); }
 	pass2 {
 		MOV32ItoR(gprT1, bSaveAddr);
 		mVUallocVIb(mVU, gprT1, _It_);
 		if (mVUlow.badBranch)  { MOV32ItoM((uptr)&mVU->badBranch,  branchAddrN); }
 		if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } 
 	}
 	pass3 { mVUlog("BAL vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Ft_, branchAddr, branchAddr); }
 }
 mVUop(mVU_IBEQ) {
-	setBranchA(3, 0);
+	using namespace x86Emitter;
-	pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); }
+	setBranchA(mX, 3, 0);
 	pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); }
 	pass2 {
 		if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else mVUallocVIa(mVU, gprT1, _Is_);
 		if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); }
-		MOV32RtoM((uptr)&mVU->branch, gprT1);
+
 		if (!(isBadOrEvil))	MOV32RtoM((uptr)&mVU->branch, gprT1);
 		else				condEvilBranch(mVU, Jcc_Equal);
 	}
 	pass3 { mVUlog("IBEQ vi%02d, vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Ft_, _Fs_, branchAddr, branchAddr); }
 }
 mVUop(mVU_IBGEZ) {
-	setBranchA(4, 0);
+	using namespace x86Emitter;
-	pass1 { mVUanalyzeBranch1(mVU, _Is_); }
+	setBranchA(mX, 4, 0);
 	pass1 { mVUanalyzeCondBranch1(mVU, _Is_); }
 	pass2 {
 		if (mVUlow.memReadIs)	MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else					mVUallocVIa(mVU, gprT1, _Is_);
-		MOV32RtoM((uptr)&mVU->branch, gprT1);
+		if (!(isBadOrEvil))		MOV32RtoM((uptr)&mVU->branch, gprT1);
 		else					condEvilBranch(mVU, Jcc_GreaterOrEqual);
 	}
 	pass3 { mVUlog("IBGEZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
 }
 mVUop(mVU_IBGTZ) {
-	setBranchA(5, 0);
+	using namespace x86Emitter;
-	pass1 { mVUanalyzeBranch1(mVU, _Is_); }
+	setBranchA(mX, 5, 0);
 	pass1 { mVUanalyzeCondBranch1(mVU, _Is_); }
 	pass2 {
 		if (mVUlow.memReadIs)	MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else					mVUallocVIa(mVU, gprT1, _Is_);
-		MOV32RtoM((uptr)&mVU->branch, gprT1);
+		if (!(isBadOrEvil))		MOV32RtoM((uptr)&mVU->branch, gprT1);
 		else					condEvilBranch(mVU, Jcc_Greater);
 	}
 	pass3 { mVUlog("IBGTZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
 }
 mVUop(mVU_IBLEZ) {
-	setBranchA(6, 0);
+	using namespace x86Emitter;
-	pass1 { mVUanalyzeBranch1(mVU, _Is_); }
+	setBranchA(mX, 6, 0);
 	pass1 { mVUanalyzeCondBranch1(mVU, _Is_); }
 	pass2 {
 		if (mVUlow.memReadIs)	MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else					mVUallocVIa(mVU, gprT1, _Is_);
-		MOV32RtoM((uptr)&mVU->branch, gprT1);
+		if (!(isBadOrEvil))		MOV32RtoM((uptr)&mVU->branch, gprT1);
 		else					condEvilBranch(mVU, Jcc_LessOrEqual);
 	}
 	pass3 { mVUlog("IBLEZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
 }
 mVUop(mVU_IBLTZ) {
-	setBranchA(7, 0);
+	using namespace x86Emitter;
-	pass1 { mVUanalyzeBranch1(mVU, _Is_); }
+	setBranchA(mX, 7, 0);
 	pass1 { mVUanalyzeCondBranch1(mVU, _Is_); }
 	pass2 {	
 		if (mVUlow.memReadIs)	MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else					mVUallocVIa(mVU, gprT1, _Is_);
-		MOV32RtoM((uptr)&mVU->branch, gprT1);
+		if (!(isBadOrEvil))		MOV32RtoM((uptr)&mVU->branch, gprT1);
 		else					condEvilBranch(mVU, Jcc_Less);
 	}
 	pass3 { mVUlog("IBLTZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
 }
 mVUop(mVU_IBNE) {
-	setBranchA(8, 0);
+	using namespace x86Emitter;
-	pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); }
+	setBranchA(mX, 8, 0);
 	pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); }
 	pass2 {
 		if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else mVUallocVIa(mVU, gprT1, _Is_);
 		if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup);
 		else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); }
-		MOV32RtoM((uptr)&mVU->branch, gprT1);
+		
 		if (!(isBadOrEvil))	MOV32RtoM((uptr)&mVU->branch, gprT1);
 		else				condEvilBranch(mVU, Jcc_NotEqual);
 	}
 	pass3 { mVUlog("IBNE vi%02d, vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Ft_, _Fs_, branchAddr, branchAddr); }
 }
 void normJumpPass2(mV) {
 	if (!mVUlow.constJump.isValid || mVUlow.evilBranch) {
 		mVUallocVIa(mVU, gprT1, _Is_);
 		SHL32ItoR(gprT1, 3);
 		AND32ItoR(gprT1, mVU->microMemSize - 8);
 		MOV32RtoM((uptr)&mVU->branch, gprT1);
 		if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch,	  gprT1);
 		else					MOV32RtoM((uptr)&mVU->evilBranch, gprT1);
 		if (mVUlow.badBranch) {
 			ADD32ItoR(gprT1, 8);
 			AND32ItoR(gprT1, mVU->microMemSize - 8);
 			MOV32RtoM((uptr)&mVU->badBranch,  gprT1);
 		}
 	}
 }
 mVUop(mVU_JR) {
 	mVUbranch = 9;
 	pass1 { mVUanalyzeJump(mVU, _Is_, 0, 0); }
-	pass2 {
+	pass2 { normJumpPass2(mVU); }
 		if (!mVUlow.constJump.isValid) {
 			mVUallocVIa(mVU, gprT1, _Is_);
 			SHL32ItoR(gprT1, 3);
 			AND32ItoR(gprT1, mVU->microMemSize - 8);
 			MOV32RtoM((uptr)&mVU->branch, gprT1);
 		}
 	}
 	pass3 { mVUlog("JR [vi%02d]", _Fs_); }
 }
@ -1259,12 +1316,7 @@ mVUop(mVU_JALR) {
 	mVUbranch = 10;
 	pass1 { mVUanalyzeJump(mVU, _Is_, _It_, 1); }
 	pass2 {
-		if (!mVUlow.constJump.isValid) {
+		normJumpPass2(mVU);
 			mVUallocVIa(mVU, gprT1, _Is_);
 			SHL32ItoR(gprT1, 3);
 			AND32ItoR(gprT1, mVU->microMemSize - 8);
 			MOV32RtoM((uptr)&mVU->branch, gprT1);
 		}
 		MOV32ItoR(gprT1, bSaveAddr);
 		mVUallocVIb(mVU, gprT1, _It_);
 	}
--- a/pcsx2/x86/microVU_Misc.h
+++ b/pcsx2/x86/microVU_Misc.h
@ -84,6 +84,7 @@ declareAllVariables
 #define _XYZW_SS	(_X+_Y+_Z+_W==1)
 #define _XYZW_SS2	(_XYZW_SS && (_X_Y_Z_W != 8))
 #define _XYZW_PS	(_X_Y_Z_W == 0xf)
 #define _XYZWss(x)	((x==8) || (x==4) || (x==2) || (x==1))
 #define _bc_	 (mVU->code & 0x3)
 #define _bc_x	((mVU->code & 0x3) == 0)
@ -204,8 +205,9 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
 #define sFLAG		 mVUinfo.sFlag
 #define mFLAG		 mVUinfo.mFlag
 #define cFLAG		 mVUinfo.cFlag
 #define mVUflagInfo	 mVUregs.needExactMatch
 #define mVUrange	 mVUcurProg.ranges.range[mVUcurProg.ranges.total]
 #define isEvilBlock	 (mVUpBlock->pState.blockType == 2)
 #define isBadOrEvil  (mVUlow.badBranch || mVUlow.evilBranch)
 #define xPC			 ((iPC / 2) * 8)
 #define curI		 ((u32*)mVU->regs->Micro)[iPC] //mVUcurProg.data[iPC]
 #define setCode()	 { mVU->code = curI; }
@ -213,6 +215,7 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
 #define incPC2(x)	 { iPC = ((iPC + x) & (mVU->progSize-1)); }
 #define bSaveAddr	 (((xPC + 16) & (mVU->microMemSize-8)) / 8)
 #define branchAddr	 ((xPC + 8  + (_Imm11_ * 8)) & (mVU->microMemSize-8))
 #define branchAddrN	 ((xPC + 16 + (_Imm11_ * 8)) & (mVU->microMemSize-8))
 #define shufflePQ	 (((mVU->p) ? 0xb0 : 0xe0) | ((mVU->q) ? 0x01 : 0x04))
 #define cmpOffset(x) ((u8*)&(((u8*)x)[mVUprogI.ranges.range[i][0]]))
 #define Rmem		 (uptr)&mVU->regs->VI[REG_R].UL
@ -221,9 +224,9 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
 #define shuffleSS(x) ((x==1)?(0x27):((x==2)?(0xc6):((x==4)?(0xe1):(0xe4))))
 // Flag Info
-#define __Status	 (mVUflagInfo & (0xf<<0))
+#define __Status	 (mVUregs.needExactMatch & 1)
-#define __Mac		 (mVUflagInfo & (0xf<<4))
+#define __Mac		 (mVUregs.needExactMatch & 2)
-#define __Clip		 (mVUflagInfo & (0xf<<8))
+#define __Clip		 (mVUregs.needExactMatch & 4)
 // Pass 3 Helper Macros
 #define _Fsf_String	 ((_Fsf_ == 3) ? "w" : ((_Fsf_ == 2) ? "z" : ((_Fsf_ == 1) ? "y" : "x")))
--- a/pcsx2/x86/microVU_Misc.inl
+++ b/pcsx2/x86/microVU_Misc.inl
@ -39,8 +39,10 @@ void mVUclamp1(int reg, int regT1, int xyzw) {
 }
 // Used for Operand Clamping
-void mVUclamp2(int reg, int regT1, int xyzw) {
+void mVUclamp2(microVU* mVU, int reg, int regT1, int xyzw) {
-	if (CHECK_VU_SIGN_OVERFLOW && (regT1 >= 0)) {
+	if (CHECK_VU_SIGN_OVERFLOW) {
 		int regT1b = 0;
 		if (regT1 < 0) { regT1 = mVU->regAlloc->allocReg(); regT1b = 1; }
 		switch (xyzw) {
 			case 1: case 2: case 4: case 8:
 				SSE_MOVSS_XMM_to_XMM (regT1, reg);
@ -57,6 +59,7 @@ void mVUclamp2(int reg, int regT1, int xyzw) {
 				SSE_ORPS_XMM_to_XMM  (reg, regT1);
 				break;
 		}
 		if (regT1b) mVU->regAlloc->clearNeeded(regT1);
 	}
 	else mVUclamp1(reg, regT1, xyzw);
 }
@ -94,6 +97,11 @@ void mVUloadReg2(int reg, int gprReg, uptr offset, int xyzw) {
 	}
 }
 void mVUloadIreg(int reg, int xyzw, VURegs* vuRegs) {
 	SSE_MOVSS_M32_to_XMM(reg, (uptr)&vuRegs->VI[REG_I].UL);
 	if (!_XYZWss(xyzw)) SSE_SHUFPS_XMM_to_XMM(reg, reg, 0);
 }
 // Modifies the Source Reg!
 void mVUsaveReg(int reg, uptr offset, int xyzw, bool modXYZW) {
 	/*SSE_MOVAPS_M128_to_XMM(xmmT2, offset);
@ -350,7 +358,7 @@ void MIN_MAX_PS(microVU* mVU, int to, int from, int t1, int t2, bool min) {
 	if (t2b) mVU->regAlloc->clearNeeded(t2);
 }
-// Warning: Modifies from's upper 3 vectors, and t1
+// Warning: Modifies to's upper 3 vectors, and t1
 void MIN_MAX_SS(mV, int to, int from, int t1, bool min) {
 	bool t1b = 0;
 	if (t1 < 0) { t1 = mVU->regAlloc->allocReg(); t1b = 1; }
--- a/pcsx2/x86/microVU_Upper.inl
+++ b/pcsx2/x86/microVU_Upper.inl
@ -131,7 +131,7 @@ void setupFtReg(microVU* mVU, int& Ft, int& tempFt, int opCase) {
 		mVU->regAlloc->clearNeeded(tempFt);
 		tempFt = Ft;
 	}
-	opCase3 { Ft = mVU->regAlloc->allocReg(); tempFt = Ft; getIreg(mVU, Ft, 1); }
+	opCase3 { Ft = mVU->regAlloc->allocReg(33, 0, _X_Y_Z_W); tempFt = Ft; }
 	opCase4 {
 		if (_XYZW_SS && !mVUinfo.readQ) { Ft = xmmPQ; tempFt = -1; }
 		else { Ft = mVU->regAlloc->allocReg(); tempFt = Ft; getQreg(Ft, mVUinfo.readQ); }
@ -152,9 +152,9 @@ void mVU_FMACa(microVU* mVU, int recPass, int opCase, int opType, bool isACC, co
 		}
 		else { Fs = mVU->regAlloc->allocReg(_Fs_, _Fd_, _X_Y_Z_W); }
-		opCase1 { if((opType == 2) && _XYZW_PS)	{ mVUclamp1(Ft, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0)
+		opCase1 { if((opType == 2) && _XYZW_PS)	{ mVUclamp2(mVU, Ft, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0)
-		opCase1 { if((opType == 2) && _XYZW_PS) { mVUclamp1(Fs, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0)
+		opCase1 { if((opType == 2) && _XYZW_PS) { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0)
-		opCase2 { if (opType == 2)				{ mVUclamp1(Fs, -1, _X_Y_Z_W); } } // Clamp Needed for alot of games (TOTA, DoM, etc...)
+		opCase2 { if (opType == 2)				{ mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } } // Clamp Needed for alot of games (TOTA, DoM, etc...)
 		if (_XYZW_SS) SSE_SS[opType](mVU, Fs, Ft, -1, -1);
 		else		  SSE_PS[opType](mVU, Fs, Ft, -1, -1);
@ -185,7 +185,7 @@ void mVU_FMACb(microVU* mVU, int recPass, int opCase, int opType, const char* op
 		ACC = mVU->regAlloc->allocReg(32, 32, 0xf, 0);
 		if (_XYZW_SS2) { SSE2_PSHUFD_XMM_to_XMM(ACC, ACC, shuffleSS(_X_Y_Z_W)); }
-		opCase2 { mVUclamp1(Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...)
+		opCase2 { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...)
 		if (_XYZW_SS) SSE_SS[2](mVU, Fs, Ft, -1, -1);
 		else		  SSE_PS[2](mVU, Fs, Ft, -1, -1);
@ -223,7 +223,7 @@ void mVU_FMACc(microVU* mVU, int recPass, int opCase, const char* opName) {
 		Fs  = mVU->regAlloc->allocReg(_Fs_, _Fd_, _X_Y_Z_W);
 		if (_XYZW_SS2) { SSE2_PSHUFD_XMM_to_XMM(ACC, ACC, shuffleSS(_X_Y_Z_W)); }
-		opCase2 { mVUclamp1(Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...)
+		opCase2 { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...)
 		if (_XYZW_SS) { SSE_SS[2](mVU, Fs, Ft, -1, -1); SSE_SS[0](mVU, Fs, ACC, tempFt, -1); }
 		else		  { SSE_PS[2](mVU, Fs, Ft, -1, -1); SSE_PS[0](mVU, Fs, ACC, tempFt, -1); }
--- a/pcsx2_suite_2010.sln
+++ b/pcsx2_suite_2010.sln
@ -0,0 +1,113 @@
 Microsoft Visual Studio Solution File, Format Version 11.00
 # Visual Studio 10
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "pcsx2", "pcsx2\windows\VCprojects\pcsx2.vcxproj", "{1CEFD830-2B76-4596-A4EE-BCD7280A60BD}"
 	ProjectSection(ProjectDependencies) = postProject
 		{26511268-2902-4997-8421-ECD7055F9E28} = {26511268-2902-4997-8421-ECD7055F9E28}
 		{2F6C0388-20CB-4242-9F6C-A6EBB6A83F47} = {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}
 	EndProjectSection
 EndProject
 Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "3rdparty", "3rdparty", "{A306AA7F-A984-407A-A37D-3275979368C4}"
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "zlib", "3rdparty\zlib\zlib.vcxproj", "{2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}"
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "w32pthreads", "3rdparty\w32pthreads\pthreads.vcxproj", "{26511268-2902-4997-8421-ECD7055F9E28}"
 EndProject
 Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "plugins", "plugins", "{10757E7A-E2B8-4FD3-9194-71331BF36D13}"
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "CDVDolio", "plugins\CDVDolio\cdvd.vcxproj", "{FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}"
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "GSdx", "plugins\GSdx\GSdx.vcxproj", "{18E42F6F-3A62-41EE-B42F-79366C4F1E95}"
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "xpad", "plugins\xpad\xpad.vcxproj", "{6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}"
 EndProject
 Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Common", "Common", "{06C9589C-DFD3-4CE8-B69A-32208C2767B2}"
 	ProjectSection(SolutionItems) = preProject
 		common\include\afxresmw.h = common\include\afxresmw.h
 		common\include\Pcsx2Api.h = common\include\Pcsx2Api.h
 		common\include\Pcsx2Config.h = common\include\Pcsx2Config.h
 		common\include\Pcsx2Defs.h = common\include\Pcsx2Defs.h
 		common\include\Pcsx2Types.h = common\include\Pcsx2Types.h
 	EndProjectSection
 EndProject
 Global
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 		Debug|Win32 = Debug|Win32
 		Devel|Win32 = Devel|Win32
 		Release SSE2|Win32 = Release SSE2|Win32
 		Release SSE4|Win32 = Release SSE4|Win32
 		Release SSSE3|Win32 = Release SSSE3|Win32
 	EndGlobalSection
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 		{18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Debug|Win32.ActiveCfg = Debug SSE2|Win32
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 	GlobalSection(SolutionProperties) = preSolution
 		HideSolutionNode = FALSE
 	EndGlobalSection
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      <ModuleDefinitionFile>
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    <ClCompile>
      <PrecompiledHeader>Use</PrecompiledHeader>
    </ClCompile>
    <Link>
      <ModuleDefinitionFile>.\cdvd.def</ModuleDefinitionFile>
      <DelayLoadDLLs>%(DelayLoadDLLs)</DelayLoadDLLs>
      <DataExecutionPrevention>
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    <Link>
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      <DelayLoadDLLs>%(DelayLoadDLLs)</DelayLoadDLLs>
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      <ModuleDefinitionFile>.\cdvd.def</ModuleDefinitionFile>
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      <DataExecutionPrevention>
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    <Link>
      <DataExecutionPrevention>
      </DataExecutionPrevention>
      <TargetMachine>MachineX64</TargetMachine>
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  </ItemDefinitionGroup>
  <ItemGroup>
    <ClCompile Include="cdvd.cpp" />
    <ClCompile Include="CDVDDialog.cpp" />
    <ClCompile Include="SettingsDlg.cpp" />
    <ClCompile Include="stdafx.cpp">
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug SSE2|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug SSE2|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release SSE2|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release SSE2|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release SSSE3|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release SSSE3|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug SSSE3|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug SSSE3|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug SSE4|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug SSE4|X64'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release SSE4|Win32'">Create</PrecompiledHeader>
      <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release SSE4|X64'">Create</PrecompiledHeader>
    </ClCompile>
  </ItemGroup>
  <ItemGroup>
    <ResourceCompile Include="cdvd.rc" />
  </ItemGroup>
  <ItemGroup>
    <None Include="cdvd.def" />
    <None Include="res\cdvd.rc2" />
  </ItemGroup>
  <ItemGroup>
    <ClInclude Include="cdvd.h" />
    <ClInclude Include="CDVDDialog.h" />
    <ClInclude Include="resource.h" />
    <ClInclude Include="SettingsDlg.h" />
    <ClInclude Include="stdafx.h" />
    <ClInclude Include="svnrev.h" />
  </ItemGroup>
  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
  <ImportGroup Label="ExtensionTargets">
  </ImportGroup>
 </Project>
--- a/plugins/CDVDolio/cdvd_vs2010.vcxproj.user
+++ b/plugins/CDVDolio/cdvd_vs2010.vcxproj.user
@ -1,6 +0,0 @@
 <?xml version="1.0" encoding="utf-8"?>
 <Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
    <Globals_RESOURCE_FILE>cdvd.rc</Globals_RESOURCE_FILE>
  </PropertyGroup>
 </Project>
--- a/plugins/CDVDolio/vsprops/ProjectRootDir.props
+++ b/plugins/CDVDolio/vsprops/ProjectRootDir.props
@ -1,25 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup Label="UserMacros">
    <ProjectRootDir>$(ProjectDir).</ProjectRootDir>
    <SvnRootDir>$(ProjectRootDir)\..\..</SvnRootDir>
    <SvnCommonDir>$(SvnRootDir)\common</SvnCommonDir>
    <PcsxSubsection>plugins</PcsxSubsection>
  </PropertyGroup>
  <PropertyGroup>
    <_PropertySheetDisplayName>ProjectRootDir</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemGroup>
    <BuildMacro Include="ProjectRootDir">
      <Value>$(ProjectRootDir)</Value>
    </BuildMacro>
    <BuildMacro Include="SvnRootDir">
      <Value>$(SvnRootDir)</Value>
    </BuildMacro>
    <BuildMacro Include="SvnCommonDir">
      <Value>$(SvnCommonDir)</Value>
    </BuildMacro>
    <BuildMacro Include="PcsxSubsection">
      <Value>$(PcsxSubsection)</Value>
    </BuildMacro>
  </ItemGroup>
 </Project>
--- a/plugins/CDVDolio/vsprops/common.props
+++ b/plugins/CDVDolio/vsprops/common.props
@ -1,27 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
    <_PropertySheetDisplayName>common</_PropertySheetDisplayName>
    <OutDir>..\..\bin\plugins\</OutDir>
    <IntDir>$(PlatformName)\$(Configuration)\</IntDir>
    <TargetName>$(ProjectName)</TargetName>
    <TargetExt>.dll</TargetExt>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <IntrinsicFunctions>true</IntrinsicFunctions>
      <PreprocessorDefinitions>WIN32;_WINDOWS;_WIN32_WINNT=0x500;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <FloatingPointModel>Fast</FloatingPointModel>
      <RuntimeTypeInfo>false</RuntimeTypeInfo>
      <WarningLevel>Level4</WarningLevel>
      <DebugInformationFormat>ProgramDatabase</DebugInformationFormat>
      <DisableSpecificWarnings>4995;4324;%(DisableSpecificWarnings)</DisableSpecificWarnings>
    </ClCompile>
    <Link>
      <AdditionalDependencies>d3d10.lib;d3dx10.lib;d3d9.lib;d3dx9.lib;ddraw.lib;dxguid.lib;winmm.lib;strmiids.lib;xinput.lib;%(AdditionalDependencies)</AdditionalDependencies>
      <DelayLoadDLLs>d3d9.dll;d3dx9_40.dll;d3d10.dll;d3dx10_40.dll;%(DelayLoadDLLs)</DelayLoadDLLs>
      <GenerateDebugInformation>true</GenerateDebugInformation>
      <SubSystem>Windows</SubSystem>
      <RandomizedBaseAddress>false</RandomizedBaseAddress>
    </Link>
  </ItemDefinitionGroup>
 </Project>
--- a/plugins/CDVDolio/vsprops/debug.props
+++ b/plugins/CDVDolio/vsprops/debug.props
@ -1,15 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
    <_PropertySheetDisplayName>debug</_PropertySheetDisplayName>
    <LinkIncremental>true</LinkIncremental>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <Optimization>Disabled</Optimization>
      <PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <MinimalRebuild>true</MinimalRebuild>
      <BasicRuntimeChecks>StackFrameRuntimeCheck</BasicRuntimeChecks>
      <RuntimeLibrary>MultiThreadedDebugDLL</RuntimeLibrary>
    </ClCompile>
  </ItemDefinitionGroup>
 </Project>
--- a/plugins/CDVDolio/vsprops/ssse3.props
+++ b/plugins/CDVDolio/vsprops/ssse3.props
@ -1,11 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
    <_PropertySheetDisplayName>sse3</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <EnableEnhancedInstructionSet>StreamingSIMDExtensions2</EnableEnhancedInstructionSet>
      <PreprocessorDefinitions>_M_SSE=0x301;%(PreprocessorDefinitions)</PreprocessorDefinitions>
    </ClCompile>
  </ItemDefinitionGroup>
 </Project>
--- a/plugins/GSdx/GS.cpp
+++ b/plugins/GSdx/GS.cpp
@ -289,6 +289,18 @@ EXPORT_C GSirqCallback(void (*irq)())
 	s_irq = irq;
 }
 EXPORT_C_(int) GSsetupRecording(int start, void* data)
 {
 	GSKeyEventData e;
 	e.type = KEYPRESS;
 	e.key = VK_F12;
 	s_gs->KeyEvent(&e, start & 1);
 	return 1;
 }
 EXPORT_C GSsetGameCRC(uint32 crc, int options)
 {
 	s_gs->SetGameCRC(crc, options);
--- a/plugins/GSdx/GSRenderer.cpp
+++ b/plugins/GSdx/GSRenderer.cpp
@ -375,7 +375,7 @@ void GSRenderer::VSync(int field)
 				if(offscreen->Map(m))
 				{
-					m_capture.DeliverFrame(m.bits, m.pitch, m_dev->IsRBSwapped());
+					m_capture.DeliverFrame(m.bits, m.pitch, !m_dev->IsRBSwapped());
 					offscreen->Unmap();
 				}
@ -403,7 +403,7 @@ bool GSRenderer::MakeSnapshot(const string& path)
 	return true;
 }
-void GSRenderer::KeyEvent(GSKeyEventData* e)
+void GSRenderer::KeyEvent(GSKeyEventData* e, int param)
 {
 	if(e->type == KEYPRESS)
 	{
@ -423,8 +423,8 @@ void GSRenderer::KeyEvent(GSKeyEventData* e)
 			m_shader = (m_shader + 3 + step) % 3;
 			return;
 		case VK_F12:
-			if(m_capture.IsCapturing()) m_capture.EndCapture();
+			if(param) m_capture.BeginCapture(GetFPS());
-			else m_capture.BeginCapture(GetFPS());
+			else m_capture.EndCapture();
 			return;
 		case VK_DELETE:
 			m_aa1 = !m_aa1;
--- a/plugins/GSdx/GSRenderer.h
+++ b/plugins/GSdx/GSRenderer.h
@ -76,8 +76,7 @@ public:
 	virtual bool Create(const string& title, int w, int h);
 	virtual void VSync(int field);
 	virtual bool MakeSnapshot(const string& path);
-	virtual void KeyEvent(GSKeyEventData* e);
+	virtual void KeyEvent(GSKeyEventData* e, int param = 0);
 	virtual bool CanUpscale() 
 	{
 		return !m_nativeres && m_regs->PMODE.EN != 0; // upscale ratio depends on the display size, with no output it may not be set correctly (ps2 logo to game transition)
--- a/plugins/GSdx/GSRendererDX.h
+++ b/plugins/GSdx/GSRendererDX.h
@ -31,6 +31,8 @@ class GSRendererDX : public GSRendererHW<Vertex>
 	GSVector2 m_pixelcenter;
 	bool m_logz;
 	bool m_fba;
 	int m_pixoff_x;
 	int m_pixoff_y;
 protected:
 	int m_topology;
@ -47,6 +49,8 @@ public:
 	{
 		m_logz = !!theApp.GetConfig("logz", 0);
 		m_fba = !!theApp.GetConfig("fba", 1);
 		m_pixoff_x = theApp.GetConfig("pixoff_x", 0);
 		m_pixoff_y = theApp.GetConfig("pixoff_y", 0);
 	}
 	virtual ~GSRendererDX()
@ -90,22 +94,24 @@ public:
 		else
 		{
 			om_dssel.ztst = ZTST_ALWAYS;
 			om_dssel.zwe = 0;
 		}
-/*
+
-		om_dssel.zte = context->TEST.ZTE;
+		if(context->FRAME.PSM != PSM_PSMCT24)
-		om_dssel.ztst = context->TEST.ZTST;
+		{
-		om_dssel.zwe = !context->ZBUF.ZMSK;
+			om_dssel.date = context->TEST.DATE;
-*/
+		}
-		om_dssel.date = context->FRAME.PSM != PSM_PSMCT24 ? context->TEST.DATE : 0;
+
-		om_dssel.fba = m_fba ? context->FBA.FBA : 0;
+		if(m_fba)
 		{
 			om_dssel.fba = context->FBA.FBA;
 		}
 		GSTextureFX::OMBlendSelector om_bsel;
-		om_bsel.abe = !IsOpaque();
+		if(!IsOpaque())
 		if(om_bsel.abe)
 		{
 			om_bsel.abe = PRIM->ABE || PRIM->AA1 && m_vt.m_primclass == GS_LINE_CLASS;
 			om_bsel.a = context->ALPHA.A;
 			om_bsel.b = context->ALPHA.B;
 			om_bsel.c = context->ALPHA.C;
@ -165,8 +171,8 @@ public:
 		float sx = 2.0f * rt->GetScale().x / (rt->GetWidth() << 4);
 		float sy = 2.0f * rt->GetScale().y / (rt->GetHeight() << 4);
-		float ox = (float)(int)context->XYOFFSET.OFX;
+		float ox = (float)(int)context->XYOFFSET.OFX + m_pixoff_x;
-		float oy = (float)(int)context->XYOFFSET.OFY;
+		float oy = (float)(int)context->XYOFFSET.OFY + m_pixoff_y;
 		float ox2 = 2.0f * m_pixelcenter.x / rt->GetWidth();
 		float oy2 = 2.0f * m_pixelcenter.y / rt->GetHeight();
--- a/plugins/GSdx/GSRendererSW.cpp
+++ b/plugins/GSdx/GSRendererSW.cpp
@ -392,9 +392,9 @@ void GSRendererSW::GetScanlineParam(GSScanlineParam& p, GS_PRIM_CLASS primclass)
 				p.sel.pabe = 1;
 			}
-			if(PRIM->AA1 && (primclass == GS_LINE_CLASS || primclass == GS_TRIANGLE_CLASS))
+			if(m_aa1 && PRIM->AA1 && (primclass == GS_LINE_CLASS || primclass == GS_TRIANGLE_CLASS))
 			{
-				p.sel.aa1 = m_aa1 ? 1 : 0;
+				p.sel.aa1 = 1;
 			}
 		}
--- a/plugins/GSdx/GSUtil.cpp
+++ b/plugins/GSdx/GSUtil.cpp
@ -100,12 +100,55 @@ bool GSUtil::HasCompatibleBits(uint32 spsm, uint32 dpsm)
 bool GSUtil::CheckDirectX()
 {
-	if(HINSTANCE hDll = LoadLibrary(format("d3dx9_%d.dll", D3DX_SDK_VERSION).c_str()))
+	OSVERSIONINFOEX version;
 	memset(&version, 0, sizeof(version));
 	version.dwOSVersionInfoSize = sizeof(version);
 	if(GetVersionEx((OSVERSIONINFO*)&version))
 	{
 		printf("Windows %d.%d.%d",
 			version.dwMajorVersion, 
 			version.dwMinorVersion, 
 			version.dwBuildNumber);
 		if(version.wServicePackMajor > 0)
 		{
 			printf(" (%s %d.%d)",
 				version.szCSDVersion, 
 				version.wServicePackMajor,
 				version.wServicePackMinor);
 		}
 		printf("\n");
 	}
 	if(IDirect3D9* d3d = Direct3DCreate9(D3D_SDK_VERSION))
 	{
 		D3DADAPTER_IDENTIFIER9 id;
 		if(S_OK == d3d->GetAdapterIdentifier(D3DADAPTER_DEFAULT, 0, &id))
 		{
 			printf("%s (%d.%d.%d.%d)\n",
 				id.Description, 
 				id.DriverVersion.HighPart >> 16, 
 				id.DriverVersion.HighPart & 0xffff, 
 				id.DriverVersion.LowPart >> 16, 
 				id.DriverVersion.LowPart & 0xffff);
 		}
 		d3d->Release();
 	}
 	string d3dx9_dll = format("d3dx9_%d.dll", D3DX_SDK_VERSION);
 	if(HINSTANCE hDll = LoadLibrary(d3dx9_dll.c_str()))
 	{
 		FreeLibrary(hDll);
 	}
 	else
 	{
 		printf("Cannot find %s\n", d3dx9_dll.c_str());
 		if(MessageBox(NULL, "You need to update directx, would you like to do it now?", "GSdx", MB_YESNO) == IDYES)
 		{
 			const char* url = "http://www.microsoft.com/downloads/details.aspx?FamilyId=2DA43D38-DB71-4C1B-BC6A-9B6652CD92A3";
--- a/plugins/GSdx/GSdx.def
+++ b/plugins/GSdx/GSdx.def
@ -29,6 +29,7 @@ EXPORTS
 	GSreadFIFO			
 	GSreadFIFO2			
 	GSirqCallback
 	GSsetupRecording		
 	GSsetGameCRC		
 	GSsetFrameSkip
 	GSsetFrameLimit		
--- a/plugins/GSdx/vsprops/common.props
+++ b/plugins/GSdx/vsprops/common.props
@ -1,33 +1,24 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
-    <_PropertySheetDisplayName>common</_PropertySheetDisplayName>
+    <_PropertySheetDisplayName>GSdx</_PropertySheetDisplayName>
    <OutDir>$(SolutionDir)bin\$(PcsxSubsection)\</OutDir>
    <IntDir>$(PlatformName)\$(Configuration)\</IntDir>
    <TargetName>$(ProjectName)-$(SSEtype)</TargetName>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <IntrinsicFunctions>true</IntrinsicFunctions>
      <PreprocessorDefinitions>WIN32;_WINDOWS;_WIN32_WINNT=0x500;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <FloatingPointModel>Fast</FloatingPointModel>
      <RuntimeTypeInfo>false</RuntimeTypeInfo>
      <WarningLevel>Level4</WarningLevel>
      <DebugInformationFormat>ProgramDatabase</DebugInformationFormat>
      <DisableSpecificWarnings>4995;4324;%(DisableSpecificWarnings)</DisableSpecificWarnings>
    </ClCompile>
    <Link>
      <AdditionalDependencies>JITProfiling.lib;d3d11_beta.lib;d3dx11.lib;d3d10.lib;d3d10_1.lib;d3dx10.lib;d3d9.lib;d3dx9.lib;ddraw.lib;dxguid.lib;winmm.lib;strmiids.lib;xinput.lib;cg.lib;cgGL.lib;glut32.lib;glew32.lib;%(AdditionalDependencies)</AdditionalDependencies>
      <AdditionalLibraryDirectories>./vtune;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
      <DelayLoadDLLs>d3d9.dll;d3dx9_41.dll;d3d10.dll;d3d10_1.dll;d3dx10_41.dll;d3d11.dll;d3d11_beta.dll;d3dx11_41.dll;%(DelayLoadDLLs)</DelayLoadDLLs>
      <GenerateDebugInformation>true</GenerateDebugInformation>
      <SubSystem>Windows</SubSystem>
      <RandomizedBaseAddress>false</RandomizedBaseAddress>
    </Link>
    <PostBuildEvent>
-      <Command>.\postBuild.cmd "$(TargetPath)" "$(TargetName)" $(TargetExt) $(PcsxSubsection)</Command>
+      <Command>
      </Command>
    </PostBuildEvent>
    <PreBuildEvent>
-      <Command>"$(SvnCommonDir)\vsprops\preBuild.cmd" "$(ProjectRootDir)"</Command>
+      <Command>"$(SolutionDir)common\vsprops\preBuild.cmd" "$(ProjectDir)."</Command>
    </PreBuildEvent>
  </ItemDefinitionGroup>
 </Project>
--- a/plugins/GSdx/GSdx.rc
+++ b/plugins/GSdx/GSdx.rc
@ -15,10 +15,10 @@
 /////////////////////////////////////////////////////////////////////////////
 // Hungarian resources
-#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_HUN)
+#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU)
 #ifdef _WIN32
-LANGUAGE LANG_HUNGARIAN, SUBLANG_DEFAULT
+LANGUAGE LANG_ENGLISH, SUBLANG_DEFAULT
-#pragma code_page(1250)
+#pragma code_page(1252)
 #endif //_WIN32
 #ifdef APSTUDIO_INVOKED
@ -40,34 +40,22 @@ END
 3 TEXTINCLUDE 
 BEGIN
    "#define _AFX_NO_SPLITTER_RESOURCES\r\n"
    "#define _AFX_NO_OLE_RESOURCES\r\n"
    "#define _AFX_NO_TRACKER_RESOURCES\r\n"
    "#define _AFX_NO_PROPERTY_RESOURCES\r\n"
    "\r\n"
    "#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU)\r\n"
    "LANGUAGE 9, 1\r\n"
    "#pragma code_page(1252)\r\n"
    "#include ""res\\GSdx.rc2""  // non-Microsoft Visual C++ edited resources\r\n"
    "#include ""afxres.rc""     // Standard components\r\n"
    "#endif\r\n"
    "\0"
 END
 #endif    // APSTUDIO_INVOKED
 #endif    // Hungarian resources
 /////////////////////////////////////////////////////////////////////////////
 /////////////////////////////////////////////////////////////////////////////
-// English (U.S.) resources
+//
 // RCDATA
 //
-#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU)
+IDR_CONVERT_FX		RCDATA "res\\convert.fx"
-#ifdef _WIN32
+IDR_TFX_FX			RCDATA "res\\tfx.fx"
-LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
+IDR_MERGE_FX		RCDATA "res\\merge.fx"
-#pragma code_page(1252)
+IDR_INTERLACE_FX	RCDATA "res\\interlace.fx"
 #endif //_WIN32
 /////////////////////////////////////////////////////////////////////////////
 //
@ -252,17 +240,7 @@ END
 //
 // Generated from the TEXTINCLUDE 3 resource.
 //
 #define _AFX_NO_SPLITTER_RESOURCES
 #define _AFX_NO_OLE_RESOURCES
 #define _AFX_NO_TRACKER_RESOURCES
 #define _AFX_NO_PROPERTY_RESOURCES
 #if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU)
 LANGUAGE 9, 1
 #pragma code_page(1252)
 #include "res\GSdx.rc2"  // non-Microsoft Visual C++ edited resources
 #include "afxres.rc"     // Standard components
 #endif
 /////////////////////////////////////////////////////////////////////////////
 #endif    // not APSTUDIO_INVOKED
--- a/plugins/GSdx/GSdx_vs2010.vcxproj
+++ b/plugins/GSdx/GSdx_vs2010.vcxproj
--- a/plugins/GSdx/GSdx_vs2010.vcxproj.filters
+++ b/plugins/GSdx/GSdx_vs2010.vcxproj.filters
@ -676,9 +676,6 @@
    <None Include="res\convert.fx">
      <Filter>Shaders</Filter>
    </None>
    <None Include="res\GSdx.rc2">
      <Filter>Resource Files</Filter>
    </None>
    <None Include="res\interlace.fx">
      <Filter>Shaders</Filter>
    </None>
--- a/plugins/GSdx/res/GSdx.rc2
+++ b/plugins/GSdx/res/GSdx.rc2
@ -1,18 +0,0 @@
 //
 // GSdx.RC2 - resources Microsoft Visual C++ does not edit directly
 //
 #ifdef APSTUDIO_INVOKED
 #error this file is not editable by Microsoft Visual C++
 #endif //APSTUDIO_INVOKED
 /////////////////////////////////////////////////////////////////////////////
 // Add manually edited resources here...
 IDR_CONVERT_FX		RCDATA "res\\convert.fx"
 IDR_TFX_FX			RCDATA "res\\tfx.fx"
 IDR_MERGE_FX		RCDATA "res\\merge.fx"
 IDR_INTERLACE_FX	RCDATA "res\\interlace.fx"
 /////////////////////////////////////////////////////////////////////////////
--- a/plugins/GSdx/vsprops/ProjectRootDir.props
+++ b/plugins/GSdx/vsprops/ProjectRootDir.props
@ -1,25 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup Label="UserMacros">
    <ProjectRootDir>$(ProjectDir).</ProjectRootDir>
    <SvnRootDir>$(ProjectRootDir)\..\..</SvnRootDir>
    <SvnCommonDir>$(SvnRootDir)\common</SvnCommonDir>
    <PcsxSubsection>plugins</PcsxSubsection>
  </PropertyGroup>
  <PropertyGroup>
    <_PropertySheetDisplayName>ProjectRootDir</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemGroup>
    <BuildMacro Include="ProjectRootDir">
      <Value>$(ProjectRootDir)</Value>
    </BuildMacro>
    <BuildMacro Include="SvnRootDir">
      <Value>$(SvnRootDir)</Value>
    </BuildMacro>
    <BuildMacro Include="SvnCommonDir">
      <Value>$(SvnCommonDir)</Value>
    </BuildMacro>
    <BuildMacro Include="PcsxSubsection">
      <Value>$(PcsxSubsection)</Value>
    </BuildMacro>
  </ItemGroup>
 </Project>
--- a/plugins/GSdx/vsprops/debug.props
+++ b/plugins/GSdx/vsprops/debug.props
@ -1,15 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
    <_PropertySheetDisplayName>debug</_PropertySheetDisplayName>
    <LinkIncremental>true</LinkIncremental>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <Optimization>Disabled</Optimization>
      <PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <MinimalRebuild>true</MinimalRebuild>
      <BasicRuntimeChecks>StackFrameRuntimeCheck</BasicRuntimeChecks>
      <RuntimeLibrary>MultiThreadedDebug</RuntimeLibrary>
    </ClCompile>
  </ItemDefinitionGroup>
 </Project>
--- a/plugins/GSdx/vsprops/release.props
+++ b/plugins/GSdx/vsprops/release.props
@ -1,23 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup>
    <_PropertySheetDisplayName>release</_PropertySheetDisplayName>
    <LinkIncremental>false</LinkIncremental>
  </PropertyGroup>
  <ItemDefinitionGroup>
    <ClCompile>
      <Optimization>MaxSpeed</Optimization>
      <InlineFunctionExpansion>AnySuitable</InlineFunctionExpansion>
      <IntrinsicFunctions>true</IntrinsicFunctions>
      <FavorSizeOrSpeed>Speed</FavorSizeOrSpeed>
      <OmitFramePointers>true</OmitFramePointers>
      <WholeProgramOptimization>true</WholeProgramOptimization>
      <PreprocessorDefinitions>NDEBUG;_SECURE_SCL=0;%(PreprocessorDefinitions)</PreprocessorDefinitions>
      <StringPooling>true</StringPooling>
      <BufferSecurityCheck>false</BufferSecurityCheck>
    </ClCompile>
    <Link>
      <OptimizeReferences>true</OptimizeReferences>
      <EnableCOMDATFolding>true</EnableCOMDATFolding>
    </Link>
  </ItemDefinitionGroup>
 </Project>
--- a/plugins/LilyPad/Config.cpp
+++ b/plugins/LilyPad/Config.cpp
@ -130,7 +130,11 @@ void SetLogSliderVal(HWND hWnd, int id, HWND hWndText, int val) {
 void RefreshEnabledDevices(int updateDeviceList) {
 	// Clears all device state.
-	if (updateDeviceList) EnumDevices();
+	static int lastXInputState = -1;
 	if (updateDeviceList || lastXInputState != config.gameApis.xInput) {
 		EnumDevices(config.gameApis.xInput);
 		lastXInputState = config.gameApis.xInput;
 	}
 	for (int i=0; i<dm->numDevices; i++) {
 		Device *dev = dm->devices[i];
@ -1094,11 +1098,16 @@ int CreateEffectBinding(Device *dev, wchar_t *effectID, unsigned int port, unsig
 	if (port > 1 || slot>3 || motor > 1 || !dev->numFFEffectTypes) {
 		return -1;
 	}
-	if (!effectID) {
+	ForceFeedbackEffectType *eff = 0;
-		effectID = dev->ffEffectTypes[0].effectID;
+	if (effectID) {
 		eff = dev->GetForcefeedbackEffect(effectID);
 	}
 	if (!eff) {
 		eff = dev->ffEffectTypes;
 	}
 	if (!eff) {
 		return -1;
 	}
 	ForceFeedbackEffectType *eff = dev->GetForcefeedbackEffect(effectID);
 	if (!eff) return -1;
 	int effectIndex = eff - dev->ffEffectTypes;
 	dev->pads[port][slot].ffBindings = (ForceFeedbackBinding*) realloc(dev->pads[port][slot].ffBindings, (dev->pads[port][slot].numFFBindings+1) * sizeof(ForceFeedbackBinding));
 	int newIndex = dev->pads[port][slot].numFFBindings;
@ -1404,7 +1413,14 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l
 					if (index < (unsigned int) dm->numDevices) {
 						Device *dev = dm->devices[index];
 						ForceFeedbackBinding *b;
-						int count = CreateEffectBinding(dev, 0, port, slot, cmd-ID_BIG_MOTOR, &b);
+						wchar_t *effectID = 0;
 						if (dev->api == DI) {
 							// Constant effect.
 							if (cmd == ID_BIG_MOTOR) effectID = L"13541C20-8E33-11D0-9AD0-00A0C9A06E35";
 							// Square.
 							else effectID = L"13541C22-8E33-11D0-9AD0-00A0C9A06E35";
 						}
 						int count = CreateEffectBinding(dev, effectID, port, slot, cmd-ID_BIG_MOTOR, &b);
 						if (b) {
 							int needSet = 1;
 							if (dev->api == XINPUT && dev->numFFAxes == 2) {
@ -1418,7 +1434,6 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l
 							}
 							else if (dev->api == DI) {
 								int bigIndex=0, littleIndex=0;
 								int constantEffect = 0, squareEffect = 0;
 								int j;
 								for (j=0; j<dev->numFFAxes; j++) {
 									// DI object instance.  0 is x-axis, 1 is y-axis.
@ -1430,20 +1445,14 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l
 										littleIndex = j;
 									}
 								}
 								for (j=0; j<dev->numFFEffectTypes; j++) {
 									if (!wcsicmp(L"13541C20-8E33-11D0-9AD0-00A0C9A06E35", dev->ffEffectTypes[j].effectID)) constantEffect = j;
 									if (!wcsicmp(L"13541C22-8E33-11D0-9AD0-00A0C9A06E35", dev->ffEffectTypes[j].effectID)) squareEffect = j;
 								}
 								needSet = 0;
 								if (cmd == ID_BIG_MOTOR) {
 									b->axes[bigIndex].force = BASE_SENSITIVITY;
 									b->axes[littleIndex].force = 1;
 									b->effectIndex = constantEffect;
 								}
 								else {
 									b->axes[bigIndex].force = 1;
 									b->axes[littleIndex].force = BASE_SENSITIVITY;
 									b->effectIndex = squareEffect;
 								}
 							}
 							if (needSet) {
@ -1695,7 +1704,7 @@ INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, L
 				selected = 0;
 				ListView_SetExtendedListViewStyleEx(hWndList, LVS_EX_FULLROWSELECT|LVS_EX_DOUBLEBUFFER, LVS_EX_FULLROWSELECT|LVS_EX_DOUBLEBUFFER);
 				SendMessage(hWndList, LVM_SETEXTENDEDLISTVIEWSTYLE, 0, LVS_EX_FULLROWSELECT);
-				SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Disabled");
+				SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Unplugged");
 				SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Dualshock 2");
 				SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Guitar");
 			}
--- a/plugins/LilyPad/DeviceEnumerator.cpp
+++ b/plugins/LilyPad/DeviceEnumerator.cpp
@ -7,7 +7,7 @@
 #include "RawInput.h"
 #include "XInput.h"
-void EnumDevices() {
+void EnumDevices(int hideDXXinput) {
 	// Needed for enumeration of some device types.
 	dm->ReleaseInput();
 	InputDeviceManager *oldDm = dm;
@ -17,7 +17,7 @@ void EnumDevices() {
 	EnumWindowsMessagingDevices();
 	EnumRawInputDevices();
 	EnumXInputDevices();
-	EnumDirectInputDevices();
+	EnumDirectInputDevices(hideDXXinput);
 	dm->CopyBindings(oldDm->numDevices, oldDm->devices);
--- a/plugins/LilyPad/DeviceEnumerator.h
+++ b/plugins/LilyPad/DeviceEnumerator.h
@ -9,5 +9,5 @@ struct InitInfo {
 	HWND hWndButton;
 };
-void EnumDevices();
+void EnumDevices(int hideDXXinput);
--- a/plugins/LilyPad/DirectInput.cpp
+++ b/plugins/LilyPad/DirectInput.cpp
@ -9,6 +9,16 @@
 #include "PS2Etypes.h"
 #include <stdio.h>
 // All for getting GUIDs of XInput devices....
 #include <wbemidl.h>
 #include <oleauto.h>
 // MS's code imports wmsstd.h, thus requiring the entire windows
 // media SDK also be installed for a simple macro.  This is
 // simpler and less silly.
 #ifndef SAFE_RELEASE
 #define SAFE_RELEASE(p)      { if(p) { (p)->Release(); (p)=NULL; } }
 #endif
 // Aka htons, without the winsock dependency.
 inline static u16 flipShort(u16 s) {
 	return (s>>8) | (s<<8);
@ -440,10 +450,126 @@ BOOL CALLBACK EnumDeviceObjectsCallback (LPCDIDEVICEOBJECTINSTANCE lpddoi, LPVOI
 	return DIENUM_CONTINUE;
 }
 // Evil code from MS's site.  If only they'd just made a way to get
 // an XInput device's GUID directly in the first place...
 BOOL IsXInputDevice( const GUID* pGuidProductFromDirectInput )
 {
    IWbemLocator*           pIWbemLocator  = NULL;
    IEnumWbemClassObject*   pEnumDevices   = NULL;
    IWbemClassObject*       pDevices[20]   = {0};
    IWbemServices*          pIWbemServices = NULL;
    BSTR                    bstrNamespace  = NULL;
    BSTR                    bstrDeviceID   = NULL;
    BSTR                    bstrClassName  = NULL;
    DWORD                   uReturned      = 0;
    bool                    bIsXinputDevice= false;
    UINT                    iDevice        = 0;
    VARIANT                 var;
    HRESULT                 hr;
    // CoInit if needed
    hr = CoInitialize(NULL);
    bool bCleanupCOM = SUCCEEDED(hr);
    // Create WMI
    hr = CoCreateInstance( __uuidof(WbemLocator),
                           NULL,
                           CLSCTX_INPROC_SERVER,
                           __uuidof(IWbemLocator),
                           (LPVOID*) &pIWbemLocator);
    if( FAILED(hr) || pIWbemLocator == NULL )
        goto LCleanup;
    bstrNamespace = SysAllocString( L"\\\\.\\root\\cimv2" );if( bstrNamespace == NULL ) goto LCleanup;        
    bstrClassName = SysAllocString( L"Win32_PNPEntity" );   if( bstrClassName == NULL ) goto LCleanup;        
    bstrDeviceID  = SysAllocString( L"DeviceID" );          if( bstrDeviceID == NULL )  goto LCleanup;        
    // Connect to WMI 
    hr = pIWbemLocator->ConnectServer( bstrNamespace, NULL, NULL, 0L, 
                                       0L, NULL, NULL, &pIWbemServices );
    if( FAILED(hr) || pIWbemServices == NULL )
        goto LCleanup;
    // Switch security level to IMPERSONATE. 
    CoSetProxyBlanket( pIWbemServices, RPC_C_AUTHN_WINNT, RPC_C_AUTHZ_NONE, NULL, 
                       RPC_C_AUTHN_LEVEL_CALL, RPC_C_IMP_LEVEL_IMPERSONATE, NULL, EOAC_NONE );                    
    hr = pIWbemServices->CreateInstanceEnum( bstrClassName, 0, NULL, &pEnumDevices ); 
    if( FAILED(hr) || pEnumDevices == NULL )
        goto LCleanup;
    // Loop over all devices
    for( ;; )
    {
        // Get 20 at a time
        hr = pEnumDevices->Next( 10000, 20, pDevices, &uReturned );
        if( FAILED(hr) )
            goto LCleanup;
        if( uReturned == 0 )
            break;
        for( iDevice=0; iDevice<uReturned; iDevice++ )
        {
            // For each device, get its device ID
            hr = pDevices[iDevice]->Get( bstrDeviceID, 0L, &var, NULL, NULL );
            if( SUCCEEDED( hr ) && var.vt == VT_BSTR && var.bstrVal != NULL )
            {
                // Check if the device ID contains "IG_".  If it does, then it's an XInput device
 				    // This information can not be found from DirectInput 
                if( wcsstr( var.bstrVal, L"IG_" ) )
                {
                    // If it does, then get the VID/PID from var.bstrVal
                    DWORD dwPid = 0, dwVid = 0;
                    WCHAR* strVid = wcsstr( var.bstrVal, L"VID_" );
                    if( strVid && swscanf( strVid, L"VID_%4X", &dwVid ) != 1 )
                        dwVid = 0;
                    WCHAR* strPid = wcsstr( var.bstrVal, L"PID_" );
                    if( strPid && swscanf( strPid, L"PID_%4X", &dwPid ) != 1 )
                        dwPid = 0;
                    // Compare the VID/PID to the DInput device
                    DWORD dwVidPid = MAKELONG( dwVid, dwPid );
                    if( dwVidPid == pGuidProductFromDirectInput->Data1 )
                    {
                        bIsXinputDevice = true;
                        goto LCleanup;
                    }
                }
            }   
            SAFE_RELEASE( pDevices[iDevice] );
        }
    }
 LCleanup:
    if(bstrNamespace)
        SysFreeString(bstrNamespace);
    if(bstrDeviceID)
        SysFreeString(bstrDeviceID);
    if(bstrClassName)
        SysFreeString(bstrClassName);
    for( iDevice=0; iDevice<20; iDevice++ )
        SAFE_RELEASE( pDevices[iDevice] );
    SAFE_RELEASE( pEnumDevices );
    SAFE_RELEASE( pIWbemLocator );
    SAFE_RELEASE( pIWbemServices );
    if( bCleanupCOM )
        CoUninitialize();
    return bIsXinputDevice;
 }
 struct DeviceEnumInfo {
 	IDirectInput8 *di8;
 	int ignoreXInput;
 };
 BOOL CALLBACK EnumCallback (LPCDIDEVICEINSTANCE lpddi, LPVOID pvRef) {
-	IDirectInput8* di8 = (IDirectInput8*)pvRef;
+	IDirectInput8* di8 = ((DeviceEnumInfo*)pvRef)->di8;
 	const wchar_t *name;
 	wchar_t temp[40];
 	//if (((DeviceEnumInfo*)pvRef)->ignoreXInput && lpddi->
 	if (lpddi->tszInstanceName[0]) {
 		name = lpddi->tszInstanceName;
 	}
@ -476,11 +602,13 @@ BOOL CALLBACK EnumCallback (LPCDIDEVICEINSTANCE lpddi, LPVOID pvRef) {
 	return DIENUM_CONTINUE;
 }
-void EnumDirectInputDevices() {
+void EnumDirectInputDevices(int ignoreXInput) {
-	IDirectInput8* di8 = GetDirectInput();
+	DeviceEnumInfo enumInfo;
-	if (!di8) return;
+	enumInfo.di8 = GetDirectInput();
 	if (!enumInfo.di8) return;
 	enumInfo.ignoreXInput = ignoreXInput;
 	di8d.deviceCount = 0;
-	di8->EnumDevices(DI8DEVCLASS_ALL, EnumCallback, di8, DIEDFL_ATTACHEDONLY);
+	enumInfo.di8->EnumDevices(DI8DEVCLASS_ALL, EnumCallback, &enumInfo, DIEDFL_ATTACHEDONLY);
 	ReleaseDirectInput();
 }
--- a/plugins/LilyPad/DirectInput.h
+++ b/plugins/LilyPad/DirectInput.h
@ -1,3 +1,3 @@
 #include "InputManager.h"
-void EnumDirectInputDevices();
+void EnumDirectInputDevices(int ignoreXInput);
--- a/plugins/LilyPad/InputManager.cpp
+++ b/plugins/LilyPad/InputManager.cpp
@ -112,15 +112,27 @@ void Device::AddFFAxis(const wchar_t *displayName, int id) {
 	ffAxes[numFFAxes].id = id;
 	ffAxes[numFFAxes].displayName = wcsdup(displayName);
 	numFFAxes++;
 	int bindingsExist = 0;
 	for (int port=0; port<2; port++) {
 		for (int slot=0; slot<4; slot++) {
 			for (int i=0; i<pads[port][slot].numFFBindings; i++) {
 				ForceFeedbackBinding *b = pads[port][slot].ffBindings+i;
 				b->axes = (AxisEffectInfo*) realloc(b->axes, sizeof(AxisEffectInfo) * (numFFAxes));
 				memset(b->axes + (numFFAxes-1), 0, sizeof(AxisEffectInfo));
 				bindingsExist = 1;
 			}
 		}
 	}
 	// Generally the case when not loading a binding file.
 	if (!bindingsExist) {
 		int i = numFFAxes-1;
 		ForceFeedbackAxis temp = ffAxes[i];
 		while (i && temp.id < ffAxes[i-1].id) {
 			ffAxes[i] = ffAxes[i-1];
 			i--;
 		}
 		ffAxes[i] = temp;
 	}
 }
 void Device::AllocState() {
--- a/plugins/LilyPad/LilyPad.cpp
+++ b/plugins/LilyPad/LilyPad.cpp
@ -969,20 +969,20 @@ u8 CALLBACK PADpoll(u8 value) {
 				u8 b1 = 0xFF, b2 = 0xFF;
 				for (i = 0; i<4; i++) {
-					b1 -= (sum->buttons[i]>=128) << i;
+					b1 -= (sum->buttons[i]>=0xF0) << i;
 				}
 				for (i = 0; i<8; i++) {
-					b2 -= (sum->buttons[i+4]>=128) << i;
+					b2 -= (sum->buttons[i+4]>=0xF0) << i;
 				}
 				if (config.padConfigs[query.port][query.slot].type == GuitarPad && !config.GH2) {
 					sum->sticks[0].horiz = -255;
 					// Not sure about this.  Forces wammy to be from 0 to 0x7F.
 					// if (sum->sticks[2].vert > 0) sum->sticks[2].vert = 0;
 				}
-				b1 -= ((sum->sticks[0].vert<=-128) << 4);
+				b1 -= ((sum->sticks[0].vert<=-0xF0) << 4);
-				b1 -= ((sum->sticks[0].horiz>=128) << 5);
+				b1 -= ((sum->sticks[0].horiz>=0xF0) << 5);
-				b1 -= ((sum->sticks[0].vert>=128) << 6);
+				b1 -= ((sum->sticks[0].vert>=0xF0) << 6);
-				b1 -= ((sum->sticks[0].horiz<=-128) << 7);
+				b1 -= ((sum->sticks[0].horiz<=-0xF0) << 7);
 				query.response[3] = b1;
 				query.response[4] = b2;
--- a/plugins/LilyPad/LilyPad.rc
+++ b/plugins/LilyPad/LilyPad.rc
@ -227,7 +227,7 @@ BEGIN
    CONTROL         "Port 1 Multitap",IDC_MULTITAP1,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,152,63,10
    CONTROL         "Port 2 Multitap",IDC_MULTITAP2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,164,63,10
    CONTROL         "",IDC_PAD_LIST,"SysListView32",LVS_REPORT | LVS_SINGLESEL | LVS_SHOWSELALWAYS | LVS_ALIGNLEFT | WS_TABSTOP,81,151,183,50,WS_EX_CLIENTEDGE
-    COMBOBOX        IDC_PAD_TYPE,270,152,140,41,CBS_DROPDOWNLIST | CBS_SORT | WS_VSCROLL | WS_TABSTOP
+    COMBOBOX        IDC_PAD_TYPE,270,152,140,41,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
    CONTROL         "Use analog mode whenever possible",IDC_ANALOG_START1,
                    "Button",BS_AUTOCHECKBOX | WS_TABSTOP,270,169,132,10
    GROUPBOX        "Device Diagnostics",IDC_STATIC,7,211,201,99
--- a/plugins/spu2-x/src/3rdparty/liba52/imdct.c
+++ b/plugins/spu2-x/src/3rdparty/liba52/imdct.c
@ -425,7 +425,7 @@ void a52_imdct_init (uint32_t mm_accel)
    } else
 #endif
    {
-	fprintf (stderr, "No accelerated IMDCT transform found\n");
+	//fprintf (stderr, "No accelerated IMDCT transform found\n");
 	ifft128 = ifft128_c;
 	ifft64 = ifft64_c;
    }
--- a/plugins/xpad/stdafx.h
+++ b/plugins/xpad/stdafx.h
@ -38,6 +38,7 @@
 #include <shellapi.h>
 #include <atlbase.h>
 #include <xinput.h>
 #include <assert.h>
 // stdc
--- a/plugins/xpad/vsprops/ProjectRootDir.props
+++ b/plugins/xpad/vsprops/ProjectRootDir.props
@ -1,25 +0,0 @@
 <Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
  <PropertyGroup Label="UserMacros">
    <ProjectRootDir>$(ProjectDir).</ProjectRootDir>
    <SvnRootDir>$(ProjectRootDir)\..\..</SvnRootDir>
    <SvnCommonDir>$(SvnRootDir)\common</SvnCommonDir>
    <PcsxSubsection>plugins</PcsxSubsection>
  </PropertyGroup>
  <PropertyGroup>
    <_PropertySheetDisplayName>ProjectRootDir</_PropertySheetDisplayName>
  </PropertyGroup>
  <ItemGroup>
    <BuildMacro Include="ProjectRootDir">
      <Value>$(ProjectRootDir)</Value>
    </BuildMacro>
    <BuildMacro Include="SvnRootDir">
      <Value>$(SvnRootDir)</Value>
    </BuildMacro>
    <BuildMacro Include="SvnCommonDir">
      <Value>$(SvnCommonDir)</Value>
    </BuildMacro>
    <BuildMacro Include="PcsxSubsection">
      <Value>$(PcsxSubsection)</Value>
    </BuildMacro>
  </ItemGroup>
 </Project>
--- a/plugins/xpad/vsprops/common.props
+++ b/plugins/xpad/vsprops/common.props
@ -1,27 +0,0 @@
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--- a/plugins/xpad/xpad_vs2010.vcxproj.user
+++ b/plugins/xpad/xpad_vs2010.vcxproj.user
@ -1,6 +0,0 @@
 <?xml version="1.0" encoding="utf-8"?>
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`@ -1,3 +1,3 @@`
	`#include "InputManager.h"`	`#include "InputManager.h"`

	`void EnumDirectInputDevices();`	`void EnumDirectInputDevices(int ignoreXInput);`