From 3f2f8571dffeb538cb0e4ddf7e111ee45613017b Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Wed, 5 Aug 2009 04:03:24 +0000 Subject: [PATCH 01/50] microVU: some optimizations... git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1605 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Alloc.inl | 6 ------ pcsx2/x86/microVU_Compile.inl | 30 ++++++++++++++++++------------ pcsx2/x86/microVU_Flags.inl | 1 + pcsx2/x86/microVU_IR.h | 21 +++++++++++++++------ pcsx2/x86/microVU_Misc.h | 1 + pcsx2/x86/microVU_Misc.inl | 5 +++++ pcsx2/x86/microVU_Upper.inl | 8 ++++---- 7 files changed, 44 insertions(+), 28 deletions(-) diff --git a/pcsx2/x86/microVU_Alloc.inl b/pcsx2/x86/microVU_Alloc.inl index 6f1d741b35..d794fc0082 100644 --- a/pcsx2/x86/microVU_Alloc.inl +++ b/pcsx2/x86/microVU_Alloc.inl @@ -117,12 +117,6 @@ microVUt(void) mVUallocVIb(mV, int GPRreg, int _reg_) { // I/P/Q Reg Allocators //------------------------------------------------------------------ -microVUt(void) getIreg(mV, int reg, bool modXYZW) { - SSE_MOVSS_M32_to_XMM(reg, (uptr)&mVU->regs->VI[REG_I].UL); - if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2(reg, -1, 8); - if (!((_XYZW_SS && modXYZW) || (_X_Y_Z_W == 8))) { mVUunpack_xyzw(reg, reg, 0); } -} - microVUt(void) getPreg(mV, int reg) { mVUunpack_xyzw(reg, xmmPQ, (2 + mVUinfo.readP)); /*if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2(reg, xmmT1, 15);*/ diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index e7c5769bb8..43266236c2 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -75,15 +75,19 @@ microVUt(void) doSwapOp(mV) { else { mVUopL(mVU, 1); incPC(1); doUpperOp(); } } -microVUt(void) doIbit(mV) { +microVUt(void) doIbit(microVU* mVU) { if (mVUup.iBit) { incPC(-1); + u32 tempI; + mVU->regAlloc->clearRegVF(33); + if (CHECK_VU_OVERFLOW && ((curI & 0x7fffffff) >= 0x7f800000)) { Console::Status("microVU%d: Clamping I Reg", params mVU->index); - int tempI = (0x80000000 & curI) | 0x7f7fffff; // Clamp I Reg - MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, tempI); + tempI = (0x80000000 & curI) | 0x7f7fffff; // Clamp I Reg } - else MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, curI); + else tempI = curI; + + MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, tempI); incPC(1); } } @@ -174,7 +178,9 @@ microVUt(void) mVUoptimizePipeState(mV) { for (int i = 0; i < 16; i++) { optimizeReg(mVUregs.VI[i]); } - mVUregs.r = 0; + if (mVUregs.q) { optimizeReg(mVUregs.q); if (!mVUregs.q) { incQ(); } } + if (mVUregs.p) { optimizeReg(mVUregs.p); if (!mVUregs.p) { incP(); } } + mVUregs.r = 0; // There are no stalls on the R-reg, so its Safe to discard info } // Recompiles Code for Proper Flags and Q/P regs on Block Linkings @@ -204,12 +210,12 @@ microVUt(void) mVUincCycles(mV, int x) { } if (mVUregs.q) { if (mVUregs.q > 4) { calcCycles(mVUregs.q, x); if (mVUregs.q <= 4) { mVUinfo.doDivFlag = 1; } } - else { calcCycles(mVUregs.q, x); } + else { calcCycles(mVUregs.q, x); } if (!mVUregs.q) { incQ(); } } if (mVUregs.p) { calcCycles(mVUregs.p, x); - if (!mVUregs.p || (mVUregs.p && mVUregsTemp.p)) { incP(); } + if (!mVUregs.p || mVUregsTemp.p) { incP(); } } if (mVUregs.xgkick) { calcCycles(mVUregs.xgkick, x); @@ -277,7 +283,8 @@ microVUt(void) mVUendProgram(mV, int isEbit, int* xStatus, int* xMac, int* xClip if (isEbit) { mVUprint("mVUcompile ebit"); - memset(&mVUinfo, 0, sizeof(mVUinfo)); + memset(&mVUinfo, 0, sizeof(mVUinfo)); + memset(&mVUregsTemp, 0, sizeof(mVUregsTemp)); mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0) mVUcycles -= 100; qInst = mVU->q; @@ -430,13 +437,12 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { // Sets Up Flag instances int xStatus[4], xMac[4], xClip[4]; int xCycles = mVUsetFlags(mVU, xStatus, xMac, xClip); - mVUtestCycles(mVU); - + // Fix up vi15 const info for propagation through blocks mVUregs.vi15 = (mVUconstReg[15].isValid && !CHECK_VU_CONSTHACK) ? ((1<<31) | (mVUconstReg[15].regValue&0xffff)) : 0; - // Optimize the End Pipeline State for nicer Block Linking - mVUoptimizePipeState(mVU); + mVUoptimizePipeState(mVU); // Optimize the End Pipeline State for nicer Block Linking + mVUtestCycles(mVU); // Update VU Cycles and Exit Early if Necessary // Second Pass iPC = mVUstartPC; diff --git a/pcsx2/x86/microVU_Flags.inl b/pcsx2/x86/microVU_Flags.inl index ca4ccb1fd3..4abc004193 100644 --- a/pcsx2/x86/microVU_Flags.inl +++ b/pcsx2/x86/microVU_Flags.inl @@ -152,6 +152,7 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) { } mVUregs.flags = ((__Clip) ? 0 : (xC << 2)) | ((__Status) ? 0 : xS); + iPC = endPC; return cycles; } diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index 44a1de55a3..f8faadd5ca 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -163,9 +163,10 @@ struct microIR { void mVUmergeRegs(int dest, int src, int xyzw, bool modXYZW); void mVUsaveReg(int reg, uptr offset, int xyzw, bool modXYZW); void mVUloadReg(int reg, uptr offset, int xyzw); +void mVUloadIreg(int reg, int xyzw, VURegs* vuRegs); struct microXMM { - int reg; // VF Reg Number Stored (-1 = Temp; 0 = vf0 and will not be written back; 32 = ACC) + int reg; // VF Reg Number Stored (-1 = Temp; 0 = vf0 and will not be written back; 32 = ACC; 33 = I reg) int xyzw; // xyzw to write back (0 = Don't write back anything AND cached vfReg has all vectors valid) int count; // Count of when last used bool isNeeded; // Is needed for current instruction @@ -221,10 +222,16 @@ public: xmmReg[reg].xyzw = 0; xmmReg[reg].isNeeded = 0; } + void clearRegVF(int VFreg) { + for (int i = 0; i < xmmTotal; i++) { + if (xmmReg[i].reg == VFreg) clearReg(i); + } + } void writeBackReg(int reg, bool invalidateRegs = 1) { if ((xmmReg[reg].reg > 0) && xmmReg[reg].xyzw) { // Reg was modified and not Temp or vf0 - if (xmmReg[reg].reg == 32) mVUsaveReg(reg, (uptr)&vuRegs->ACC.UL[0], xmmReg[reg].xyzw, 1); - else mVUsaveReg(reg, (uptr)&vuRegs->VF[xmmReg[reg].reg].UL[0], xmmReg[reg].xyzw, 1); + if (xmmReg[reg].reg == 33) SSE_MOVSS_XMM_to_M32((uptr)&vuRegs->VI[REG_I].UL, reg); + else if (xmmReg[reg].reg == 32) mVUsaveReg(reg, (uptr)&vuRegs->ACC.UL[0], xmmReg[reg].xyzw, 1); + else mVUsaveReg(reg, (uptr)&vuRegs->VF[xmmReg[reg].reg].UL[0], xmmReg[reg].xyzw, 1); if (invalidateRegs) { for (int i = 0; i < xmmTotal; i++) { if ((i == reg) || xmmReg[i].isNeeded) continue; @@ -307,13 +314,15 @@ public: if (vfWriteReg >= 0) { // Reg Will Be Modified (allow partial reg loading) if ((vfLoadReg == 0) && !(xyzw & 1)) { SSE2_PXOR_XMM_to_XMM(x, x); } - else if (vfLoadReg == 32) mVUloadReg(x, (uptr)&vuRegs->ACC.UL[0], xyzw); - else if (vfLoadReg >= 0) mVUloadReg(x, (uptr)&vuRegs->VF[vfLoadReg].UL[0], xyzw); + else if (vfLoadReg == 33) mVUloadIreg(x, xyzw, vuRegs); + else if (vfLoadReg == 32) mVUloadReg (x, (uptr)&vuRegs->ACC.UL[0], xyzw); + else if (vfLoadReg >= 0) mVUloadReg (x, (uptr)&vuRegs->VF[vfLoadReg].UL[0], xyzw); xmmReg[x].reg = vfWriteReg; xmmReg[x].xyzw = xyzw; } else { // Reg Will Not Be Modified (always load full reg for caching) - if (vfLoadReg == 32) SSE_MOVAPS_M128_to_XMM(x, (uptr)&vuRegs->ACC.UL[0]); + if (vfLoadReg == 33) mVUloadIreg(x, 0xf, vuRegs); + else if (vfLoadReg == 32) SSE_MOVAPS_M128_to_XMM(x, (uptr)&vuRegs->ACC.UL[0]); else if (vfLoadReg >= 0) SSE_MOVAPS_M128_to_XMM(x, (uptr)&vuRegs->VF[vfLoadReg].UL[0]); xmmReg[x].reg = vfLoadReg; xmmReg[x].xyzw = 0; diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 44c17a32fe..c2a2d509c6 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -84,6 +84,7 @@ declareAllVariables #define _XYZW_SS (_X+_Y+_Z+_W==1) #define _XYZW_SS2 (_XYZW_SS && (_X_Y_Z_W != 8)) #define _XYZW_PS (_X_Y_Z_W == 0xf) +#define _XYZWss(x) ((x==8) || (x==4) || (x==2) || (x==1)) #define _bc_ (mVU->code & 0x3) #define _bc_x ((mVU->code & 0x3) == 0) diff --git a/pcsx2/x86/microVU_Misc.inl b/pcsx2/x86/microVU_Misc.inl index 31203d624a..81982e8054 100644 --- a/pcsx2/x86/microVU_Misc.inl +++ b/pcsx2/x86/microVU_Misc.inl @@ -94,6 +94,11 @@ void mVUloadReg2(int reg, int gprReg, uptr offset, int xyzw) { } } +void mVUloadIreg(int reg, int xyzw, VURegs* vuRegs) { + SSE_MOVSS_M32_to_XMM(reg, (uptr)&vuRegs->VI[REG_I].UL); + if (!_XYZWss(xyzw)) SSE_SHUFPS_XMM_to_XMM(reg, reg, 0); +} + // Modifies the Source Reg! void mVUsaveReg(int reg, uptr offset, int xyzw, bool modXYZW) { /*SSE_MOVAPS_M128_to_XMM(xmmT2, offset); diff --git a/pcsx2/x86/microVU_Upper.inl b/pcsx2/x86/microVU_Upper.inl index d7c7f69acc..6e2464f308 100644 --- a/pcsx2/x86/microVU_Upper.inl +++ b/pcsx2/x86/microVU_Upper.inl @@ -120,18 +120,18 @@ void setupPass1(microVU* mVU, int opCase, bool isACC, bool noFlagUpdate) { // Sets Up Ft Reg for Normal, BC, I, and Q Cases void setupFtReg(microVU* mVU, int& Ft, int& tempFt, int opCase) { - opCase1 { + opCase1 { if (_XYZW_SS2) { Ft = mVU->regAlloc->allocReg(_Ft_, 0, _X_Y_Z_W); tempFt = Ft; } else { Ft = mVU->regAlloc->allocReg(_Ft_); tempFt = -1; } } - opCase2 { + opCase2 { tempFt = mVU->regAlloc->allocReg(_Ft_); - Ft = mVU->regAlloc->allocReg(); + Ft = mVU->regAlloc->allocReg(); mVUunpack_xyzw(Ft, tempFt, _bc_); mVU->regAlloc->clearNeeded(tempFt); tempFt = Ft; } - opCase3 { Ft = mVU->regAlloc->allocReg(); tempFt = Ft; getIreg(mVU, Ft, 1); } + opCase3 { Ft = mVU->regAlloc->allocReg(33, 0, _X_Y_Z_W); tempFt = Ft; } opCase4 { if (_XYZW_SS && !mVUinfo.readQ) { Ft = xmmPQ; tempFt = -1; } else { Ft = mVU->regAlloc->allocReg(); tempFt = Ft; getQreg(Ft, mVUinfo.readQ); } From 5025b3886e30111a6eb3fac8b2c50005b7bad1d2 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Wed, 5 Aug 2009 08:49:25 +0000 Subject: [PATCH 02/50] microVU: Removed the "Exiting from Possible Infinite Loop" logic from Release builds, should be a small speedup. Its still there in debug/devel builds, so we can easily tell if a game is hanging on VU1. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1606 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Compile.inl | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 43266236c2..d19c546733 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -359,13 +359,15 @@ microVUt(void) mVUtestCycles(mV) { iPC = mVUstartPC; mVUdebugNOW(0); SUB32ItoM((uptr)&mVU->cycles, mVUcycles); - u32* jmp32 = JG32(0); - MOV32ItoR(gprT2, xPC); - if (isVU1) CALLFunc((uptr)mVUwarning1); - //else CALLFunc((uptr)mVUwarning0); // VU0 is allowed early exit for COP2 Interlock Simulation - MOV32ItoR(gprR, Roffset); // Restore gprR - mVUendProgram(mVU, 0, NULL, NULL, NULL); - x86SetJ32(jmp32); + if (IsDevBuild || !isVU1) { + u32* jmp32 = JG32(0); + MOV32ItoR(gprT2, xPC); + if (isVU1) CALLFunc((uptr)mVUwarning1); + //else CALLFunc((uptr)mVUwarning0); // VU0 is allowed early exit for COP2 Interlock Simulation + MOV32ItoR(gprR, Roffset); // Restore gprR + mVUendProgram(mVU, 0, NULL, NULL, NULL); + x86SetJ32(jmp32); + } } microVUt(void) mVUinitConstValues(mV) { From 3cbd298cff69e9bb03dea8573d076a784dbceb7e Mon Sep 17 00:00:00 2001 From: mattmenke Date: Thu, 6 Aug 2009 04:50:55 +0000 Subject: [PATCH 03/50] LilyPad: A number of small fixups. DirectInput devices corresponding XInput devices should be listed as "[Detached]" when XInput is enabled. No idea if this works, as it requires an XBox 360 controller to fully test. FF Axes now sorted, rather than being displayed in the order MS returns them. Small motor DirectInput binding now correctly displays "Square" effect type in list when first created. Attempt to more accurately model "soft" vs "hard" presses. Don't have a game where this matters, so no idea if it works. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1607 96395faa-99c1-11dd-bbfe-3dabce05a288 --- plugins/LilyPad/Config.cpp | 37 ++++--- plugins/LilyPad/DeviceEnumerator.cpp | 4 +- plugins/LilyPad/DeviceEnumerator.h | 2 +- plugins/LilyPad/DirectInput.cpp | 138 ++++++++++++++++++++++++++- plugins/LilyPad/DirectInput.h | 2 +- plugins/LilyPad/InputManager.cpp | 12 +++ plugins/LilyPad/LilyPad.cpp | 12 +-- plugins/LilyPad/LilyPad.rc | 2 +- 8 files changed, 179 insertions(+), 30 deletions(-) diff --git a/plugins/LilyPad/Config.cpp b/plugins/LilyPad/Config.cpp index e3110b988e..a5bb915bf2 100644 --- a/plugins/LilyPad/Config.cpp +++ b/plugins/LilyPad/Config.cpp @@ -130,7 +130,11 @@ void SetLogSliderVal(HWND hWnd, int id, HWND hWndText, int val) { void RefreshEnabledDevices(int updateDeviceList) { // Clears all device state. - if (updateDeviceList) EnumDevices(); + static int lastXInputState = -1; + if (updateDeviceList || lastXInputState != config.gameApis.xInput) { + EnumDevices(config.gameApis.xInput); + lastXInputState = config.gameApis.xInput; + } for (int i=0; inumDevices; i++) { Device *dev = dm->devices[i]; @@ -1094,11 +1098,16 @@ int CreateEffectBinding(Device *dev, wchar_t *effectID, unsigned int port, unsig if (port > 1 || slot>3 || motor > 1 || !dev->numFFEffectTypes) { return -1; } - if (!effectID) { - effectID = dev->ffEffectTypes[0].effectID; + ForceFeedbackEffectType *eff = 0; + if (effectID) { + eff = dev->GetForcefeedbackEffect(effectID); + } + if (!eff) { + eff = dev->ffEffectTypes; + } + if (!eff) { + return -1; } - ForceFeedbackEffectType *eff = dev->GetForcefeedbackEffect(effectID); - if (!eff) return -1; int effectIndex = eff - dev->ffEffectTypes; dev->pads[port][slot].ffBindings = (ForceFeedbackBinding*) realloc(dev->pads[port][slot].ffBindings, (dev->pads[port][slot].numFFBindings+1) * sizeof(ForceFeedbackBinding)); int newIndex = dev->pads[port][slot].numFFBindings; @@ -1404,7 +1413,14 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l if (index < (unsigned int) dm->numDevices) { Device *dev = dm->devices[index]; ForceFeedbackBinding *b; - int count = CreateEffectBinding(dev, 0, port, slot, cmd-ID_BIG_MOTOR, &b); + wchar_t *effectID = 0; + if (dev->api == DI) { + // Constant effect. + if (cmd == ID_BIG_MOTOR) effectID = L"13541C20-8E33-11D0-9AD0-00A0C9A06E35"; + // Square. + else effectID = L"13541C22-8E33-11D0-9AD0-00A0C9A06E35"; + } + int count = CreateEffectBinding(dev, effectID, port, slot, cmd-ID_BIG_MOTOR, &b); if (b) { int needSet = 1; if (dev->api == XINPUT && dev->numFFAxes == 2) { @@ -1418,7 +1434,6 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l } else if (dev->api == DI) { int bigIndex=0, littleIndex=0; - int constantEffect = 0, squareEffect = 0; int j; for (j=0; jnumFFAxes; j++) { // DI object instance. 0 is x-axis, 1 is y-axis. @@ -1430,20 +1445,14 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l littleIndex = j; } } - for (j=0; jnumFFEffectTypes; j++) { - if (!wcsicmp(L"13541C20-8E33-11D0-9AD0-00A0C9A06E35", dev->ffEffectTypes[j].effectID)) constantEffect = j; - if (!wcsicmp(L"13541C22-8E33-11D0-9AD0-00A0C9A06E35", dev->ffEffectTypes[j].effectID)) squareEffect = j; - } needSet = 0; if (cmd == ID_BIG_MOTOR) { b->axes[bigIndex].force = BASE_SENSITIVITY; b->axes[littleIndex].force = 1; - b->effectIndex = constantEffect; } else { b->axes[bigIndex].force = 1; b->axes[littleIndex].force = BASE_SENSITIVITY; - b->effectIndex = squareEffect; } } if (needSet) { @@ -1695,7 +1704,7 @@ INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, L selected = 0; ListView_SetExtendedListViewStyleEx(hWndList, LVS_EX_FULLROWSELECT|LVS_EX_DOUBLEBUFFER, LVS_EX_FULLROWSELECT|LVS_EX_DOUBLEBUFFER); SendMessage(hWndList, LVM_SETEXTENDEDLISTVIEWSTYLE, 0, LVS_EX_FULLROWSELECT); - SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Disabled"); + SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Unplugged"); SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Dualshock 2"); SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Guitar"); } diff --git a/plugins/LilyPad/DeviceEnumerator.cpp b/plugins/LilyPad/DeviceEnumerator.cpp index 9c012e64c0..45b1aca7b0 100644 --- a/plugins/LilyPad/DeviceEnumerator.cpp +++ b/plugins/LilyPad/DeviceEnumerator.cpp @@ -7,7 +7,7 @@ #include "RawInput.h" #include "XInput.h" -void EnumDevices() { +void EnumDevices(int hideDXXinput) { // Needed for enumeration of some device types. dm->ReleaseInput(); InputDeviceManager *oldDm = dm; @@ -17,7 +17,7 @@ void EnumDevices() { EnumWindowsMessagingDevices(); EnumRawInputDevices(); EnumXInputDevices(); - EnumDirectInputDevices(); + EnumDirectInputDevices(hideDXXinput); dm->CopyBindings(oldDm->numDevices, oldDm->devices); diff --git a/plugins/LilyPad/DeviceEnumerator.h b/plugins/LilyPad/DeviceEnumerator.h index 5c8e0cf07f..05f99e5146 100644 --- a/plugins/LilyPad/DeviceEnumerator.h +++ b/plugins/LilyPad/DeviceEnumerator.h @@ -9,5 +9,5 @@ struct InitInfo { HWND hWndButton; }; -void EnumDevices(); +void EnumDevices(int hideDXXinput); diff --git a/plugins/LilyPad/DirectInput.cpp b/plugins/LilyPad/DirectInput.cpp index 4c7951a1f3..0afe068975 100644 --- a/plugins/LilyPad/DirectInput.cpp +++ b/plugins/LilyPad/DirectInput.cpp @@ -9,6 +9,16 @@ #include "PS2Etypes.h" #include +// All for getting GUIDs of XInput devices.... +#include +#include +// MS's code imports wmsstd.h, thus requiring the entire windows +// media SDK also be installed for a simple macro. This is +// simpler and less silly. +#ifndef SAFE_RELEASE +#define SAFE_RELEASE(p) { if(p) { (p)->Release(); (p)=NULL; } } +#endif + // Aka htons, without the winsock dependency. inline static u16 flipShort(u16 s) { return (s>>8) | (s<<8); @@ -440,10 +450,126 @@ BOOL CALLBACK EnumDeviceObjectsCallback (LPCDIDEVICEOBJECTINSTANCE lpddoi, LPVOI return DIENUM_CONTINUE; } +// Evil code from MS's site. If only they'd just made a way to get +// an XInput device's GUID directly in the first place... +BOOL IsXInputDevice( const GUID* pGuidProductFromDirectInput ) +{ + IWbemLocator* pIWbemLocator = NULL; + IEnumWbemClassObject* pEnumDevices = NULL; + IWbemClassObject* pDevices[20] = {0}; + IWbemServices* pIWbemServices = NULL; + BSTR bstrNamespace = NULL; + BSTR bstrDeviceID = NULL; + BSTR bstrClassName = NULL; + DWORD uReturned = 0; + bool bIsXinputDevice= false; + UINT iDevice = 0; + VARIANT var; + HRESULT hr; + + // CoInit if needed + hr = CoInitialize(NULL); + bool bCleanupCOM = SUCCEEDED(hr); + + // Create WMI + hr = CoCreateInstance( __uuidof(WbemLocator), + NULL, + CLSCTX_INPROC_SERVER, + __uuidof(IWbemLocator), + (LPVOID*) &pIWbemLocator); + if( FAILED(hr) || pIWbemLocator == NULL ) + goto LCleanup; + + bstrNamespace = SysAllocString( L"\\\\.\\root\\cimv2" );if( bstrNamespace == NULL ) goto LCleanup; + bstrClassName = SysAllocString( L"Win32_PNPEntity" ); if( bstrClassName == NULL ) goto LCleanup; + bstrDeviceID = SysAllocString( L"DeviceID" ); if( bstrDeviceID == NULL ) goto LCleanup; + + // Connect to WMI + hr = pIWbemLocator->ConnectServer( bstrNamespace, NULL, NULL, 0L, + 0L, NULL, NULL, &pIWbemServices ); + if( FAILED(hr) || pIWbemServices == NULL ) + goto LCleanup; + + // Switch security level to IMPERSONATE. + CoSetProxyBlanket( pIWbemServices, RPC_C_AUTHN_WINNT, RPC_C_AUTHZ_NONE, NULL, + RPC_C_AUTHN_LEVEL_CALL, RPC_C_IMP_LEVEL_IMPERSONATE, NULL, EOAC_NONE ); + + hr = pIWbemServices->CreateInstanceEnum( bstrClassName, 0, NULL, &pEnumDevices ); + if( FAILED(hr) || pEnumDevices == NULL ) + goto LCleanup; + + // Loop over all devices + for( ;; ) + { + // Get 20 at a time + hr = pEnumDevices->Next( 10000, 20, pDevices, &uReturned ); + if( FAILED(hr) ) + goto LCleanup; + if( uReturned == 0 ) + break; + + for( iDevice=0; iDeviceGet( bstrDeviceID, 0L, &var, NULL, NULL ); + if( SUCCEEDED( hr ) && var.vt == VT_BSTR && var.bstrVal != NULL ) + { + // Check if the device ID contains "IG_". If it does, then it's an XInput device + // This information can not be found from DirectInput + if( wcsstr( var.bstrVal, L"IG_" ) ) + { + // If it does, then get the VID/PID from var.bstrVal + DWORD dwPid = 0, dwVid = 0; + WCHAR* strVid = wcsstr( var.bstrVal, L"VID_" ); + if( strVid && swscanf( strVid, L"VID_%4X", &dwVid ) != 1 ) + dwVid = 0; + WCHAR* strPid = wcsstr( var.bstrVal, L"PID_" ); + if( strPid && swscanf( strPid, L"PID_%4X", &dwPid ) != 1 ) + dwPid = 0; + + // Compare the VID/PID to the DInput device + DWORD dwVidPid = MAKELONG( dwVid, dwPid ); + if( dwVidPid == pGuidProductFromDirectInput->Data1 ) + { + bIsXinputDevice = true; + goto LCleanup; + } + } + } + SAFE_RELEASE( pDevices[iDevice] ); + } + } + +LCleanup: + if(bstrNamespace) + SysFreeString(bstrNamespace); + if(bstrDeviceID) + SysFreeString(bstrDeviceID); + if(bstrClassName) + SysFreeString(bstrClassName); + for( iDevice=0; iDevice<20; iDevice++ ) + SAFE_RELEASE( pDevices[iDevice] ); + SAFE_RELEASE( pEnumDevices ); + SAFE_RELEASE( pIWbemLocator ); + SAFE_RELEASE( pIWbemServices ); + + if( bCleanupCOM ) + CoUninitialize(); + + return bIsXinputDevice; +} + + +struct DeviceEnumInfo { + IDirectInput8 *di8; + int ignoreXInput; +}; + BOOL CALLBACK EnumCallback (LPCDIDEVICEINSTANCE lpddi, LPVOID pvRef) { - IDirectInput8* di8 = (IDirectInput8*)pvRef; + IDirectInput8* di8 = ((DeviceEnumInfo*)pvRef)->di8; const wchar_t *name; wchar_t temp[40]; + //if (((DeviceEnumInfo*)pvRef)->ignoreXInput && lpddi-> if (lpddi->tszInstanceName[0]) { name = lpddi->tszInstanceName; } @@ -476,11 +602,13 @@ BOOL CALLBACK EnumCallback (LPCDIDEVICEINSTANCE lpddi, LPVOID pvRef) { return DIENUM_CONTINUE; } -void EnumDirectInputDevices() { - IDirectInput8* di8 = GetDirectInput(); - if (!di8) return; +void EnumDirectInputDevices(int ignoreXInput) { + DeviceEnumInfo enumInfo; + enumInfo.di8 = GetDirectInput(); + if (!enumInfo.di8) return; + enumInfo.ignoreXInput = ignoreXInput; di8d.deviceCount = 0; - di8->EnumDevices(DI8DEVCLASS_ALL, EnumCallback, di8, DIEDFL_ATTACHEDONLY); + enumInfo.di8->EnumDevices(DI8DEVCLASS_ALL, EnumCallback, &enumInfo, DIEDFL_ATTACHEDONLY); ReleaseDirectInput(); } diff --git a/plugins/LilyPad/DirectInput.h b/plugins/LilyPad/DirectInput.h index 5e7ee5dcf8..9d263f7e5a 100644 --- a/plugins/LilyPad/DirectInput.h +++ b/plugins/LilyPad/DirectInput.h @@ -1,3 +1,3 @@ #include "InputManager.h" -void EnumDirectInputDevices(); +void EnumDirectInputDevices(int ignoreXInput); diff --git a/plugins/LilyPad/InputManager.cpp b/plugins/LilyPad/InputManager.cpp index 829ed06f38..1686838e0a 100644 --- a/plugins/LilyPad/InputManager.cpp +++ b/plugins/LilyPad/InputManager.cpp @@ -112,15 +112,27 @@ void Device::AddFFAxis(const wchar_t *displayName, int id) { ffAxes[numFFAxes].id = id; ffAxes[numFFAxes].displayName = wcsdup(displayName); numFFAxes++; + int bindingsExist = 0; for (int port=0; port<2; port++) { for (int slot=0; slot<4; slot++) { for (int i=0; iaxes = (AxisEffectInfo*) realloc(b->axes, sizeof(AxisEffectInfo) * (numFFAxes)); memset(b->axes + (numFFAxes-1), 0, sizeof(AxisEffectInfo)); + bindingsExist = 1; } } } + // Generally the case when not loading a binding file. + if (!bindingsExist) { + int i = numFFAxes-1; + ForceFeedbackAxis temp = ffAxes[i]; + while (i && temp.id < ffAxes[i-1].id) { + ffAxes[i] = ffAxes[i-1]; + i--; + } + ffAxes[i] = temp; + } } void Device::AllocState() { diff --git a/plugins/LilyPad/LilyPad.cpp b/plugins/LilyPad/LilyPad.cpp index c878eed07d..f9a4313b3d 100644 --- a/plugins/LilyPad/LilyPad.cpp +++ b/plugins/LilyPad/LilyPad.cpp @@ -969,20 +969,20 @@ u8 CALLBACK PADpoll(u8 value) { u8 b1 = 0xFF, b2 = 0xFF; for (i = 0; i<4; i++) { - b1 -= (sum->buttons[i]>=128) << i; + b1 -= (sum->buttons[i]>=0xF0) << i; } for (i = 0; i<8; i++) { - b2 -= (sum->buttons[i+4]>=128) << i; + b2 -= (sum->buttons[i+4]>=0xF0) << i; } if (config.padConfigs[query.port][query.slot].type == GuitarPad && !config.GH2) { sum->sticks[0].horiz = -255; // Not sure about this. Forces wammy to be from 0 to 0x7F. // if (sum->sticks[2].vert > 0) sum->sticks[2].vert = 0; } - b1 -= ((sum->sticks[0].vert<=-128) << 4); - b1 -= ((sum->sticks[0].horiz>=128) << 5); - b1 -= ((sum->sticks[0].vert>=128) << 6); - b1 -= ((sum->sticks[0].horiz<=-128) << 7); + b1 -= ((sum->sticks[0].vert<=-0xF0) << 4); + b1 -= ((sum->sticks[0].horiz>=0xF0) << 5); + b1 -= ((sum->sticks[0].vert>=0xF0) << 6); + b1 -= ((sum->sticks[0].horiz<=-0xF0) << 7); query.response[3] = b1; query.response[4] = b2; diff --git a/plugins/LilyPad/LilyPad.rc b/plugins/LilyPad/LilyPad.rc index 5a6b1ad24c..48d82fdc84 100644 --- a/plugins/LilyPad/LilyPad.rc +++ b/plugins/LilyPad/LilyPad.rc @@ -227,7 +227,7 @@ BEGIN CONTROL "Port 1 Multitap",IDC_MULTITAP1,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,152,63,10 CONTROL "Port 2 Multitap",IDC_MULTITAP2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,164,63,10 CONTROL "",IDC_PAD_LIST,"SysListView32",LVS_REPORT | LVS_SINGLESEL | LVS_SHOWSELALWAYS | LVS_ALIGNLEFT | WS_TABSTOP,81,151,183,50,WS_EX_CLIENTEDGE - COMBOBOX IDC_PAD_TYPE,270,152,140,41,CBS_DROPDOWNLIST | CBS_SORT | WS_VSCROLL | WS_TABSTOP + COMBOBOX IDC_PAD_TYPE,270,152,140,41,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP CONTROL "Use analog mode whenever possible",IDC_ANALOG_START1, "Button",BS_AUTOCHECKBOX | WS_TABSTOP,270,169,132,10 GROUPBOX "Device Diagnostics",IDC_STATIC,7,211,201,99 From b4dae04147de4e244f28d3f6e82d69a1fc9c0eb4 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Thu, 6 Aug 2009 12:00:06 +0000 Subject: [PATCH 04/50] Worked for a bit on parseCommandLine in Elfheader.cpp. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1608 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Elfheader.cpp | 86 +++++++++++++++++++++++++++++++-------------- pcsx2/Memory.cpp | 2 +- 2 files changed, 60 insertions(+), 28 deletions(-) diff --git a/pcsx2/Elfheader.cpp b/pcsx2/Elfheader.cpp index e2c5e28226..4c73755414 100644 --- a/pcsx2/Elfheader.cpp +++ b/pcsx2/Elfheader.cpp @@ -131,6 +131,11 @@ struct Elf32_Rel { char args[256]="ez.m2v"; //to be accessed by other files uptr args_ptr; //a big value; in fact, it is an address +static bool isEmpty(int addr) +{ + return ((PS2MEM_BASE[addr] == 0) || (PS2MEM_BASE[addr] == 32)); +} + //in a0 is passed the address of the command line args, //i.e. a pointer to an area like this: //+00 unknown/unused @@ -142,19 +147,27 @@ uptr args_ptr; //a big value; in fact, it is an address //+08+4*argc the program name(first param) <-- //+08+4*argc+strlen(argv[0]+1) the rest of params; i.e. a copy of 'args' // see above 'char args[256];' + +// The results of this function will normally be that it finds an arg at 13 chars, and another at 0. +// It'd probably be easier to 0 out all 256 chars, split args, copy all the arguments in, and note +// the locations of each split... --arcum42 static uint parseCommandLine( const char *filename ) { - if ( ( args_ptr != 0xFFFFFFFF ) && ( args_ptr > 264 ) ) - { // 4 + 4 + 256 - const char * p; - int argc; - int i; + if ( ( args_ptr != 0xFFFFFFFF ) && ( args_ptr > (4 + 4 + 256) ) ) + { + const char *p; + int argc, i, ret = 0; args_ptr -= 256; args[ 255 ] = 0; - memcpy( &PS2MEM_BASE[ args_ptr ], args, 256 ); //params 1, 2, etc copied + + // Copy the parameters into the section of memory at args_ptr, + // then zero out anything past the end of args till 256 chars is reached. + memcpy( &PS2MEM_BASE[ args_ptr ], args, 256 ); memset( &PS2MEM_BASE[ args_ptr + strlen( args ) ], 0, 256 - strlen( args ) ); + + // Set p to just the filename, no path. #ifdef _WIN32 p = strrchr( filename, '\\' ); #else //linux @@ -166,45 +179,61 @@ static uint parseCommandLine( const char *filename ) else p = filename; + //DevCon::WriteLn("parseCommandLine: args = '%s'; p = '%s'", params args, p); + args_ptr -= strlen( p ) + 1; - strcpy( (char*)&PS2MEM_BASE[ args_ptr ], p ); //fill param 0; i.e. name of the program - - for ( i = strlen( p ) + 1 + 256, argc = 0; i > 0; i-- ) + //fill param 0; i.e. name of the program + strcpy( (char*)&PS2MEM_BASE[ args_ptr ], p ); + + // We only filled 256 chars above. Lets not loop for more then that. + for ( i = /*strlen(p) + 1 + */256, argc = 0; i > 0; i-- ) { - while (i && ((PS2MEM_BASE[ args_ptr + i ] == 0) || (PS2MEM_BASE[ args_ptr + i ] == 32))) - { i--; } + // Decrease i until arg_ptr + i points at a spot that is not a space or 0 (or i is 0). + while (i && isEmpty(args_ptr + i )) { i--; } + // If the last char is a space, set it to 0. if ( PS2MEM_BASE[ args_ptr + i + 1 ] == ' ') PS2MEM_BASE[ args_ptr + i + 1 ] = 0; - while (i && (PS2MEM_BASE[ args_ptr + i ] != 0) && (PS2MEM_BASE[ args_ptr + i] != 32)) - { i--; } + // Decrease i until we run into another space or 0 (or i is 0). + // (in other words, so far, we went backwards by a word.) + while (i && !isEmpty(args_ptr + i )) { i--; } - if ((PS2MEM_BASE[ args_ptr + i ] != 0) && (PS2MEM_BASE[ args_ptr + i ] != 32)) - { //i==0 + // if the spot we are on is not a space or null (ie, i<=0, given the last while statement): + if (!isEmpty(args_ptr + i )) + { + // Presumably increases the number of arguments, and lets the ps2 know about this argument. argc++; + ret = args_ptr - 4 - 4 - argc * 4; - if ( args_ptr - 4 - 4 - argc * 4 < 0 ) // fixme - Should this be cast to a signed int? - return 0; - + //DevCon::WriteLn("parseCommandLine: i = %d", params i); + if (ret < 0 ) return 0; ((u32*)PS2MEM_BASE)[ args_ptr / 4 - argc ] = args_ptr + i; + //DevCon::WriteLn("PS2MEM_BASE[%d / 4 - %d (%d)] = %d", params args_ptr, argc, (args_ptr / 4 - argc), (args_ptr + i)); } else { - if ( ( PS2MEM_BASE[ args_ptr + i + 1 ] != 0 ) && ( PS2MEM_BASE[ args_ptr + i + 1 ] != 32 ) ) + // If we ran into a word. + if (!isEmpty(args_ptr + i + 1)) { + // Presumably increases the number of arguments, and lets the ps2 know about this argument. argc++; - if ( args_ptr - 4 - 4 - argc * 4 < 0 ) // fixme - Should this be cast to a signed int? - return 0; - + ret = args_ptr - 4 - 4 - argc * 4; + + //DevCon::WriteLn("parseCommandLine: i = %d", params i); + if (ret < 0 ) return 0; ((u32*)PS2MEM_BASE)[ args_ptr / 4 - argc ] = args_ptr + i + 1; + //DevCon::WriteLn("PS2MEM_BASE[%d / 4 - %d (%d)] = %d", params args_ptr, argc, (args_ptr / 4 - argc), (args_ptr + i)); } } } + + // Pass the number of arguments, and if we have arguments. ((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 1 ] = argc; //how many args ((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 2 ] = ( argc > 0); //have args? //not used, cannot be filled at all + //DevCon::WriteLn("parseCommandLine: argc = %d", params argc); - return ( args_ptr - argc * 4 - 8 ); + return ret; } return 0; @@ -487,8 +516,11 @@ u32 loadElfCRC( const char* filename ) TocEntry toc; IsoFS_init( ); - if ( IsoFS_findFile( filename + strlen( "cdromN:" ), &toc ) == -1 ) - return 0; + + Console::Status("loadElfCRC: %s", params filename); + + int mylen = strlen( "cdromN:" ); + if ( IsoFS_findFile( filename + mylen, &toc ) == -1 ) return 0; DevCon::Status( "loadElfFile: %d bytes", params toc.fileSize ); u32 crcval = ElfObject( filename, toc.fileSize ).GetCRC(); @@ -519,7 +551,7 @@ int loadElfFile(const char *filename) if (strnicmp( filename, "cdrom0:", strlen( "cdromN:" ) ) && strnicmp( filename, "cdrom1:", strlen( "cdromN:" ) ) ) { - // Loading from a file (or non-cd image) + DevCon::WriteLn("Loading from a file (or non-cd image)"); struct stat sbuf; if ( stat( filename, &sbuf ) != 0 ) return -1; @@ -527,7 +559,7 @@ int loadElfFile(const char *filename) } else { - // Loading from a CD rom or CD image. + DevCon::WriteLn("Loading from a CD rom or CD image"); TocEntry toc; IsoFS_init( ); if ( IsoFS_findFile( filename + strlen( "cdromN:" ), &toc ) == -1 ) diff --git a/pcsx2/Memory.cpp b/pcsx2/Memory.cpp index 22898c391f..21371393c6 100644 --- a/pcsx2/Memory.cpp +++ b/pcsx2/Memory.cpp @@ -22,7 +22,7 @@ RAM --- 0x00100000-0x01ffffff this is the physical address for the ram.its cached there 0x20100000-0x21ffffff uncached -0x30100000-0x31ffffff uncached & acceleretade +0x30100000-0x31ffffff uncached & accelerated 0xa0000000-0xa1ffffff MIRROR might...??? 0x80000000-0x81ffffff MIRROR might... ???? From 0a28a945cf368af610ada56e51cef5c331fc114b Mon Sep 17 00:00:00 2001 From: arcum42 Date: Fri, 7 Aug 2009 01:12:16 +0000 Subject: [PATCH 05/50] After thinking about it, I'm reverting one of the changes I made in r1608 for the moment, though I may rewrite the whole function in the future... git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1609 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Elfheader.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/pcsx2/Elfheader.cpp b/pcsx2/Elfheader.cpp index 4c73755414..d49688a4d4 100644 --- a/pcsx2/Elfheader.cpp +++ b/pcsx2/Elfheader.cpp @@ -186,8 +186,9 @@ static uint parseCommandLine( const char *filename ) //fill param 0; i.e. name of the program strcpy( (char*)&PS2MEM_BASE[ args_ptr ], p ); - // We only filled 256 chars above. Lets not loop for more then that. - for ( i = /*strlen(p) + 1 + */256, argc = 0; i > 0; i-- ) + // Looking closer, it does decrement args_ptr by strlen(p) + 1, so, while I'm not sure the filename should really be scanned over, + // I'll put it back to strlen(p) + 1 + 256 for the moment. + for ( i = strlen(p) + 1 + 256, argc = 0; i > 0; i-- ) { // Decrease i until arg_ptr + i points at a spot that is not a space or 0 (or i is 0). while (i && isEmpty(args_ptr + i )) { i--; } From 703fd0a59729bc71c947f764d11d9d8a5695f503 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Fri, 7 Aug 2009 01:55:59 +0000 Subject: [PATCH 06/50] Here's a better bug fix for the issue that was bugging me in r1608. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1610 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Elfheader.cpp | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/pcsx2/Elfheader.cpp b/pcsx2/Elfheader.cpp index d49688a4d4..458eee4d59 100644 --- a/pcsx2/Elfheader.cpp +++ b/pcsx2/Elfheader.cpp @@ -151,12 +151,14 @@ static bool isEmpty(int addr) // The results of this function will normally be that it finds an arg at 13 chars, and another at 0. // It'd probably be easier to 0 out all 256 chars, split args, copy all the arguments in, and note // the locations of each split... --arcum42 + static uint parseCommandLine( const char *filename ) { if ( ( args_ptr != 0xFFFFFFFF ) && ( args_ptr > (4 + 4 + 256) ) ) { const char *p; int argc, i, ret = 0; + u32 args_end; args_ptr -= 256; @@ -166,6 +168,7 @@ static uint parseCommandLine( const char *filename ) // then zero out anything past the end of args till 256 chars is reached. memcpy( &PS2MEM_BASE[ args_ptr ], args, 256 ); memset( &PS2MEM_BASE[ args_ptr + strlen( args ) ], 0, 256 - strlen( args ) ); + args_end = args_ptr + strlen( args ); // Set p to just the filename, no path. #ifdef _WIN32 @@ -186,9 +189,8 @@ static uint parseCommandLine( const char *filename ) //fill param 0; i.e. name of the program strcpy( (char*)&PS2MEM_BASE[ args_ptr ], p ); - // Looking closer, it does decrement args_ptr by strlen(p) + 1, so, while I'm not sure the filename should really be scanned over, - // I'll put it back to strlen(p) + 1 + 256 for the moment. - for ( i = strlen(p) + 1 + 256, argc = 0; i > 0; i-- ) + // Start from the end of where we wrote to, not including all the zero'd out area. + for ( i = args_end - args_ptr + 1, argc = 0; i > 0; i-- ) { // Decrease i until arg_ptr + i points at a spot that is not a space or 0 (or i is 0). while (i && isEmpty(args_ptr + i )) { i--; } @@ -233,7 +235,7 @@ static uint parseCommandLine( const char *filename ) ((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 1 ] = argc; //how many args ((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 2 ] = ( argc > 0); //have args? //not used, cannot be filled at all //DevCon::WriteLn("parseCommandLine: argc = %d", params argc); - + return ret; } From 3bd803757382fd2c801e1645ea042f958b8e280f Mon Sep 17 00:00:00 2001 From: gabest11 Date: Fri, 7 Aug 2009 21:11:27 +0000 Subject: [PATCH 07/50] GSdx: fix for transparent walls in kingdom hearts (or anything else that sets AA1 with ABE off) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1611 96395faa-99c1-11dd-bbfe-3dabce05a288 --- plugins/GSdx/GSRendererDX.h | 24 ++++++++++--------- plugins/GSdx/GSRendererSW.cpp | 4 ++-- plugins/GSdx/GSUtil.cpp | 45 ++++++++++++++++++++++++++++++++++- 3 files changed, 59 insertions(+), 14 deletions(-) diff --git a/plugins/GSdx/GSRendererDX.h b/plugins/GSdx/GSRendererDX.h index 2d0bd04b23..0b8f9dc69f 100644 --- a/plugins/GSdx/GSRendererDX.h +++ b/plugins/GSdx/GSRendererDX.h @@ -90,22 +90,24 @@ public: else { om_dssel.ztst = ZTST_ALWAYS; - om_dssel.zwe = 0; } -/* - om_dssel.zte = context->TEST.ZTE; - om_dssel.ztst = context->TEST.ZTST; - om_dssel.zwe = !context->ZBUF.ZMSK; -*/ - om_dssel.date = context->FRAME.PSM != PSM_PSMCT24 ? context->TEST.DATE : 0; - om_dssel.fba = m_fba ? context->FBA.FBA : 0; + + if(context->FRAME.PSM != PSM_PSMCT24) + { + om_dssel.date = context->TEST.DATE; + } + + if(m_fba) + { + om_dssel.fba = context->FBA.FBA; + } GSTextureFX::OMBlendSelector om_bsel; - om_bsel.abe = !IsOpaque(); - - if(om_bsel.abe) + if(!IsOpaque()) { + om_bsel.abe = PRIM->ABE || PRIM->AA1 && m_vt.m_primclass == GS_LINE_CLASS; + om_bsel.a = context->ALPHA.A; om_bsel.b = context->ALPHA.B; om_bsel.c = context->ALPHA.C; diff --git a/plugins/GSdx/GSRendererSW.cpp b/plugins/GSdx/GSRendererSW.cpp index fc6a4f7c0c..9c1d6ceb27 100644 --- a/plugins/GSdx/GSRendererSW.cpp +++ b/plugins/GSdx/GSRendererSW.cpp @@ -392,9 +392,9 @@ void GSRendererSW::GetScanlineParam(GSScanlineParam& p, GS_PRIM_CLASS primclass) p.sel.pabe = 1; } - if(PRIM->AA1 && (primclass == GS_LINE_CLASS || primclass == GS_TRIANGLE_CLASS)) + if(m_aa1 && PRIM->AA1 && (primclass == GS_LINE_CLASS || primclass == GS_TRIANGLE_CLASS)) { - p.sel.aa1 = m_aa1 ? 1 : 0; + p.sel.aa1 = 1; } } diff --git a/plugins/GSdx/GSUtil.cpp b/plugins/GSdx/GSUtil.cpp index b5b91643a5..1abf9e25db 100644 --- a/plugins/GSdx/GSUtil.cpp +++ b/plugins/GSdx/GSUtil.cpp @@ -100,12 +100,55 @@ bool GSUtil::HasCompatibleBits(uint32 spsm, uint32 dpsm) bool GSUtil::CheckDirectX() { - if(HINSTANCE hDll = LoadLibrary(format("d3dx9_%d.dll", D3DX_SDK_VERSION).c_str())) + OSVERSIONINFOEX version; + memset(&version, 0, sizeof(version)); + version.dwOSVersionInfoSize = sizeof(version); + + if(GetVersionEx((OSVERSIONINFO*)&version)) + { + printf("Windows %d.%d.%d", + version.dwMajorVersion, + version.dwMinorVersion, + version.dwBuildNumber); + + if(version.wServicePackMajor > 0) + { + printf(" (%s %d.%d)", + version.szCSDVersion, + version.wServicePackMajor, + version.wServicePackMinor); + } + + printf("\n"); + } + + if(IDirect3D9* d3d = Direct3DCreate9(D3D_SDK_VERSION)) + { + D3DADAPTER_IDENTIFIER9 id; + + if(S_OK == d3d->GetAdapterIdentifier(D3DADAPTER_DEFAULT, 0, &id)) + { + printf("%s (%d.%d.%d.%d)\n", + id.Description, + id.DriverVersion.HighPart >> 16, + id.DriverVersion.HighPart & 0xffff, + id.DriverVersion.LowPart >> 16, + id.DriverVersion.LowPart & 0xffff); + } + + d3d->Release(); + } + + string d3dx9_dll = format("d3dx9_%d.dll", D3DX_SDK_VERSION); + + if(HINSTANCE hDll = LoadLibrary(d3dx9_dll.c_str())) { FreeLibrary(hDll); } else { + printf("Cannot find %s\n", d3dx9_dll.c_str()); + if(MessageBox(NULL, "You need to update directx, would you like to do it now?", "GSdx", MB_YESNO) == IDYES) { const char* url = "http://www.microsoft.com/downloads/details.aspx?FamilyId=2DA43D38-DB71-4C1B-BC6A-9B6652CD92A3"; From 5bdc1947f44791b262ede56d3c5dbe18239bc601 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sun, 9 Aug 2009 03:42:02 +0000 Subject: [PATCH 08/50] A few minor modifications to CDVD and IPU. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1612 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/CDVD/CDVD.cpp | 12 ++++---- pcsx2/IPU/IPU.cpp | 71 ++++++++++++++++++++++----------------------- pcsx2/IPU/IPU.h | 1 + 3 files changed, 42 insertions(+), 42 deletions(-) diff --git a/pcsx2/CDVD/CDVD.cpp b/pcsx2/CDVD/CDVD.cpp index 3273973c4b..a6d38995c2 100644 --- a/pcsx2/CDVD/CDVD.cpp +++ b/pcsx2/CDVD/CDVD.cpp @@ -1094,8 +1094,8 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND break; case N_CD_READ: // CdRead - cdvd.SeekToSector = *(uint*)(cdvd.Param+0); - cdvd.nSectors = *(int*)(cdvd.Param+4); + cdvd.SeekToSector = (cdvd.Param[0] << 0) | (cdvd.Param[1] << 8) | (cdvd.Param[2]<< 16) | (cdvd.Param[3] << 24); + cdvd.nSectors = (cdvd.Param[4] << 0) | (cdvd.Param[5] << 8) | (cdvd.Param[6]<< 16) | (cdvd.Param[7] << 24); cdvd.RetryCnt = (cdvd.Param[8] == 0) ? 0x100 : cdvd.Param[8]; cdvd.SpindlCtrl = cdvd.Param[9]; cdvd.Speed = 24; @@ -1129,8 +1129,8 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND case N_CD_READ_CDDA: // CdReadCDDA case N_CD_READ_XCDDA: // CdReadXCDDA - cdvd.SeekToSector = *(int*)(cdvd.Param+0); - cdvd.nSectors = *(int*)(cdvd.Param+4); + cdvd.SeekToSector = (cdvd.Param[0] << 0) | (cdvd.Param[1] << 8) | (cdvd.Param[2]<< 16) | (cdvd.Param[3] << 24); + cdvd.nSectors = (cdvd.Param[4] << 0) | (cdvd.Param[5] << 8) | (cdvd.Param[6]<< 16) | (cdvd.Param[7] << 24); if (cdvd.Param[8] == 0) cdvd.RetryCnt = 0x100; @@ -1175,8 +1175,8 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND break; case N_DVD_READ: // DvdRead - cdvd.SeekToSector = *(int*)(cdvd.Param+0); - cdvd.nSectors = *(int*)(cdvd.Param+4); + cdvd.SeekToSector = (cdvd.Param[0] << 0) | (cdvd.Param[1] << 8) | (cdvd.Param[2]<< 16) | (cdvd.Param[3] << 24); + cdvd.nSectors = (cdvd.Param[4] << 0) | (cdvd.Param[5] << 8) | (cdvd.Param[6]<< 16) | (cdvd.Param[7] << 24); if (cdvd.Param[8] == 0) cdvd.RetryCnt = 0x100; diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index 4b4cd3845c..4adf2495f2 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -117,7 +117,7 @@ extern "C" PCSX2_ALIGNED16(u8 _readbits[80]); //local buffer (ring buffer) u8* readbits = _readbits; // always can decrement by one 1qw -#define SATURATE_4BITS(val) ((val)>15 ? 15 : (val)) +//#define SATURATE_4BITS(val) ((val)>15 ? 15 : (val)) __forceinline void IPUProcessInterrupt() { @@ -317,21 +317,20 @@ __forceinline u64 ipuRead64(u32 mem) void ipuSoftReset() { mpeg2_init(); - FIFOto_clear(); - memzero_obj(fifo_output); - FOwritepos = 0; - FOreadpos = 0; + FIFOfrom_clear(); + coded_block_pattern = 0; - + ipuRegs->ctrl._u32 = 0; + ipuRegs->top = 0; + ipuCurCmd = 0xffffffff; + g_BP.BP = 0; - g_BP.IFC = 0; g_BP.FP = 0; g_BP.bufferhasnew = 0; - ipuRegs->top = 0; + g_nCmdIndex = 0; - ipuCurCmd = 0xffffffff; g_nCmdPos[0] = 0; g_nCmdPos[1] = 0; } @@ -404,10 +403,10 @@ __forceinline void ipuWrite64(u32 mem, u64 value) static void ipuBCLR(u32 val) { FIFOto_clear(); + g_BP.BP = val & 0x7F; g_BP.FP = 0; g_BP.bufferhasnew = 0; - g_BP.IFC = 0; ipuRegs->ctrl.BUSY = 0; ipuRegs->cmd.BUSY = 0; memzero_ptr<80>(readbits); @@ -1333,14 +1332,12 @@ int FIFOto_read(void *value) } // transfer 1 qword, split into two transfers - ((u32*)value)[0] = fifo_input[FIreadpos]; - fifo_input[FIreadpos] = 0; - ((u32*)value)[1] = fifo_input[FIreadpos+1]; - fifo_input[FIreadpos+1] = 0; - ((u32*)value)[2] = fifo_input[FIreadpos+2]; - fifo_input[FIreadpos+2] = 0; - ((u32*)value)[3] = fifo_input[FIreadpos+3]; - fifo_input[FIreadpos+3] = 0; + for (int i = 0; i <= 3; i++) + { + ((u32*)value)[i] = fifo_input[FIreadpos + i]; + fifo_input[FIreadpos + i] = 0; + } + FIreadpos = (FIreadpos + 4) & 31; g_BP.IFC--; return 1; @@ -1356,10 +1353,10 @@ int FIFOto_write(u32* pMem, int size) while (transsize-- > 0) { - fifo_input[FIwritepos] = pMem[0]; - fifo_input[FIwritepos+1] = pMem[1]; - fifo_input[FIwritepos+2] = pMem[2]; - fifo_input[FIwritepos+3] = pMem[3]; + for (int i = 0; i <= 3; i++) + { + fifo_input[FIwritepos + i] = pMem[i]; + } FIwritepos = (FIwritepos + 4) & 31; pMem += 4; } @@ -1597,6 +1594,13 @@ int IPU1dma() return totalqwc; } +void FIFOfrom_clear() +{ + memzero_obj(fifo_output); + ipuRegs->ctrl.OFC = 0; + FOreadpos = 0; + FOwritepos = 0; +} int FIFOfrom_write(const u32 *value, int size) { @@ -1609,10 +1613,10 @@ int FIFOfrom_write(const u32 *value, int size) while (transsize-- > 0) { - fifo_output[FOwritepos] = ((u32*)value)[0]; - fifo_output[FOwritepos+1] = ((u32*)value)[1]; - fifo_output[FOwritepos+2] = ((u32*)value)[2]; - fifo_output[FOwritepos+3] = ((u32*)value)[3]; + for (int i = 0; i <= 3; i++) + { + fifo_output[FOwritepos + i] = ((u32*)value)[i]; + } FOwritepos = (FOwritepos + 4) & 31; value += 4; } @@ -1627,14 +1631,11 @@ int FIFOfrom_write(const u32 *value, int size) static __forceinline void _FIFOfrom_readsingle(void *value) { // transfer 1 qword, split into two transfers - ((u32*)value)[0] = fifo_output[FOreadpos]; - fifo_output[FOreadpos] = 0; - ((u32*)value)[1] = fifo_output[FOreadpos+1]; - fifo_output[FOreadpos+1] = 0; - ((u32*)value)[2] = fifo_output[FOreadpos+2]; - fifo_output[FOreadpos+2] = 0; - ((u32*)value)[3] = fifo_output[FOreadpos+3]; - fifo_output[FOreadpos+3] = 0; + for (int i = 0; i <= 3; i++) + { + ((u32*)value)[i] = fifo_output[FOreadpos + i]; + fifo_output[FOreadpos + i] = 0; + } FOreadpos = (FOreadpos + 4) & 31; } @@ -1658,8 +1659,6 @@ void FIFOfrom_read(void *value, int size) } } - - int IPU0dma() { int readsize; diff --git a/pcsx2/IPU/IPU.h b/pcsx2/IPU/IPU.h index c148bac652..ca6e6498a1 100644 --- a/pcsx2/IPU/IPU.h +++ b/pcsx2/IPU/IPU.h @@ -273,5 +273,6 @@ void FIFOfrom_read(void *value,int size); int FIFOto_read(void *value); int FIFOto_write(u32* pMem, int size); void FIFOto_clear(); +void FIFOfrom_clear(); #endif From c0a0cd6bedbc52bafcf5eed746cb03b5eac05445 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sun, 9 Aug 2009 10:43:29 +0000 Subject: [PATCH 09/50] Revert the changes to CDVD, and clean up the changes I made to ElfHeader.cpp, getting rid of some extraneous commented out test code, and refining the comments I left a bit. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1613 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/CDVD/CDVD.cpp | 15 +++++++++------ pcsx2/Elfheader.cpp | 19 +++++-------------- 2 files changed, 14 insertions(+), 20 deletions(-) diff --git a/pcsx2/CDVD/CDVD.cpp b/pcsx2/CDVD/CDVD.cpp index a6d38995c2..74b7011859 100644 --- a/pcsx2/CDVD/CDVD.cpp +++ b/pcsx2/CDVD/CDVD.cpp @@ -1094,8 +1094,9 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND break; case N_CD_READ: // CdRead - cdvd.SeekToSector = (cdvd.Param[0] << 0) | (cdvd.Param[1] << 8) | (cdvd.Param[2]<< 16) | (cdvd.Param[3] << 24); - cdvd.nSectors = (cdvd.Param[4] << 0) | (cdvd.Param[5] << 8) | (cdvd.Param[6]<< 16) | (cdvd.Param[7] << 24); + // Assign the seek to sector based on cdvd.Param[0]-[3], and the number of sectors based on cdvd.Param[4]-[7]. + cdvd.SeekToSector = *(u32*) (cdvd.Param+0); + cdvd.nSectors = *(u32*)(cdvd.Param+4); cdvd.RetryCnt = (cdvd.Param[8] == 0) ? 0x100 : cdvd.Param[8]; cdvd.SpindlCtrl = cdvd.Param[9]; cdvd.Speed = 24; @@ -1129,8 +1130,9 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND case N_CD_READ_CDDA: // CdReadCDDA case N_CD_READ_XCDDA: // CdReadXCDDA - cdvd.SeekToSector = (cdvd.Param[0] << 0) | (cdvd.Param[1] << 8) | (cdvd.Param[2]<< 16) | (cdvd.Param[3] << 24); - cdvd.nSectors = (cdvd.Param[4] << 0) | (cdvd.Param[5] << 8) | (cdvd.Param[6]<< 16) | (cdvd.Param[7] << 24); + // Assign the seek to sector based on cdvd.Param[0]-[3], and the number of sectors based on cdvd.Param[4]-[7]. + cdvd.SeekToSector = *(u32*) (cdvd.Param+0); + cdvd.nSectors = *(u32*)(cdvd.Param+4); if (cdvd.Param[8] == 0) cdvd.RetryCnt = 0x100; @@ -1175,8 +1177,9 @@ static void cdvdWrite04(u8 rt) { // NCOMMAND break; case N_DVD_READ: // DvdRead - cdvd.SeekToSector = (cdvd.Param[0] << 0) | (cdvd.Param[1] << 8) | (cdvd.Param[2]<< 16) | (cdvd.Param[3] << 24); - cdvd.nSectors = (cdvd.Param[4] << 0) | (cdvd.Param[5] << 8) | (cdvd.Param[6]<< 16) | (cdvd.Param[7] << 24); + // Assign the seek to sector based on cdvd.Param[0]-[3], and the number of sectors based on cdvd.Param[4]-[7]. + cdvd.SeekToSector = *(u32*) (cdvd.Param+0); + cdvd.nSectors = *(u32*)(cdvd.Param+4); if (cdvd.Param[8] == 0) cdvd.RetryCnt = 0x100; diff --git a/pcsx2/Elfheader.cpp b/pcsx2/Elfheader.cpp index 458eee4d59..5e3f0695d2 100644 --- a/pcsx2/Elfheader.cpp +++ b/pcsx2/Elfheader.cpp @@ -182,7 +182,6 @@ static uint parseCommandLine( const char *filename ) else p = filename; - //DevCon::WriteLn("parseCommandLine: args = '%s'; p = '%s'", params args, p); args_ptr -= strlen( p ) + 1; @@ -192,41 +191,34 @@ static uint parseCommandLine( const char *filename ) // Start from the end of where we wrote to, not including all the zero'd out area. for ( i = args_end - args_ptr + 1, argc = 0; i > 0; i-- ) { - // Decrease i until arg_ptr + i points at a spot that is not a space or 0 (or i is 0). while (i && isEmpty(args_ptr + i )) { i--; } // If the last char is a space, set it to 0. if ( PS2MEM_BASE[ args_ptr + i + 1 ] == ' ') PS2MEM_BASE[ args_ptr + i + 1 ] = 0; - // Decrease i until we run into another space or 0 (or i is 0). - // (in other words, so far, we went backwards by a word.) while (i && !isEmpty(args_ptr + i )) { i--; } - // if the spot we are on is not a space or null (ie, i<=0, given the last while statement): - if (!isEmpty(args_ptr + i )) + // Now that we've gone back a word, increase the number of arguments, + // and mark the location of the argument. + if (!isEmpty(args_ptr + i )) // i <= 0 { - // Presumably increases the number of arguments, and lets the ps2 know about this argument. + // If the spot we are on is not a space or null , use it. argc++; ret = args_ptr - 4 - 4 - argc * 4; - //DevCon::WriteLn("parseCommandLine: i = %d", params i); if (ret < 0 ) return 0; ((u32*)PS2MEM_BASE)[ args_ptr / 4 - argc ] = args_ptr + i; - //DevCon::WriteLn("PS2MEM_BASE[%d / 4 - %d (%d)] = %d", params args_ptr, argc, (args_ptr / 4 - argc), (args_ptr + i)); } else { - // If we ran into a word. if (!isEmpty(args_ptr + i + 1)) { - // Presumably increases the number of arguments, and lets the ps2 know about this argument. + // Otherwise, use the next character . argc++; ret = args_ptr - 4 - 4 - argc * 4; - //DevCon::WriteLn("parseCommandLine: i = %d", params i); if (ret < 0 ) return 0; ((u32*)PS2MEM_BASE)[ args_ptr / 4 - argc ] = args_ptr + i + 1; - //DevCon::WriteLn("PS2MEM_BASE[%d / 4 - %d (%d)] = %d", params args_ptr, argc, (args_ptr / 4 - argc), (args_ptr + i)); } } } @@ -234,7 +226,6 @@ static uint parseCommandLine( const char *filename ) // Pass the number of arguments, and if we have arguments. ((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 1 ] = argc; //how many args ((u32*)PS2MEM_BASE)[ args_ptr /4 - argc - 2 ] = ( argc > 0); //have args? //not used, cannot be filled at all - //DevCon::WriteLn("parseCommandLine: argc = %d", params argc); return ret; } From 62cc3cfbf358e7951e99523eb13644c3c9ad36ba Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Sun, 9 Aug 2009 18:38:10 +0000 Subject: [PATCH 10/50] Workaround a problem with thread affinities. Should fix some slowness issues, mainly on AMD cpus. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1614 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/ix86/ix86_cpudetect.cpp | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/pcsx2/x86/ix86/ix86_cpudetect.cpp b/pcsx2/x86/ix86/ix86_cpudetect.cpp index 409f3cf64d..70bad69230 100644 --- a/pcsx2/x86/ix86/ix86_cpudetect.cpp +++ b/pcsx2/x86/ix86/ix86_cpudetect.cpp @@ -216,6 +216,19 @@ static void SetSingleAffinity() #endif } +static void UnSetSingleAffinity() +{ +#ifdef _WINDOWS_ + HANDLE s_threadId = GetCurrentThread(); + s_oldmask = SetThreadAffinityMask( s_threadId, 0xFFFFFFFF ); + + if( s_oldmask == ERROR_INVALID_PARAMETER ) + { + Console::Notice("CpuDetect: UnSetThreadAffinityMask failed..."); + } +#endif +} + ////////////////////////////////////////////////////////////////////////////////////////// // s64 CPUSpeedHz( u64 time ) @@ -489,5 +502,9 @@ void cpudetectInit() // This will assign values into cpuinfo.LogicalCores and PhysicalCores Threading::CountLogicalCores( LogicalCoresPerPhysicalCPU, PhysicalCoresPerPhysicalCPU ); + + // Undo previous SetSingleAffinity() here, so the host OS can handle load distribution + // (up to 25% faster on athlonx2, about 5% faster on core2) + UnSetSingleAffinity(); } From 864e49e69f193d948a11c50c7df4386c0924a453 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Tue, 11 Aug 2009 23:36:22 +0000 Subject: [PATCH 11/50] microVU: extra + preserve sign clamp mode now semi-implemented (before it would just do the same as 'normal' in mVU) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1615 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Misc.inl | 9 ++++++--- pcsx2/x86/microVU_Upper.inl | 12 ++++++------ 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/pcsx2/x86/microVU_Misc.inl b/pcsx2/x86/microVU_Misc.inl index 81982e8054..c9768581a3 100644 --- a/pcsx2/x86/microVU_Misc.inl +++ b/pcsx2/x86/microVU_Misc.inl @@ -39,8 +39,10 @@ void mVUclamp1(int reg, int regT1, int xyzw) { } // Used for Operand Clamping -void mVUclamp2(int reg, int regT1, int xyzw) { - if (CHECK_VU_SIGN_OVERFLOW && (regT1 >= 0)) { +void mVUclamp2(microVU* mVU, int reg, int regT1, int xyzw) { + if (CHECK_VU_SIGN_OVERFLOW) { + int regT1b = 0; + if (regT1 < 0) { regT1 = mVU->regAlloc->allocReg(); regT1b = 1; } switch (xyzw) { case 1: case 2: case 4: case 8: SSE_MOVSS_XMM_to_XMM (regT1, reg); @@ -57,6 +59,7 @@ void mVUclamp2(int reg, int regT1, int xyzw) { SSE_ORPS_XMM_to_XMM (reg, regT1); break; } + if (regT1b) mVU->regAlloc->clearNeeded(regT1); } else mVUclamp1(reg, regT1, xyzw); } @@ -355,7 +358,7 @@ void MIN_MAX_PS(microVU* mVU, int to, int from, int t1, int t2, bool min) { if (t2b) mVU->regAlloc->clearNeeded(t2); } -// Warning: Modifies from's upper 3 vectors, and t1 +// Warning: Modifies to's upper 3 vectors, and t1 void MIN_MAX_SS(mV, int to, int from, int t1, bool min) { bool t1b = 0; if (t1 < 0) { t1 = mVU->regAlloc->allocReg(); t1b = 1; } diff --git a/pcsx2/x86/microVU_Upper.inl b/pcsx2/x86/microVU_Upper.inl index 6e2464f308..2b152f5493 100644 --- a/pcsx2/x86/microVU_Upper.inl +++ b/pcsx2/x86/microVU_Upper.inl @@ -152,9 +152,9 @@ void mVU_FMACa(microVU* mVU, int recPass, int opCase, int opType, bool isACC, co } else { Fs = mVU->regAlloc->allocReg(_Fs_, _Fd_, _X_Y_Z_W); } - opCase1 { if((opType == 2) && _XYZW_PS) { mVUclamp1(Ft, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0) - opCase1 { if((opType == 2) && _XYZW_PS) { mVUclamp1(Fs, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0) - opCase2 { if (opType == 2) { mVUclamp1(Fs, -1, _X_Y_Z_W); } } // Clamp Needed for alot of games (TOTA, DoM, etc...) + opCase1 { if((opType == 2) && _XYZW_PS) { mVUclamp2(mVU, Ft, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0) + opCase1 { if((opType == 2) && _XYZW_PS) { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } } // Clamp Needed for Ice Age 3 (VU0) + opCase2 { if (opType == 2) { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } } // Clamp Needed for alot of games (TOTA, DoM, etc...) if (_XYZW_SS) SSE_SS[opType](mVU, Fs, Ft, -1, -1); else SSE_PS[opType](mVU, Fs, Ft, -1, -1); @@ -185,7 +185,7 @@ void mVU_FMACb(microVU* mVU, int recPass, int opCase, int opType, const char* op ACC = mVU->regAlloc->allocReg(32, 32, 0xf, 0); if (_XYZW_SS2) { SSE2_PSHUFD_XMM_to_XMM(ACC, ACC, shuffleSS(_X_Y_Z_W)); } - opCase2 { mVUclamp1(Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...) + opCase2 { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...) if (_XYZW_SS) SSE_SS[2](mVU, Fs, Ft, -1, -1); else SSE_PS[2](mVU, Fs, Ft, -1, -1); @@ -223,7 +223,7 @@ void mVU_FMACc(microVU* mVU, int recPass, int opCase, const char* opName) { Fs = mVU->regAlloc->allocReg(_Fs_, _Fd_, _X_Y_Z_W); if (_XYZW_SS2) { SSE2_PSHUFD_XMM_to_XMM(ACC, ACC, shuffleSS(_X_Y_Z_W)); } - opCase2 { mVUclamp1(Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...) + opCase2 { mVUclamp2(mVU, Fs, -1, _X_Y_Z_W); } // Clamp Needed for alot of games (TOTA, DoM, etc...) if (_XYZW_SS) { SSE_SS[2](mVU, Fs, Ft, -1, -1); SSE_SS[0](mVU, Fs, ACC, tempFt, -1); } else { SSE_PS[2](mVU, Fs, Ft, -1, -1); SSE_PS[0](mVU, Fs, ACC, tempFt, -1); } @@ -248,7 +248,7 @@ void mVU_FMACd(microVU* mVU, int recPass, int opCase, const char* opName) { Fs = mVU->regAlloc->allocReg(_Fs_, 0, _X_Y_Z_W); Fd = mVU->regAlloc->allocReg(32, _Fd_, _X_Y_Z_W); - + if (_XYZW_SS) { SSE_SS[2](mVU, Fs, Ft, -1, -1); SSE_SS[1](mVU, Fd, Fs, tempFt, -1); } else { SSE_PS[2](mVU, Fs, Ft, -1, -1); SSE_PS[1](mVU, Fd, Fs, tempFt, -1); } From e56ef9138e1a1cb245c0a61cc9dcffefdf4d76cc Mon Sep 17 00:00:00 2001 From: "Jake.Stine" Date: Wed, 12 Aug 2009 13:15:14 +0000 Subject: [PATCH 12/50] Fixes for ICC compilation errors (Issue 350) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1616 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/CDVD/CDVDaccess.cpp | 2 +- pcsx2/CDVD/CDVDisoReader.cpp | 2 +- pcsx2/IPU/IPU.h | 18 +++++------------- pcsx2/MTGS.cpp | 1 + 4 files changed, 8 insertions(+), 15 deletions(-) diff --git a/pcsx2/CDVD/CDVDaccess.cpp b/pcsx2/CDVD/CDVDaccess.cpp index c966628f2b..aa73a7db8a 100644 --- a/pcsx2/CDVD/CDVDaccess.cpp +++ b/pcsx2/CDVD/CDVDaccess.cpp @@ -480,7 +480,7 @@ void CALLBACK NODISCdummyVOID() { } -void CALLBACK NODISCnewDiskCB(void(CALLBACK*)()) +void CALLBACK NODISCnewDiskCB(__unused void (*callback)()) { } diff --git a/pcsx2/CDVD/CDVDisoReader.cpp b/pcsx2/CDVD/CDVDisoReader.cpp index 645b44172c..4f87bc96e4 100644 --- a/pcsx2/CDVD/CDVDisoReader.cpp +++ b/pcsx2/CDVD/CDVDisoReader.cpp @@ -396,7 +396,7 @@ void CALLBACK ISOdummyVOID() { } -void CALLBACK ISOnewDiskCB(void(CALLBACK*)()) +void CALLBACK ISOnewDiskCB(__unused void (*callback)()) { } diff --git a/pcsx2/IPU/IPU.h b/pcsx2/IPU/IPU.h index ca6e6498a1..536540aae5 100644 --- a/pcsx2/IPU/IPU.h +++ b/pcsx2/IPU/IPU.h @@ -233,14 +233,11 @@ extern u8* g_pIPU0Pointer; PCSX2_ALIGNED16(extern macroblock_rgb32 rgb32); PCSX2_ALIGNED16(extern macroblock_8 mb8); -void dmaIPU0(); -void dmaIPU1(); - -int ipuInit(); -void ipuReset(); -void ipuShutdown(); -int ipuFreeze(gzFile f, int Mode); -bool ipuCanFreeze(); +extern int ipuInit(); +extern void ipuReset(); +extern void ipuShutdown(); +extern int ipuFreeze(gzFile f, int Mode); +extern bool ipuCanFreeze(); extern u32 ipuRead32(u32 mem); @@ -248,11 +245,6 @@ extern u64 ipuRead64(u32 mem); extern void ipuWrite32(u32 mem,u32 value); extern void ipuWrite64(u32 mem,u64 value); -int ipuConstRead32(u32 x86reg, u32 mem); -void ipuConstRead64(u32 mem, int mmreg); -void ipuConstWrite32(u32 mem, int mmreg); -void ipuConstWrite64(u32 mem, int mmreg); - extern void IPUCMD_WRITE(u32 val); extern void ipuSoftReset(); extern void IPUProcessInterrupt(); diff --git a/pcsx2/MTGS.cpp b/pcsx2/MTGS.cpp index 4463e75b07..66f42e8369 100644 --- a/pcsx2/MTGS.cpp +++ b/pcsx2/MTGS.cpp @@ -218,6 +218,7 @@ mtgsThreadObject::mtgsThreadObject() : void mtgsThreadObject::Start() { + m_post_InitDone.Reset(); Thread::Start(); // Wait for the thread to finish initialization (it runs GSinit, which can take From 0d40e9963e12477ee0219ca955ceec57a774548b Mon Sep 17 00:00:00 2001 From: gabest11 Date: Wed, 12 Aug 2009 22:11:06 +0000 Subject: [PATCH 13/50] vs2010 project files for pcsx2 (plugins later) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1617 96395faa-99c1-11dd-bbfe-3dabce05a288 --- 3rdparty/w32pthreads/pthreads.props | 21 + 3rdparty/w32pthreads/pthreads.vcxproj | 150 ++++ 3rdparty/w32pthreads/pthreads.vcxproj.filters | 137 ++++ 3rdparty/zlib/zlib.vcxproj | 97 +++ 3rdparty/zlib/zlib.vcxproj.filters | 87 +++ common/vsprops/common.props | 42 ++ common/vsprops/debug.props | 17 + common/vsprops/devel.props | 24 + common/vsprops/lib.props | 18 + common/vsprops/plugin.props | 18 + .../CDVDolio => common}/vsprops/release.props | 12 +- {plugins/GSdx => common}/vsprops/sse2.props | 0 {plugins/GSdx => common}/vsprops/sse4.props | 0 {plugins/GSdx => common}/vsprops/ssse3.props | 2 +- pcsx2/PrecompiledHeader.h | 2 +- pcsx2/x86/ix86/implement/group3.h | 2 +- pcsx2_suite_2010.sln | 104 +++ plugins/CDVDolio/cdvd.props | 13 + plugins/CDVDolio/cdvd.vcxproj | 104 +++ ...0.vcxproj.filters => cdvd.vcxproj.filters} | 0 plugins/CDVDolio/cdvd_vs2010.vcxproj | 582 --------------- plugins/CDVDolio/cdvd_vs2010.vcxproj.user | 6 - plugins/CDVDolio/vsprops/ProjectRootDir.props | 25 - plugins/CDVDolio/vsprops/common.props | 27 - plugins/CDVDolio/vsprops/debug.props | 15 - plugins/CDVDolio/vsprops/ssse3.props | 11 - .../GSdx/{vsprops/common.props => GSdx.props} | 17 +- plugins/GSdx/GSdx.rc | 42 +- .../{GSdx_vs2010.vcxproj => GSdx.vcxproj} | 688 +----------------- ...0.vcxproj.filters => GSdx.vcxproj.filters} | 3 - plugins/GSdx/res/GSdx.rc2 | 18 - plugins/GSdx/vsprops/ProjectRootDir.props | 25 - plugins/GSdx/vsprops/debug.props | 15 - plugins/GSdx/vsprops/release.props | 23 - plugins/xpad/stdafx.h | 1 + plugins/xpad/vsprops/ProjectRootDir.props | 25 - plugins/xpad/vsprops/common.props | 27 - plugins/xpad/vsprops/debug.props | 15 - plugins/xpad/vsprops/release.props | 24 - plugins/xpad/vsprops/sse2.props | 11 - plugins/xpad/vsprops/sse4.props | 11 - plugins/xpad/vsprops/ssse3.props | 11 - plugins/xpad/xpad.vcxproj | 103 +++ ...0.vcxproj.filters => xpad.vcxproj.filters} | 0 plugins/xpad/xpad_vs2010.vcxproj | 577 --------------- plugins/xpad/xpad_vs2010.vcxproj.user | 6 - 46 files changed, 1002 insertions(+), 2156 deletions(-) create mode 100644 3rdparty/w32pthreads/pthreads.props create mode 100644 3rdparty/w32pthreads/pthreads.vcxproj create mode 100644 3rdparty/w32pthreads/pthreads.vcxproj.filters create mode 100644 3rdparty/zlib/zlib.vcxproj create mode 100644 3rdparty/zlib/zlib.vcxproj.filters create mode 100644 common/vsprops/common.props create mode 100644 common/vsprops/debug.props create mode 100644 common/vsprops/devel.props create mode 100644 common/vsprops/lib.props create mode 100644 common/vsprops/plugin.props rename {plugins/CDVDolio => common}/vsprops/release.props (64%) rename {plugins/GSdx => common}/vsprops/sse2.props (100%) rename {plugins/GSdx => common}/vsprops/sse4.props (100%) rename {plugins/GSdx => common}/vsprops/ssse3.props (86%) create mode 100644 pcsx2_suite_2010.sln create mode 100644 plugins/CDVDolio/cdvd.props create mode 100644 plugins/CDVDolio/cdvd.vcxproj rename plugins/CDVDolio/{cdvd_vs2010.vcxproj.filters => cdvd.vcxproj.filters} (100%) delete mode 100644 plugins/CDVDolio/cdvd_vs2010.vcxproj delete mode 100644 plugins/CDVDolio/cdvd_vs2010.vcxproj.user delete mode 100644 plugins/CDVDolio/vsprops/ProjectRootDir.props delete mode 100644 plugins/CDVDolio/vsprops/common.props delete mode 100644 plugins/CDVDolio/vsprops/debug.props delete mode 100644 plugins/CDVDolio/vsprops/ssse3.props rename plugins/GSdx/{vsprops/common.props => GSdx.props} (53%) rename plugins/GSdx/{GSdx_vs2010.vcxproj => GSdx.vcxproj} (53%) rename plugins/GSdx/{GSdx_vs2010.vcxproj.filters => GSdx.vcxproj.filters} (96%) delete mode 100644 plugins/GSdx/res/GSdx.rc2 delete mode 100644 plugins/GSdx/vsprops/ProjectRootDir.props delete mode 100644 plugins/GSdx/vsprops/debug.props delete mode 100644 plugins/GSdx/vsprops/release.props delete mode 100644 plugins/xpad/vsprops/ProjectRootDir.props delete mode 100644 plugins/xpad/vsprops/common.props delete mode 100644 plugins/xpad/vsprops/debug.props delete mode 100644 plugins/xpad/vsprops/release.props delete mode 100644 plugins/xpad/vsprops/sse2.props delete mode 100644 plugins/xpad/vsprops/sse4.props delete mode 100644 plugins/xpad/vsprops/ssse3.props create mode 100644 plugins/xpad/xpad.vcxproj rename plugins/xpad/{xpad_vs2010.vcxproj.filters => xpad.vcxproj.filters} (100%) delete mode 100644 plugins/xpad/xpad_vs2010.vcxproj delete mode 100644 plugins/xpad/xpad_vs2010.vcxproj.user diff --git a/3rdparty/w32pthreads/pthreads.props b/3rdparty/w32pthreads/pthreads.props new file mode 100644 index 0000000000..2ca1fda306 --- /dev/null +++ b/3rdparty/w32pthreads/pthreads.props @@ -0,0 +1,21 @@ + + + + + <_PropertySheetDisplayName>pthreads + + + + ws2_32.lib;%(AdditionalDependencies) + + + .\include;%(AdditionalIncludeDirectories) + PTW32_BUILD;__CLEANUP_SEH;%(PreprocessorDefinitions) + Use + ptw32pch.h + Async + + + + + \ No newline at end of file diff --git a/3rdparty/w32pthreads/pthreads.vcxproj b/3rdparty/w32pthreads/pthreads.vcxproj new file mode 100644 index 0000000000..4e4df368e7 --- /dev/null +++ b/3rdparty/w32pthreads/pthreads.vcxproj @@ -0,0 +1,150 @@ + + + + Debug + Win32 + + + Devel + Win32 + + + Release + Win32 + + + + w32pthreads + {26511268-2902-4997-8421-ECD7055F9E28} + pthreads + Win32Proj + + + + DynamicLibrary + MultiByte + + + DynamicLibrary + MultiByte + true + + + DynamicLibrary + MultiByte + + + + + + + + + + + + + + + + + + + + + + + + + <_ProjectFileVersion>10.0.20506.1 + + + + + + CompileAsC + + + + + + + + CompileAsC + + + + + + + + CompileAsC + + + + + + + + + + true + true + true + + + + + + + + + + + + + Create + ptw32pch.h + $(IntDir)ptw32.pch + Create + ptw32pch.h + $(IntDir)ptw32.pch + Create + ptw32pch.h + $(IntDir)ptw32.pch + + + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/3rdparty/w32pthreads/pthreads.vcxproj.filters b/3rdparty/w32pthreads/pthreads.vcxproj.filters new file mode 100644 index 0000000000..b1ba6a4cbb --- /dev/null +++ b/3rdparty/w32pthreads/pthreads.vcxproj.filters @@ -0,0 +1,137 @@ + + + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + + + Docs + + + Docs + + + Docs + + + Docs + + + Docs + + + Docs + + + Docs + + + Docs + + + + + Source Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Source Files + + + \ No newline at end of file diff --git a/3rdparty/zlib/zlib.vcxproj b/3rdparty/zlib/zlib.vcxproj new file mode 100644 index 0000000000..67642e8572 --- /dev/null +++ b/3rdparty/zlib/zlib.vcxproj @@ -0,0 +1,97 @@ + + + + Debug + Win32 + + + Devel + Win32 + + + Release + Win32 + + + + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47} + zlib + + + + StaticLibrary + MultiByte + + + StaticLibrary + MultiByte + true + + + StaticLibrary + MultiByte + + + + + + + + + + + + + + + + + + + + + + + + + <_ProjectFileVersion>10.0.20506.1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/3rdparty/zlib/zlib.vcxproj.filters b/3rdparty/zlib/zlib.vcxproj.filters new file mode 100644 index 0000000000..631d9fdbd4 --- /dev/null +++ b/3rdparty/zlib/zlib.vcxproj.filters @@ -0,0 +1,87 @@ + + + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + \ No newline at end of file diff --git a/common/vsprops/common.props b/common/vsprops/common.props new file mode 100644 index 0000000000..c965d5ffa1 --- /dev/null +++ b/common/vsprops/common.props @@ -0,0 +1,42 @@ + + + + + + + + <_PropertySheetDisplayName>common + $(SolutionDir)bin\$(PcsxSubsection) + $(Platform)\$(Configuration)\ + $(ProjectName) + + + + ProgramDatabase + Level3 + true + false + 16Bytes + 4512;4996 + "$(SolutionDir)3rdparty";"$(SolutionDir)3rdparty\w32pthreads\include";"$(SolutionDir)common\include";%(AdditionalIncludeDirectories) + WIN32;_WIN32;_WIN32;__WIN32__;_WINDOWS;ENABLE_NLS;PACKAGE="pcsx2";TIXML_USE_STL;_CRT_SECURE_NO_WARNINGS;_CRT_SECURE_NO_DEPRECATE;%(PreprocessorDefinitions) + true + + + Windows + true + false + "$(SolutionDir)deps\$(Platform)\$(Configuration)";%(AdditionalLibraryDirectories) + $(SolutionDir)deps\$(Platform)\$(Configuration)\$(ProjectName).lib + + + $(SolutionDir)common\include + + + + + + $(SSEtype) + + + \ No newline at end of file diff --git a/common/vsprops/debug.props b/common/vsprops/debug.props new file mode 100644 index 0000000000..8de1b94e01 --- /dev/null +++ b/common/vsprops/debug.props @@ -0,0 +1,17 @@ + + + + + <_PropertySheetDisplayName>debug + true + + + + Disabled + PCSX2_DEBUG;PCSX2_DEVBUILD;_DEBUG;%(PreprocessorDefinitions) + MultiThreadedDebugDLL + true + + + + \ No newline at end of file diff --git a/common/vsprops/devel.props b/common/vsprops/devel.props new file mode 100644 index 0000000000..441d5a5b91 --- /dev/null +++ b/common/vsprops/devel.props @@ -0,0 +1,24 @@ + + + + + <_PropertySheetDisplayName>devel + true + + + + MaxSpeed + AnySuitable + Speed + PCSX2_DEVBUILD;NDEBUG;_SECURE_SCL=0;%(PreprocessorDefinitions) + true + MultiThreadedDLL + false + false + Fast + false + + + + + \ No newline at end of file diff --git a/common/vsprops/lib.props b/common/vsprops/lib.props new file mode 100644 index 0000000000..0f272b4fd6 --- /dev/null +++ b/common/vsprops/lib.props @@ -0,0 +1,18 @@ + + + + + <_PropertySheetDisplayName>lib + $(SolutionDir)deps\$(Platform)\$(Configuration)\ + + + + + + + + _LIB;%(PreprocessorDefinitions) + + + + \ No newline at end of file diff --git a/common/vsprops/plugin.props b/common/vsprops/plugin.props new file mode 100644 index 0000000000..40a19e02c8 --- /dev/null +++ b/common/vsprops/plugin.props @@ -0,0 +1,18 @@ + + + + plugins\ + + + <_PropertySheetDisplayName>plugin + + + + + + + + + + + \ No newline at end of file diff --git a/plugins/CDVDolio/vsprops/release.props b/common/vsprops/release.props similarity index 64% rename from plugins/CDVDolio/vsprops/release.props rename to common/vsprops/release.props index 8c3093865c..ebb226c7f5 100644 --- a/plugins/CDVDolio/vsprops/release.props +++ b/common/vsprops/release.props @@ -1,4 +1,6 @@ - + + + <_PropertySheetDisplayName>release false @@ -7,7 +9,6 @@ MaxSpeed AnySuitable - true Speed true true @@ -15,10 +16,17 @@ true MultiThreadedDLL false + false + Fast + false true true + + true + + \ No newline at end of file diff --git a/plugins/GSdx/vsprops/sse2.props b/common/vsprops/sse2.props similarity index 100% rename from plugins/GSdx/vsprops/sse2.props rename to common/vsprops/sse2.props diff --git a/plugins/GSdx/vsprops/sse4.props b/common/vsprops/sse4.props similarity index 100% rename from plugins/GSdx/vsprops/sse4.props rename to common/vsprops/sse4.props diff --git a/plugins/GSdx/vsprops/ssse3.props b/common/vsprops/ssse3.props similarity index 86% rename from plugins/GSdx/vsprops/ssse3.props rename to common/vsprops/ssse3.props index 622cdf6ddf..abe085d607 100644 --- a/plugins/GSdx/vsprops/ssse3.props +++ b/common/vsprops/ssse3.props @@ -3,7 +3,7 @@ SSSE3 - <_PropertySheetDisplayName>sse3 + <_PropertySheetDisplayName>ssse3 diff --git a/pcsx2/PrecompiledHeader.h b/pcsx2/PrecompiledHeader.h index 47f62e9b4b..dbaaff8691 100644 --- a/pcsx2/PrecompiledHeader.h +++ b/pcsx2/PrecompiledHeader.h @@ -8,7 +8,7 @@ // Microsoft specific STL extensions for bounds checking and stuff: Enabled in devbuilds, // disabled in release builds. :) -#ifdef _MSC_VER +#if _MSC_VER < 1600 # pragma warning(disable:4244) // disable warning C4244: '=' : conversion from 'big' to 'small', possible loss of data # ifdef PCSX2_DEVBUILD # define _SECURE_SCL 1 diff --git a/pcsx2/x86/ix86/implement/group3.h b/pcsx2/x86/ix86/implement/group3.h index dc9bb169c2..87d79d8b5f 100644 --- a/pcsx2/x86/ix86/implement/group3.h +++ b/pcsx2/x86/ix86/implement/group3.h @@ -88,7 +88,7 @@ class xImpl_iMul : public ImplMulDivBase { xOpWrite0F( (sizeof(ImmType) == 2) ? 0x66 : 0, is_s8( imm8 ) ? 0x6b : 0x69, param1, param2 ); if( is_s8( imm8 ) ) - xWrite8( imm8 ); + xWrite8( (u8)imm8 ); else xWrite( imm8 ); } diff --git a/pcsx2_suite_2010.sln b/pcsx2_suite_2010.sln new file mode 100644 index 0000000000..c03a172e1c --- /dev/null +++ b/pcsx2_suite_2010.sln @@ -0,0 +1,104 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# Visual Studio 10 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "pcsx2", "pcsx2\windows\VCprojects\pcsx2.vcxproj", "{1CEFD830-2B76-4596-A4EE-BCD7280A60BD}" + ProjectSection(ProjectDependencies) = postProject + {26511268-2902-4997-8421-ECD7055F9E28} = {26511268-2902-4997-8421-ECD7055F9E28} + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47} = {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47} + EndProjectSection +EndProject +Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "3rdparty", "3rdparty", "{A306AA7F-A984-407A-A37D-3275979368C4}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "zlib", "3rdparty\zlib\zlib.vcxproj", "{2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "w32pthreads", "3rdparty\w32pthreads\pthreads.vcxproj", "{26511268-2902-4997-8421-ECD7055F9E28}" +EndProject +Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "plugins", "plugins", "{10757E7A-E2B8-4FD3-9194-71331BF36D13}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "CDVDolio", "plugins\CDVDolio\cdvd.vcxproj", "{FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "GSdx", "plugins\GSdx\GSdx.vcxproj", "{18E42F6F-3A62-41EE-B42F-79366C4F1E95}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "xpad", "plugins\xpad\xpad.vcxproj", "{6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Win32 = Debug|Win32 + Devel|Win32 = Devel|Win32 + Release SSE2|Win32 = Release SSE2|Win32 + Release SSE4|Win32 = Release SSE4|Win32 + Release SSSE3|Win32 = Release SSSE3|Win32 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Debug|Win32.ActiveCfg = Debug|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Debug|Win32.Build.0 = Debug|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Devel|Win32.ActiveCfg = Devel|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Devel|Win32.Build.0 = Devel|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Release SSE2|Win32.ActiveCfg = Release|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Release SSE2|Win32.Build.0 = Release|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Release SSE4|Win32.ActiveCfg = Release|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Release SSE4|Win32.Build.0 = Release|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Release SSSE3|Win32.ActiveCfg = Release|Win32 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD}.Release SSSE3|Win32.Build.0 = Release|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Debug|Win32.ActiveCfg = Debug|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Debug|Win32.Build.0 = Debug|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Devel|Win32.ActiveCfg = Devel|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Devel|Win32.Build.0 = Devel|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Release SSE2|Win32.ActiveCfg = Release|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Release SSE2|Win32.Build.0 = Release|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Release SSE4|Win32.ActiveCfg = Release|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Release SSE4|Win32.Build.0 = Release|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Release SSSE3|Win32.ActiveCfg = Release|Win32 + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47}.Release SSSE3|Win32.Build.0 = Release|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Debug|Win32.ActiveCfg = Debug|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Debug|Win32.Build.0 = Debug|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Devel|Win32.ActiveCfg = Devel|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Devel|Win32.Build.0 = Devel|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Release SSE2|Win32.ActiveCfg = Release|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Release SSE2|Win32.Build.0 = Release|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Release SSE4|Win32.ActiveCfg = Release|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Release SSE4|Win32.Build.0 = Release|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Release SSSE3|Win32.ActiveCfg = Release|Win32 + {26511268-2902-4997-8421-ECD7055F9E28}.Release SSSE3|Win32.Build.0 = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Debug|Win32.ActiveCfg = Debug|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Debug|Win32.Build.0 = Debug|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Devel|Win32.ActiveCfg = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Devel|Win32.Build.0 = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Release SSE2|Win32.ActiveCfg = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Release SSE2|Win32.Build.0 = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Release SSE4|Win32.ActiveCfg = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Release SSE4|Win32.Build.0 = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Release SSSE3|Win32.ActiveCfg = Release|Win32 + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB}.Release SSSE3|Win32.Build.0 = Release|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Debug|Win32.ActiveCfg = Debug SSE2|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Debug|Win32.Build.0 = Debug SSE2|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Devel|Win32.ActiveCfg = Release SSE2|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Devel|Win32.Build.0 = Release SSE2|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Release SSE2|Win32.ActiveCfg = Release SSE2|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Release SSE2|Win32.Build.0 = Release SSE2|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Release SSE4|Win32.ActiveCfg = Release SSE4|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Release SSE4|Win32.Build.0 = Release SSE4|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Release SSSE3|Win32.ActiveCfg = Release SSSE3|Win32 + {18E42F6F-3A62-41EE-B42F-79366C4F1E95}.Release SSSE3|Win32.Build.0 = Release SSSE3|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Debug|Win32.ActiveCfg = Debug|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Debug|Win32.Build.0 = Debug|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Devel|Win32.ActiveCfg = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Devel|Win32.Build.0 = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Release SSE2|Win32.ActiveCfg = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Release SSE2|Win32.Build.0 = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Release SSE4|Win32.ActiveCfg = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Release SSE4|Win32.Build.0 = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Release SSSE3|Win32.ActiveCfg = Release|Win32 + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}.Release SSSE3|Win32.Build.0 = Release|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection + GlobalSection(NestedProjects) = preSolution + {2F6C0388-20CB-4242-9F6C-A6EBB6A83F47} = {A306AA7F-A984-407A-A37D-3275979368C4} + {26511268-2902-4997-8421-ECD7055F9E28} = {A306AA7F-A984-407A-A37D-3275979368C4} + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB} = {10757E7A-E2B8-4FD3-9194-71331BF36D13} + {18E42F6F-3A62-41EE-B42F-79366C4F1E95} = {10757E7A-E2B8-4FD3-9194-71331BF36D13} + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A} = {10757E7A-E2B8-4FD3-9194-71331BF36D13} + EndGlobalSection +EndGlobal diff --git a/plugins/CDVDolio/cdvd.props b/plugins/CDVDolio/cdvd.props new file mode 100644 index 0000000000..fa21c56152 --- /dev/null +++ b/plugins/CDVDolio/cdvd.props @@ -0,0 +1,13 @@ + + + + + <_PropertySheetDisplayName>cdvd + + + + "$(SolutionDir)common\vsprops\preBuild.cmd" "$(ProjectDir)." + + + + \ No newline at end of file diff --git a/plugins/CDVDolio/cdvd.vcxproj b/plugins/CDVDolio/cdvd.vcxproj new file mode 100644 index 0000000000..6edc477f0e --- /dev/null +++ b/plugins/CDVDolio/cdvd.vcxproj @@ -0,0 +1,104 @@ + + + + Debug + Win32 + + + Release + Win32 + + + + CDVDolio + {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB} + cdvd + Win32Proj + + + + DynamicLibrary + false + MultiByte + + + DynamicLibrary + false + MultiByte + true + + + + + + + + + + + + + + + + + + + + + + <_ProjectFileVersion>10.0.20506.1 + + + + Use + + + .\cdvd.def + %(DelayLoadDLLs) + + + MachineX86 + + + + + Use + + + .\cdvd.def + %(DelayLoadDLLs) + + + MachineX86 + + + + + + + + + Create + Create + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/plugins/CDVDolio/cdvd_vs2010.vcxproj.filters b/plugins/CDVDolio/cdvd.vcxproj.filters similarity index 100% rename from plugins/CDVDolio/cdvd_vs2010.vcxproj.filters rename to plugins/CDVDolio/cdvd.vcxproj.filters diff --git a/plugins/CDVDolio/cdvd_vs2010.vcxproj b/plugins/CDVDolio/cdvd_vs2010.vcxproj deleted file mode 100644 index 3a541044c0..0000000000 --- a/plugins/CDVDolio/cdvd_vs2010.vcxproj +++ /dev/null @@ -1,582 +0,0 @@ - - - - Debug SSE2 - Win32 - - - Debug SSE2 - Win32 - - - Debug SSE2 - x64 - - - Debug SSE2 - x64 - - - Debug SSE4 - Win32 - - - Debug SSE4 - Win32 - - - Debug SSE4 - x64 - - - Debug SSE4 - x64 - - - Debug SSSE3 - Win32 - - - Debug SSSE3 - Win32 - - - Debug SSSE3 - x64 - - - Debug SSSE3 - x64 - - - Debug - Win32 - - - Debug - Win32 - - - Debug - x64 - - - Debug - x64 - - - Release SSE2 - Win32 - - - Release SSE2 - Win32 - - - Release SSE2 - x64 - - - Release SSE2 - x64 - - - Release SSE4 - Win32 - - - Release SSE4 - Win32 - - - Release SSE4 - x64 - - - Release SSE4 - x64 - - - Release SSSE3 - Win32 - - - Release SSSE3 - Win32 - - - Release SSSE3 - x64 - - - Release SSSE3 - x64 - - - Release - Win32 - - - Release - Win32 - - - Release - x64 - - - Release - x64 - - - - CDVDolio - {FCDF5AE2-EA47-4CC6-9F20-23A0517FEBCB} - cdvd - Win32Proj - - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - Static - MultiByte - true - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - Static - MultiByte - false - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - true - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - true - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - true - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - <_ProjectFileVersion>10.0.20506.1 - $(Configuration)\ - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - MachineX64 - - - - - Use - - - .\cdvd.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - MachineX64 - - - - - - - - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/plugins/CDVDolio/cdvd_vs2010.vcxproj.user b/plugins/CDVDolio/cdvd_vs2010.vcxproj.user deleted file mode 100644 index 91498d016d..0000000000 --- a/plugins/CDVDolio/cdvd_vs2010.vcxproj.user +++ /dev/null @@ -1,6 +0,0 @@ - - - - cdvd.rc - - \ No newline at end of file diff --git a/plugins/CDVDolio/vsprops/ProjectRootDir.props b/plugins/CDVDolio/vsprops/ProjectRootDir.props deleted file mode 100644 index fd31a6334d..0000000000 --- a/plugins/CDVDolio/vsprops/ProjectRootDir.props +++ /dev/null @@ -1,25 +0,0 @@ - - - $(ProjectDir). - $(ProjectRootDir)\..\.. - $(SvnRootDir)\common - plugins - - - <_PropertySheetDisplayName>ProjectRootDir - - - - $(ProjectRootDir) - - - $(SvnRootDir) - - - $(SvnCommonDir) - - - $(PcsxSubsection) - - - \ No newline at end of file diff --git a/plugins/CDVDolio/vsprops/common.props b/plugins/CDVDolio/vsprops/common.props deleted file mode 100644 index 153b18395e..0000000000 --- a/plugins/CDVDolio/vsprops/common.props +++ /dev/null @@ -1,27 +0,0 @@ - - - <_PropertySheetDisplayName>common - ..\..\bin\plugins\ - $(PlatformName)\$(Configuration)\ - $(ProjectName) - .dll - - - - true - WIN32;_WINDOWS;_WIN32_WINNT=0x500;%(PreprocessorDefinitions) - Fast - false - Level4 - ProgramDatabase - 4995;4324;%(DisableSpecificWarnings) - - - d3d10.lib;d3dx10.lib;d3d9.lib;d3dx9.lib;ddraw.lib;dxguid.lib;winmm.lib;strmiids.lib;xinput.lib;%(AdditionalDependencies) - d3d9.dll;d3dx9_40.dll;d3d10.dll;d3dx10_40.dll;%(DelayLoadDLLs) - true - Windows - false - - - \ No newline at end of file diff --git a/plugins/CDVDolio/vsprops/debug.props b/plugins/CDVDolio/vsprops/debug.props deleted file mode 100644 index b42c70d73c..0000000000 --- a/plugins/CDVDolio/vsprops/debug.props +++ /dev/null @@ -1,15 +0,0 @@ - - - <_PropertySheetDisplayName>debug - true - - - - Disabled - _DEBUG;%(PreprocessorDefinitions) - true - StackFrameRuntimeCheck - MultiThreadedDebugDLL - - - \ No newline at end of file diff --git a/plugins/CDVDolio/vsprops/ssse3.props b/plugins/CDVDolio/vsprops/ssse3.props deleted file mode 100644 index 0d1131f6a8..0000000000 --- a/plugins/CDVDolio/vsprops/ssse3.props +++ /dev/null @@ -1,11 +0,0 @@ - - - <_PropertySheetDisplayName>sse3 - - - - StreamingSIMDExtensions2 - _M_SSE=0x301;%(PreprocessorDefinitions) - - - \ No newline at end of file diff --git a/plugins/GSdx/vsprops/common.props b/plugins/GSdx/GSdx.props similarity index 53% rename from plugins/GSdx/vsprops/common.props rename to plugins/GSdx/GSdx.props index 86d9f38569..a7b35f3c7f 100644 --- a/plugins/GSdx/vsprops/common.props +++ b/plugins/GSdx/GSdx.props @@ -1,33 +1,24 @@  - <_PropertySheetDisplayName>common - $(SolutionDir)bin\$(PcsxSubsection)\ - $(PlatformName)\$(Configuration)\ + <_PropertySheetDisplayName>GSdx $(ProjectName)-$(SSEtype) - true - WIN32;_WINDOWS;_WIN32_WINNT=0x500;%(PreprocessorDefinitions) - Fast - false Level4 - ProgramDatabase 4995;4324;%(DisableSpecificWarnings) JITProfiling.lib;d3d11_beta.lib;d3dx11.lib;d3d10.lib;d3d10_1.lib;d3dx10.lib;d3d9.lib;d3dx9.lib;ddraw.lib;dxguid.lib;winmm.lib;strmiids.lib;xinput.lib;cg.lib;cgGL.lib;glut32.lib;glew32.lib;%(AdditionalDependencies) ./vtune;%(AdditionalLibraryDirectories) d3d9.dll;d3dx9_41.dll;d3d10.dll;d3d10_1.dll;d3dx10_41.dll;d3d11.dll;d3d11_beta.dll;d3dx11_41.dll;%(DelayLoadDLLs) - true - Windows - false - .\postBuild.cmd "$(TargetPath)" "$(TargetName)" $(TargetExt) $(PcsxSubsection) + + - "$(SvnCommonDir)\vsprops\preBuild.cmd" "$(ProjectRootDir)" + "$(SolutionDir)common\vsprops\preBuild.cmd" "$(ProjectDir)." \ No newline at end of file diff --git a/plugins/GSdx/GSdx.rc b/plugins/GSdx/GSdx.rc index db6665a698..af187f972d 100644 --- a/plugins/GSdx/GSdx.rc +++ b/plugins/GSdx/GSdx.rc @@ -15,10 +15,10 @@ ///////////////////////////////////////////////////////////////////////////// // Hungarian resources -#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_HUN) +#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU) #ifdef _WIN32 -LANGUAGE LANG_HUNGARIAN, SUBLANG_DEFAULT -#pragma code_page(1250) +LANGUAGE LANG_ENGLISH, SUBLANG_DEFAULT +#pragma code_page(1252) #endif //_WIN32 #ifdef APSTUDIO_INVOKED @@ -40,34 +40,22 @@ END 3 TEXTINCLUDE BEGIN - "#define _AFX_NO_SPLITTER_RESOURCES\r\n" - "#define _AFX_NO_OLE_RESOURCES\r\n" - "#define _AFX_NO_TRACKER_RESOURCES\r\n" - "#define _AFX_NO_PROPERTY_RESOURCES\r\n" "\r\n" - "#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU)\r\n" - "LANGUAGE 9, 1\r\n" - "#pragma code_page(1252)\r\n" - "#include ""res\\GSdx.rc2"" // non-Microsoft Visual C++ edited resources\r\n" - "#include ""afxres.rc"" // Standard components\r\n" - "#endif\r\n" "\0" END #endif // APSTUDIO_INVOKED -#endif // Hungarian resources -///////////////////////////////////////////////////////////////////////////// - ///////////////////////////////////////////////////////////////////////////// -// English (U.S.) resources +// +// RCDATA +// -#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU) -#ifdef _WIN32 -LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US -#pragma code_page(1252) -#endif //_WIN32 +IDR_CONVERT_FX RCDATA "res\\convert.fx" +IDR_TFX_FX RCDATA "res\\tfx.fx" +IDR_MERGE_FX RCDATA "res\\merge.fx" +IDR_INTERLACE_FX RCDATA "res\\interlace.fx" ///////////////////////////////////////////////////////////////////////////// // @@ -252,17 +240,7 @@ END // // Generated from the TEXTINCLUDE 3 resource. // -#define _AFX_NO_SPLITTER_RESOURCES -#define _AFX_NO_OLE_RESOURCES -#define _AFX_NO_TRACKER_RESOURCES -#define _AFX_NO_PROPERTY_RESOURCES -#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU) -LANGUAGE 9, 1 -#pragma code_page(1252) -#include "res\GSdx.rc2" // non-Microsoft Visual C++ edited resources -#include "afxres.rc" // Standard components -#endif ///////////////////////////////////////////////////////////////////////////// #endif // not APSTUDIO_INVOKED diff --git a/plugins/GSdx/GSdx_vs2010.vcxproj b/plugins/GSdx/GSdx.vcxproj similarity index 53% rename from plugins/GSdx/GSdx_vs2010.vcxproj rename to plugins/GSdx/GSdx.vcxproj index 9ad2e1e88f..f1211519ed 100644 --- a/plugins/GSdx/GSdx_vs2010.vcxproj +++ b/plugins/GSdx/GSdx.vcxproj @@ -8,14 +8,6 @@ Debug SSE2 Win32 - - Debug SSE2 - x64 - - - Debug SSE2 - x64 - Debug SSE4 Win32 @@ -24,14 +16,6 @@ Debug SSE4 Win32 - - Debug SSE4 - x64 - - - Debug SSE4 - x64 - Debug SSSE3 Win32 @@ -40,14 +24,6 @@ Debug SSSE3 Win32 - - Debug SSSE3 - x64 - - - Debug SSSE3 - x64 - Debug Win32 @@ -56,14 +32,6 @@ Debug Win32 - - Debug - x64 - - - Debug - x64 - Release SSE2 Win32 @@ -72,14 +40,6 @@ Release SSE2 Win32 - - Release SSE2 - x64 - - - Release SSE2 - x64 - Release SSE4 Win32 @@ -88,14 +48,6 @@ Release SSE4 Win32 - - Release SSE4 - x64 - - - Release SSE4 - x64 - Release SSSE3 Win32 @@ -104,14 +56,6 @@ Release SSSE3 Win32 - - Release SSSE3 - x64 - - - Release SSSE3 - x64 - Release Win32 @@ -120,14 +64,6 @@ Release Win32 - - Release - x64 - - - Release - x64 - GSdx @@ -145,78 +81,33 @@ MultiByte true - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - Static - MultiByte - true - DynamicLibrary MultiByte - - DynamicLibrary - Static - MultiByte - false - DynamicLibrary MultiByte true - - DynamicLibrary - Static - MultiByte - true - DynamicLibrary MultiByte true - - DynamicLibrary - Static - MultiByte - true - DynamicLibrary MultiByte - - DynamicLibrary - Static - MultiByte - DynamicLibrary MultiByte - - DynamicLibrary - Static - MultiByte - DynamicLibrary MultiByte true - - DynamicLibrary - Static - MultiByte - true - @@ -224,86 +115,58 @@ - - - - - - - + + + + - - - - - - - + + + + - - - - - - - - + + + + + - - - - - - - - - - - - - - - - - - - + + + + + - - - - + + + + + - - - - + + + + + + - - - - - - - - - + + + + + - - - - - - - - - + + + + + @@ -320,21 +183,6 @@ MachineX86 - - - X64 - - - Use - - - - - - - MachineX64 - - Use @@ -346,21 +194,6 @@ MachineX86 - - - X64 - - - Use - - - - - - - MachineX64 - - Use @@ -372,16 +205,6 @@ MachineX86 - - - Use - - - - - MachineX64 - - Use @@ -393,16 +216,6 @@ MachineX86 - - - Use - - - - - MachineX64 - - Use @@ -414,16 +227,6 @@ MachineX86 - - - Use - - - - - MachineX64 - - Use @@ -435,16 +238,6 @@ MachineX86 - - - Use - - - - - MachineX64 - - Use @@ -456,19 +249,6 @@ MachineX86 - - - X64 - - - Use - - - - - MachineX64 - - Use @@ -480,801 +260,420 @@ MachineX86 - - - X64 - - - Use - - - - - MachineX64 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -1350,21 +749,13 @@ Create - Create Create - Create Create - Create Create - Create Create - Create Create - Create Create - Create Create - Create @@ -1490,7 +881,6 @@ - diff --git a/plugins/GSdx/GSdx_vs2010.vcxproj.filters b/plugins/GSdx/GSdx.vcxproj.filters similarity index 96% rename from plugins/GSdx/GSdx_vs2010.vcxproj.filters rename to plugins/GSdx/GSdx.vcxproj.filters index c78db539e9..339b3fb6b1 100644 --- a/plugins/GSdx/GSdx_vs2010.vcxproj.filters +++ b/plugins/GSdx/GSdx.vcxproj.filters @@ -676,9 +676,6 @@ Shaders - - Resource Files - Shaders diff --git a/plugins/GSdx/res/GSdx.rc2 b/plugins/GSdx/res/GSdx.rc2 deleted file mode 100644 index 793e0342dd..0000000000 --- a/plugins/GSdx/res/GSdx.rc2 +++ /dev/null @@ -1,18 +0,0 @@ -// -// GSdx.RC2 - resources Microsoft Visual C++ does not edit directly -// - -#ifdef APSTUDIO_INVOKED -#error this file is not editable by Microsoft Visual C++ -#endif //APSTUDIO_INVOKED - - -///////////////////////////////////////////////////////////////////////////// -// Add manually edited resources here... - -IDR_CONVERT_FX RCDATA "res\\convert.fx" -IDR_TFX_FX RCDATA "res\\tfx.fx" -IDR_MERGE_FX RCDATA "res\\merge.fx" -IDR_INTERLACE_FX RCDATA "res\\interlace.fx" - -///////////////////////////////////////////////////////////////////////////// diff --git a/plugins/GSdx/vsprops/ProjectRootDir.props b/plugins/GSdx/vsprops/ProjectRootDir.props deleted file mode 100644 index fd31a6334d..0000000000 --- a/plugins/GSdx/vsprops/ProjectRootDir.props +++ /dev/null @@ -1,25 +0,0 @@ - - - $(ProjectDir). - $(ProjectRootDir)\..\.. - $(SvnRootDir)\common - plugins - - - <_PropertySheetDisplayName>ProjectRootDir - - - - $(ProjectRootDir) - - - $(SvnRootDir) - - - $(SvnCommonDir) - - - $(PcsxSubsection) - - - \ No newline at end of file diff --git a/plugins/GSdx/vsprops/debug.props b/plugins/GSdx/vsprops/debug.props deleted file mode 100644 index 4eabec6606..0000000000 --- a/plugins/GSdx/vsprops/debug.props +++ /dev/null @@ -1,15 +0,0 @@ - - - <_PropertySheetDisplayName>debug - true - - - - Disabled - _DEBUG;%(PreprocessorDefinitions) - true - StackFrameRuntimeCheck - MultiThreadedDebug - - - \ No newline at end of file diff --git a/plugins/GSdx/vsprops/release.props b/plugins/GSdx/vsprops/release.props deleted file mode 100644 index d88644540e..0000000000 --- a/plugins/GSdx/vsprops/release.props +++ /dev/null @@ -1,23 +0,0 @@ - - - <_PropertySheetDisplayName>release - false - - - - MaxSpeed - AnySuitable - true - Speed - true - true - NDEBUG;_SECURE_SCL=0;%(PreprocessorDefinitions) - true - false - - - true - true - - - \ No newline at end of file diff --git a/plugins/xpad/stdafx.h b/plugins/xpad/stdafx.h index 326e8d0bc1..9bf9ae82df 100644 --- a/plugins/xpad/stdafx.h +++ b/plugins/xpad/stdafx.h @@ -38,6 +38,7 @@ #include #include #include +#include // stdc diff --git a/plugins/xpad/vsprops/ProjectRootDir.props b/plugins/xpad/vsprops/ProjectRootDir.props deleted file mode 100644 index fd31a6334d..0000000000 --- a/plugins/xpad/vsprops/ProjectRootDir.props +++ /dev/null @@ -1,25 +0,0 @@ - - - $(ProjectDir). - $(ProjectRootDir)\..\.. - $(SvnRootDir)\common - plugins - - - <_PropertySheetDisplayName>ProjectRootDir - - - - $(ProjectRootDir) - - - $(SvnRootDir) - - - $(SvnCommonDir) - - - $(PcsxSubsection) - - - \ No newline at end of file diff --git a/plugins/xpad/vsprops/common.props b/plugins/xpad/vsprops/common.props deleted file mode 100644 index 153b18395e..0000000000 --- a/plugins/xpad/vsprops/common.props +++ /dev/null @@ -1,27 +0,0 @@ - - - <_PropertySheetDisplayName>common - ..\..\bin\plugins\ - $(PlatformName)\$(Configuration)\ - $(ProjectName) - .dll - - - - true - WIN32;_WINDOWS;_WIN32_WINNT=0x500;%(PreprocessorDefinitions) - Fast - false - Level4 - ProgramDatabase - 4995;4324;%(DisableSpecificWarnings) - - - d3d10.lib;d3dx10.lib;d3d9.lib;d3dx9.lib;ddraw.lib;dxguid.lib;winmm.lib;strmiids.lib;xinput.lib;%(AdditionalDependencies) - d3d9.dll;d3dx9_40.dll;d3d10.dll;d3dx10_40.dll;%(DelayLoadDLLs) - true - Windows - false - - - \ No newline at end of file diff --git a/plugins/xpad/vsprops/debug.props b/plugins/xpad/vsprops/debug.props deleted file mode 100644 index b42c70d73c..0000000000 --- a/plugins/xpad/vsprops/debug.props +++ /dev/null @@ -1,15 +0,0 @@ - - - <_PropertySheetDisplayName>debug - true - - - - Disabled - _DEBUG;%(PreprocessorDefinitions) - true - StackFrameRuntimeCheck - MultiThreadedDebugDLL - - - \ No newline at end of file diff --git a/plugins/xpad/vsprops/release.props b/plugins/xpad/vsprops/release.props deleted file mode 100644 index 8c3093865c..0000000000 --- a/plugins/xpad/vsprops/release.props +++ /dev/null @@ -1,24 +0,0 @@ - - - <_PropertySheetDisplayName>release - false - - - - MaxSpeed - AnySuitable - true - Speed - true - true - NDEBUG;_SECURE_SCL=0;%(PreprocessorDefinitions) - true - MultiThreadedDLL - false - - - true - true - - - \ No newline at end of file diff --git a/plugins/xpad/vsprops/sse2.props b/plugins/xpad/vsprops/sse2.props deleted file mode 100644 index 593107b5a9..0000000000 --- a/plugins/xpad/vsprops/sse2.props +++ /dev/null @@ -1,11 +0,0 @@ - - - <_PropertySheetDisplayName>sse2 - - - - StreamingSIMDExtensions2 - _M_SSE=0x200;%(PreprocessorDefinitions) - - - \ No newline at end of file diff --git a/plugins/xpad/vsprops/sse4.props b/plugins/xpad/vsprops/sse4.props deleted file mode 100644 index 273b626cee..0000000000 --- a/plugins/xpad/vsprops/sse4.props +++ /dev/null @@ -1,11 +0,0 @@ - - - <_PropertySheetDisplayName>sse4 - - - - _M_SSE=0x401;%(PreprocessorDefinitions) - StreamingSIMDExtensions2 - - - \ No newline at end of file diff --git a/plugins/xpad/vsprops/ssse3.props b/plugins/xpad/vsprops/ssse3.props deleted file mode 100644 index 0d1131f6a8..0000000000 --- a/plugins/xpad/vsprops/ssse3.props +++ /dev/null @@ -1,11 +0,0 @@ - - - <_PropertySheetDisplayName>sse3 - - - - StreamingSIMDExtensions2 - _M_SSE=0x301;%(PreprocessorDefinitions) - - - \ No newline at end of file diff --git a/plugins/xpad/xpad.vcxproj b/plugins/xpad/xpad.vcxproj new file mode 100644 index 0000000000..906ee85abd --- /dev/null +++ b/plugins/xpad/xpad.vcxproj @@ -0,0 +1,103 @@ + + + + Debug + Win32 + + + Release + Win32 + + + + xpad + {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A} + xpad + Win32Proj + + + + DynamicLibrary + false + MultiByte + + + DynamicLibrary + false + MultiByte + true + + + + + + + + + + + + + + + + + + + + + + <_ProjectFileVersion>10.0.20506.1 + + + + Use + + + .\xpad.def + %(DelayLoadDLLs) + + + MachineX86 + + + + + Use + + + .\xpad.def + %(DelayLoadDLLs) + + + MachineX86 + + + + + + + + + Create + Create + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/plugins/xpad/xpad_vs2010.vcxproj.filters b/plugins/xpad/xpad.vcxproj.filters similarity index 100% rename from plugins/xpad/xpad_vs2010.vcxproj.filters rename to plugins/xpad/xpad.vcxproj.filters diff --git a/plugins/xpad/xpad_vs2010.vcxproj b/plugins/xpad/xpad_vs2010.vcxproj deleted file mode 100644 index de11c7554b..0000000000 --- a/plugins/xpad/xpad_vs2010.vcxproj +++ /dev/null @@ -1,577 +0,0 @@ - - - - Debug SSE2 - Win32 - - - Debug SSE2 - Win32 - - - Debug SSE2 - x64 - - - Debug SSE2 - x64 - - - Debug SSE4 - Win32 - - - Debug SSE4 - Win32 - - - Debug SSE4 - x64 - - - Debug SSE4 - x64 - - - Debug SSSE3 - Win32 - - - Debug SSSE3 - Win32 - - - Debug SSSE3 - x64 - - - Debug SSSE3 - x64 - - - Debug - Win32 - - - Debug - Win32 - - - Debug - x64 - - - Debug - x64 - - - Release SSE2 - Win32 - - - Release SSE2 - Win32 - - - Release SSE2 - x64 - - - Release SSE2 - x64 - - - Release SSE4 - Win32 - - - Release SSE4 - Win32 - - - Release SSE4 - x64 - - - Release SSE4 - x64 - - - Release SSSE3 - Win32 - - - Release SSSE3 - Win32 - - - Release SSSE3 - x64 - - - Release SSSE3 - x64 - - - Release - Win32 - - - Release - Win32 - - - Release - x64 - - - Release - x64 - - - - xpad - {6F3C4136-5801-4EBC-AC6E-37DF6FAB150A} - xpad - Win32Proj - - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - Static - MultiByte - true - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - Static - MultiByte - false - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - true - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - true - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - false - MultiByte - - - DynamicLibrary - Static - MultiByte - - - DynamicLibrary - false - MultiByte - true - - - DynamicLibrary - Static - MultiByte - true - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - <_ProjectFileVersion>10.0.20506.1 - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - Use - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - MachineX64 - - - - - Use - - - .\xpad.def - %(DelayLoadDLLs) - - - MachineX86 - - - - - X64 - - - Use - - - - - MachineX64 - - - - - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - Create - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/plugins/xpad/xpad_vs2010.vcxproj.user b/plugins/xpad/xpad_vs2010.vcxproj.user deleted file mode 100644 index f6df7c591b..0000000000 --- a/plugins/xpad/xpad_vs2010.vcxproj.user +++ /dev/null @@ -1,6 +0,0 @@ - - - - xpad.rc - - \ No newline at end of file From e9277c36d799641155a2676060bedd68f799a406 Mon Sep 17 00:00:00 2001 From: gabest11 Date: Wed, 12 Aug 2009 22:26:39 +0000 Subject: [PATCH 14/50] missing project files git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1618 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/windows/VCprojects/pcsx2.props | 23 + pcsx2/windows/VCprojects/pcsx2.vcxproj | 756 +++++++++++ .../windows/VCprojects/pcsx2.vcxproj.filters | 1163 +++++++++++++++++ 3 files changed, 1942 insertions(+) create mode 100644 pcsx2/windows/VCprojects/pcsx2.props create mode 100644 pcsx2/windows/VCprojects/pcsx2.vcxproj create mode 100644 pcsx2/windows/VCprojects/pcsx2.vcxproj.filters diff --git a/pcsx2/windows/VCprojects/pcsx2.props b/pcsx2/windows/VCprojects/pcsx2.props new file mode 100644 index 0000000000..016d1b6801 --- /dev/null +++ b/pcsx2/windows/VCprojects/pcsx2.props @@ -0,0 +1,23 @@ + + + + + <_PropertySheetDisplayName>pcsx2 + + + + Use + PrecompiledHeader.h + ..;../..;../libs;../../x86;../../IPU;%(AdditionalIncludeDirectories) + Async + + + ..\libs;%(AdditionalLibraryDirectories) + gnu_gettext.lib;w32pthreads.lib;zlib.lib;comctl32.lib;ws2_32.lib;winmm.lib;%(AdditionalDependencies) + + + "$(SolutionDir)common\vsprops\preBuild.cmd" "$(ProjectDir)..\.." + + + + \ No newline at end of file diff --git a/pcsx2/windows/VCprojects/pcsx2.vcxproj b/pcsx2/windows/VCprojects/pcsx2.vcxproj new file mode 100644 index 0000000000..cb3b4fd246 --- /dev/null +++ b/pcsx2/windows/VCprojects/pcsx2.vcxproj @@ -0,0 +1,756 @@ + + + + Debug + Win32 + + + Devel + Win32 + + + Release + Win32 + + + + pcsx2 + {1CEFD830-2B76-4596-A4EE-BCD7280A60BD} + pcsx2 + + + + Application + MultiByte + + + MultiByte + true + + + Application + MultiByte + + + + + + + + + + + + + + + + + + + + + + + + + + <_ProjectFileVersion>10.0.20506.1 + $(ProjectName)-dev + $(ProjectName)-dbg + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + + + + + + + + + + Create + Create + Create + + + + + + + + + + + + + + + + + + + + + + + + + + + NotUsing + + + + + NotUsing + + + + + NotUsing + + + + + + + NotUsing + + + + + NotUsing + + + + + NotUsing + + + + + + + NotUsing + + + + + NotUsing + + + + + NotUsing + + + + + + + NotUsing + + + + + NotUsing + + + + + NotUsing + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + NotUsing + + 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Ps2\EmotionEngine\VUmicro\Dynarec\Super VU + + + Ps2\EmotionEngine\VUmicro\Dynarec\Super VU + + + HostGUI\Include + + + Misc\Cheats + + + HostGUI\Debugger + + + HostGUI\Include + + + HostGUI\Include + + + HostSystem\Include + + + HostGUI\Include + + + HostGUI\Include + + + HostGUI\Include + + + HostGUI\Include + + + + + Docs + + + Docs + + + Docs + + + Docs + + + Docs + + + Ps2\IPU + + + HostGUI\Resources + + + HostSystem\Linux\asm + + + HostSystem\Linux\asm + + + HostSystem\Linux\asm + + + HostSystem\Linux\asm + + + HostSystem\Linux\asm + + + HostSystem\Linux\asm + + + HostSystem\x86Emitter + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + + HostGUI\Resources + + + HostGUI\Resources + + + HostGUI\Resources + + + + + Ps2\EmotionEngine\DMAC\Vif\Dynarec + + + + + HostGUI\Resources + + + HostGUI\Resources + + + + + + \ No newline at end of file From b44e6fcb8a583f8dc28a30bf0541593fcf1a4769 Mon Sep 17 00:00:00 2001 From: gabest11 Date: Wed, 12 Aug 2009 22:47:48 +0000 Subject: [PATCH 15/50] doh, so many missing files git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1619 96395faa-99c1-11dd-bbfe-3dabce05a288 --- plugins/xpad/xpad.props | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 plugins/xpad/xpad.props diff --git a/plugins/xpad/xpad.props b/plugins/xpad/xpad.props new file mode 100644 index 0000000000..721abc667d --- /dev/null +++ b/plugins/xpad/xpad.props @@ -0,0 +1,16 @@ + + + + + <_PropertySheetDisplayName>xpad + + + + xinput.lib;%(AdditionalDependencies) + + + "$(SolutionDir)common\vsprops\preBuild.cmd" "$(ProjectDir)." + + + + \ No newline at end of file From ab010b2b4c9dcea392a14d8e64a539b3f3406074 Mon Sep 17 00:00:00 2001 From: gabest11 Date: Wed, 12 Aug 2009 23:27:22 +0000 Subject: [PATCH 16/50] forgot to set function level linking..., that trims more unused code and dlls deps, any good revision number ahead to reach? :D git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1620 96395faa-99c1-11dd-bbfe-3dabce05a288 --- common/vsprops/common.props | 1 + common/vsprops/devel.props | 1 - common/vsprops/release.props | 1 - 3 files changed, 1 insertion(+), 2 deletions(-) diff --git a/common/vsprops/common.props b/common/vsprops/common.props index c965d5ffa1..bcd1fecb60 100644 --- a/common/vsprops/common.props +++ b/common/vsprops/common.props @@ -21,6 +21,7 @@ "$(SolutionDir)3rdparty";"$(SolutionDir)3rdparty\w32pthreads\include";"$(SolutionDir)common\include";%(AdditionalIncludeDirectories) WIN32;_WIN32;_WIN32;__WIN32__;_WINDOWS;ENABLE_NLS;PACKAGE="pcsx2";TIXML_USE_STL;_CRT_SECURE_NO_WARNINGS;_CRT_SECURE_NO_DEPRECATE;%(PreprocessorDefinitions) true + true Windows diff --git a/common/vsprops/devel.props b/common/vsprops/devel.props index 441d5a5b91..7cf5df8655 100644 --- a/common/vsprops/devel.props +++ b/common/vsprops/devel.props @@ -14,7 +14,6 @@ true MultiThreadedDLL false - false Fast false diff --git a/common/vsprops/release.props b/common/vsprops/release.props index ebb226c7f5..399b222dc4 100644 --- a/common/vsprops/release.props +++ b/common/vsprops/release.props @@ -16,7 +16,6 @@ true MultiThreadedDLL false - false Fast false From 18a12b10b021750d14a52e8f844b9625130a374f Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Thu, 13 Aug 2009 05:04:04 +0000 Subject: [PATCH 17/50] microVU: - Cleaned up microVU_Compile - Added file microVU_Branch git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1621 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/windows/VCprojects/pcsx2_2008.vcproj | 4 + pcsx2/x86/microVU.h | 1 + pcsx2/x86/microVU_Branch.inl | 201 +++++++++++ pcsx2/x86/microVU_Compile.inl | 385 ++++++--------------- pcsx2/x86/microVU_Flags.inl | 51 ++- pcsx2/x86/microVU_IR.h | 7 + 6 files changed, 338 insertions(+), 311 deletions(-) create mode 100644 pcsx2/x86/microVU_Branch.inl diff --git a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj index 6594926e75..a300c0fd7d 100644 --- a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj +++ b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj @@ -2076,6 +2076,10 @@ RelativePath="..\..\x86\microVU_Analyze.inl" > + + diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index be067f2800..e1e1b5cbfd 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -206,5 +206,6 @@ typedef void (__fastcall *mVUrecCall)(u32, u32); #include "microVU_Lower.inl" #include "microVU_Tables.inl" #include "microVU_Flags.inl" +#include "microVU_Branch.inl" #include "microVU_Compile.inl" #include "microVU_Execute.inl" diff --git a/pcsx2/x86/microVU_Branch.inl b/pcsx2/x86/microVU_Branch.inl new file mode 100644 index 0000000000..74de944483 --- /dev/null +++ b/pcsx2/x86/microVU_Branch.inl @@ -0,0 +1,201 @@ +/* Pcsx2 - Pc Ps2 Emulator + * Copyright (C) 2009 Pcsx2 Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + */ + +#pragma once + +microVUt(void) mVUincCycles(mV, int x); +microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState); + +#define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); } +#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3)) +#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3)) + +microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) { + + int fStatus = (isEbit) ? findFlagInst(mFC->xStatus, 0x7fffffff) : sI; + int fMac = (isEbit) ? findFlagInst(mFC->xMac, 0x7fffffff) : 0; + int fClip = (isEbit) ? findFlagInst(mFC->xClip, 0x7fffffff) : cI; + int qInst = 0; + int pInst = 0; + mVU->regAlloc->flushAll(); + + if (isEbit) { + mVUprint("mVUcompile ebit"); + memset(&mVUinfo, 0, sizeof(mVUinfo)); + memset(&mVUregsTemp, 0, sizeof(mVUregsTemp)); + mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0) + mVUcycles -= 100; + qInst = mVU->q; + pInst = mVU->p; + if (mVUinfo.doDivFlag) { + sFLAG.doFlag = 1; + sFLAG.write = fStatus; + mVUdivSet(mVU); + } + if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); } + } + + // Save P/Q Regs + if (qInst) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, 0xe5); } + SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_Q].UL, xmmPQ); + if (isVU1) { + SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, pInst ? 3 : 2); + SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_P].UL, xmmPQ); + } + + // Save Flag Instances + mVUallocSFLAGc(gprT1, gprT2, fStatus); + MOV32RtoM((uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL, gprT1); + mVUallocMFLAGa(mVU, gprT1, fMac); + mVUallocCFLAGa(mVU, gprT2, fClip); + MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL, gprT1); + MOV32RtoM((uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL, gprT2); + + if (isEbit || isVU1) { // Clear 'is busy' Flags + AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag + AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif + } + + if (isEbit != 2) { // Save PC, and Jump to Exit Point + MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC); + JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5)); + } +} + +// Recompiles Code for Proper Flags and Q/P regs on Block Linkings +microVUt(void) mVUsetupBranch(mV, microFlagCycles& mFC) { + mVUprint("mVUsetupBranch"); + + // Flush Allocated Regs + mVU->regAlloc->flushAll(); + + // Shuffle Flag Instances + mVUsetupFlags(mVU, mFC); + + // Shuffle P/Q regs since every block starts at instance #0 + if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); } +} + +void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { + using namespace x86Emitter; + mVUsetupBranch(mVU, mFC); + xCMP(ptr16[&mVU->branch], 0); + if (mVUup.eBit) { // Conditional Branch With E-Bit Set + mVUendProgram(mVU, &mFC, 2); + xForwardJump8 eJMP((JccComparisonType)JMPcc); + incPC(1); // Set PC to First instruction of Non-Taken Side + xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC); + xJMP(mVU->exitFunct); + eJMP.SetTarget(); + incPC(-4); // Go Back to Branch Opcode to get branchAddr + iPC = branchAddr/4; + xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC); + xJMP(mVU->exitFunct); + return; + } + else { // Normal Conditional Branch + microBlock* bBlock; + incPC2(1); // Check if Branch Non-Taken Side has already been recompiled + blockCreate(iPC/2); + bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs); + incPC2(-1); + if (bBlock) { // Branch non-taken has already been compiled + xJcc( xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart ); + + // Check if branch-block has already been compiled + incPC(-3); // Go back to branch opcode (to get branch imm addr) + blockCreate(branchAddr/8); + pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs); + if (pBlock) { xJMP( pBlock->x86ptrStart ); } + else { mVUblockFetch(mVU, branchAddr, (uptr)&mVUregs); } + } + else { + s32* ajmp = xJcc32((JccComparisonType)JMPcc); + uptr jumpAddr; + u32 bPC = iPC; // mVUcompile can modify iPC and mVUregs so back them up + memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); + + incPC2(1); // Get PC for branch not-taken + mVUcompile(mVU, xPC, (uptr)&mVUregs); + + iPC = bPC; + incPC(-3); // Go back to branch opcode (to get branch imm addr) + jumpAddr = (uptr)mVUblockFetch(mVU, branchAddr, (uptr)&pBlock->pStateEnd); + *ajmp = (jumpAddr - ((uptr)ajmp + 4)); + } + } +} + +void normBranch(mV, microFlagCycles& mFC) { + using namespace x86Emitter; + microBlock* pBlock; + incPC(-3); // Go back to branch opcode (to get branch imm addr) + + // E-bit Branch + if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; } + mVUsetupBranch(mVU, mFC); + + // Check if branch-block has already been compiled + blockCreate(branchAddr/8); + pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs); + if (pBlock) { xJMP(pBlock->x86ptrStart); } + else { mVUcompile(mVU, branchAddr, (uptr)&mVUregs); } +} + +void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) { + using namespace x86Emitter; + mVUprint("mVUcompile JR/JALR"); + incPC(-3); // Go back to jump opcode + + if (mVUlow.constJump.isValid) { + if (mVUup.eBit) { // E-bit Jump + iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1); + mVUendProgram(mVU, &mFC, 1); + } + else { + int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8); + mVUsetupBranch(mVU, mFC); + // Check if jump-to-block has already been compiled + blockCreate(jumpAddr/8); + pBlock = mVUblocks[jumpAddr/8]->search((microRegInfo*)&mVUregs); + if (pBlock) { xJMP(pBlock->x86ptrStart); } + else { mVUcompile(mVU, jumpAddr, (uptr)&mVUregs); } + } + return; + } + + if (mVUup.eBit) { // E-bit Jump + mVUendProgram(mVU, &mFC, 2); + MOV32MtoR(gprT1, (uptr)&mVU->branch); + MOV32RtoM((uptr)&mVU->regs->VI[REG_TPC].UL, gprT1); + xJMP(mVU->exitFunct); + return; + } + + memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); + mVUsetupBranch(mVU, mFC); + + mVUbackupRegs(mVU); + MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX first argument for __fastcall) + MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX second argument for __fastcall) + + if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState) + else xCALL(mVUcompileJIT<1>); + mVUrestoreRegs(mVU); + JMPR(gprT1); // Jump to rec-code address +} diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index d19c546733..3013f1e60c 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -22,23 +22,6 @@ // Helper Macros //------------------------------------------------------------------ -#define branchCase(JMPcond) branchCaseFunct(mVU, bBlock, xStatus, xMac, xClip, xCycles, ajmp, JMPcond); break - -#define branchWarning() { \ - if (mVUbranch) { \ - Console::Error("microVU%d Warning: Branch in E-bit/Branch delay slot! [%04x]", params mVU->index, xPC); \ - mVUlow.isNOP = 1; \ - } \ -} - -#define startLoop() { \ - if (curI & _Mbit_) { Console::Status("microVU%d: M-bit set!", params getIndex); } \ - if (curI & _Dbit_) { DevCon::Status ("microVU%d: D-bit set!", params getIndex); } \ - if (curI & _Tbit_) { DevCon::Status ("microVU%d: T-bit set!", params getIndex); } \ - memset(&mVUinfo, 0, sizeof(mVUinfo)); \ - memset(&mVUregsTemp, 0, sizeof(mVUregsTemp)); \ -} - #define calcCycles(reg, x) { reg = ((reg > x) ? (reg - x) : 0); } #define optimizeReg(rState) { rState = (rState==1) ? 0 : rState; } #define tCycles(dest, src) { dest = aMax(dest, src); } @@ -46,52 +29,11 @@ #define incQ() { mVU->q = (mVU->q+1) & 1; } #define doUpperOp() { mVUopU(mVU, 1); mVUdivSet(mVU); } #define doLowerOp() { incPC(-1); mVUopL(mVU, 1); incPC(1); } -#define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); } //------------------------------------------------------------------ // Helper Functions //------------------------------------------------------------------ -microVUt(void) doSwapOp(mV) { - if (mVUinfo.backupVF && !mVUlow.noWriteVF) { - DevCon::Status("microVU%d: Backing Up VF Reg [%04x]", params getIndex, xPC); - int t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg); - int t2 = mVU->regAlloc->allocReg(); - SSE_MOVAPS_XMM_to_XMM(t2, t1); - mVU->regAlloc->clearNeeded(t1); - mVUopL(mVU, 1); - t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg, mVUlow.VF_write.reg, 0xf, 0); - SSE_XORPS_XMM_to_XMM(t2, t1); - SSE_XORPS_XMM_to_XMM(t1, t2); - SSE_XORPS_XMM_to_XMM(t2, t1); - mVU->regAlloc->clearNeeded(t1); - incPC(1); - doUpperOp(); - t1 = mVU->regAlloc->allocReg(-1, mVUlow.VF_write.reg, 0xf); - SSE_MOVAPS_XMM_to_XMM(t1, t2); - mVU->regAlloc->clearNeeded(t1); - mVU->regAlloc->clearNeeded(t2); - } - else { mVUopL(mVU, 1); incPC(1); doUpperOp(); } -} - -microVUt(void) doIbit(microVU* mVU) { - if (mVUup.iBit) { - incPC(-1); - u32 tempI; - mVU->regAlloc->clearRegVF(33); - - if (CHECK_VU_OVERFLOW && ((curI & 0x7fffffff) >= 0x7f800000)) { - Console::Status("microVU%d: Clamping I Reg", params mVU->index); - tempI = (0x80000000 & curI) | 0x7f7fffff; // Clamp I Reg - } - else tempI = curI; - - MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, tempI); - incPC(1); - } -} - // Used by mVUsetupRange microVUt(void) mVUcheckIsSame(mV) { @@ -167,6 +109,61 @@ microVUt(void) mVUsetupRange(mV, s32 pc, bool isStartPC) { } } +microVUt(void) startLoop(mV) { + if (curI & _Mbit_) { Console::Status("microVU%d: M-bit set!", params getIndex); } + if (curI & _Dbit_) { DevCon::Status ("microVU%d: D-bit set!", params getIndex); } + if (curI & _Tbit_) { DevCon::Status ("microVU%d: T-bit set!", params getIndex); } + memset(&mVUinfo, 0, sizeof(mVUinfo)); + memset(&mVUregsTemp, 0, sizeof(mVUregsTemp)); +} + +microVUt(void) doIbit(mV) { + if (mVUup.iBit) { + incPC(-1); + u32 tempI; + mVU->regAlloc->clearRegVF(33); + + if (CHECK_VU_OVERFLOW && ((curI & 0x7fffffff) >= 0x7f800000)) { + Console::Status("microVU%d: Clamping I Reg", params mVU->index); + tempI = (0x80000000 & curI) | 0x7f7fffff; // Clamp I Reg + } + else tempI = curI; + + MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, tempI); + incPC(1); + } +} + +microVUt(void) doSwapOp(mV) { + if (mVUinfo.backupVF && !mVUlow.noWriteVF) { + DevCon::Status("microVU%d: Backing Up VF Reg [%04x]", params getIndex, xPC); + int t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg); + int t2 = mVU->regAlloc->allocReg(); + SSE_MOVAPS_XMM_to_XMM(t2, t1); + mVU->regAlloc->clearNeeded(t1); + mVUopL(mVU, 1); + t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg, mVUlow.VF_write.reg, 0xf, 0); + SSE_XORPS_XMM_to_XMM(t2, t1); + SSE_XORPS_XMM_to_XMM(t1, t2); + SSE_XORPS_XMM_to_XMM(t2, t1); + mVU->regAlloc->clearNeeded(t1); + incPC(1); + doUpperOp(); + t1 = mVU->regAlloc->allocReg(-1, mVUlow.VF_write.reg, 0xf); + SSE_MOVAPS_XMM_to_XMM(t1, t2); + mVU->regAlloc->clearNeeded(t1); + mVU->regAlloc->clearNeeded(t2); + } + else { mVUopL(mVU, 1); incPC(1); doUpperOp(); } +} + +microVUt(void) branchWarning(mV) { + if (mVUbranch) { + Console::Error("microVU%d Warning: Branch in E-bit/Branch delay slot! [%04x]", params mVU->index, xPC); + mVUlow.isNOP = 1; + } +} + // Optimizes the End Pipeline State Removing Unnecessary Info microVUt(void) mVUoptimizePipeState(mV) { for (int i = 0; i < 32; i++) { @@ -183,20 +180,6 @@ microVUt(void) mVUoptimizePipeState(mV) { mVUregs.r = 0; // There are no stalls on the R-reg, so its Safe to discard info } -// Recompiles Code for Proper Flags and Q/P regs on Block Linkings -microVUt(void) mVUsetupBranch(mV, int* xStatus, int* xMac, int* xClip, int xCycles) { - mVUprint("mVUsetupBranch"); - - // Flush Allocated Regs - mVU->regAlloc->flushAll(); - - // Shuffle Flag Instances - mVUsetupFlags(mVU, xStatus, xMac, xClip, xCycles); - - // Shuffle P/Q regs since every block starts at instance #0 - if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); } -} - microVUt(void) mVUincCycles(mV, int x) { mVUcycles += x; for (int z = 31; z > 0; z--) { @@ -269,87 +252,6 @@ microVUt(void) mVUsetCycles(mV) { tCycles(mVUregs.xgkick, mVUregsTemp.xgkick); } -#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3)) -#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3)) - -microVUt(void) mVUendProgram(mV, int isEbit, int* xStatus, int* xMac, int* xClip) { - - int fStatus = (isEbit) ? findFlagInst(xStatus, 0x7fffffff) : sI; - int fMac = (isEbit) ? findFlagInst(xMac, 0x7fffffff) : 0; - int fClip = (isEbit) ? findFlagInst(xClip, 0x7fffffff) : cI; - int qInst = 0; - int pInst = 0; - mVU->regAlloc->flushAll(); - - if (isEbit) { - mVUprint("mVUcompile ebit"); - memset(&mVUinfo, 0, sizeof(mVUinfo)); - memset(&mVUregsTemp, 0, sizeof(mVUregsTemp)); - mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0) - mVUcycles -= 100; - qInst = mVU->q; - pInst = mVU->p; - if (mVUinfo.doDivFlag) { - sFLAG.doFlag = 1; - sFLAG.write = fStatus; - mVUdivSet(mVU); - } - if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); } - } - - // Save P/Q Regs - if (qInst) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, 0xe5); } - SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_Q].UL, xmmPQ); - if (isVU1) { - SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, pInst ? 3 : 2); - SSE_MOVSS_XMM_to_M32((uptr)&mVU->regs->VI[REG_P].UL, xmmPQ); - } - - // Save Flag Instances - mVUallocSFLAGc(gprT1, gprT2, fStatus); - MOV32RtoM((uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL, gprT1); - mVUallocMFLAGa(mVU, gprT1, fMac); - mVUallocCFLAGa(mVU, gprT2, fClip); - MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL, gprT1); - MOV32RtoM((uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL, gprT2); - - if (isEbit || isVU1) { // Clear 'is busy' Flags - AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag - AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif - } - - if (isEbit != 2) { // Save PC, and Jump to Exit Point - MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC); - JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5)); - } -} - -void branchCaseFunct(mV, microBlock* &bBlock, int* xStatus, int* xMac, int* xClip, int &xCycles, s32* &ajmp, int JMPcc) { - using namespace x86Emitter; - mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles); - xCMP(ptr16[&mVU->branch], 0); - if (mVUup.eBit) { // Conditional Branch With E-Bit Set - mVUendProgram(mVU, 2, xStatus, xMac, xClip); - xForwardJump8 eJMP((JccComparisonType)JMPcc); - incPC(1); // Set PC to First instruction of Non-Taken Side - xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC); - xJMP(mVU->exitFunct); - eJMP.SetTarget(); - incPC(-4); // Go Back to Branch Opcode to get branchAddr - iPC = branchAddr/4; - xMOV(ptr32[&mVU->regs->VI[REG_TPC].UL], xPC); - xJMP(mVU->exitFunct); - } - else { // Normal Conditional Branch - incPC2(1); // Check if Branch Non-Taken Side has already been recompiled - blockCreate(iPC/2); - bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs); - incPC2(-1); - if (bBlock) { xJcc( xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart ); } - else { ajmp = xJcc32((JccComparisonType)JMPcc); } - } -} - void __fastcall mVUwarning0(u32 PC) { Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); } void __fastcall mVUwarning1(u32 PC) { Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); } void __fastcall mVUprintPC1(u32 PC) { Console::Write("Block PC [%04x] ", params PC); } @@ -365,12 +267,13 @@ microVUt(void) mVUtestCycles(mV) { if (isVU1) CALLFunc((uptr)mVUwarning1); //else CALLFunc((uptr)mVUwarning0); // VU0 is allowed early exit for COP2 Interlock Simulation MOV32ItoR(gprR, Roffset); // Restore gprR - mVUendProgram(mVU, 0, NULL, NULL, NULL); + mVUendProgram(mVU, NULL, 0); x86SetJ32(jmp32); } } -microVUt(void) mVUinitConstValues(mV) { +// Initialize VI Constants (vi15 propagates through blocks) +microVUt(void) mVUinitConstValues(microVU* mVU) { for (int i = 0; i < 16; i++) { mVUconstReg[i].isValid = 0; mVUconstReg[i].regValue = 0; @@ -379,6 +282,24 @@ microVUt(void) mVUinitConstValues(mV) { mVUconstReg[15].regValue = mVUconstReg[15].isValid ? (mVUregs.vi15&0xffff) : 0; } +// Initialize Variables +microVUt(void) mVUinitFirstPass(microVU* mVU, microBlock* &pBlock, uptr pState, u8* thisPtr) { + mVUstartPC = iPC; // Block Start PC + mVUbranch = 0; // Branch Type + mVUcount = 0; // Number of instructions ran + mVUcycles = 0; // Skips "M" phase, and starts counting cycles at "T" stage + mVU->p = 0; // All blocks start at p index #0 + mVU->q = 0; // All blocks start at q index #0 + memcpy_fast(&mVUregs, (microRegInfo*)pState, sizeof(microRegInfo)); // Loads up Pipeline State Info + mVUblock.x86ptrStart = thisPtr; + pBlock = mVUblocks[mVUstartPC/2]->add(&mVUblock); // Add this block to block manager + mVUpBlock = pBlock; + mVUregs.flags = 0; + mVUflagInfo = 0; + mVUsFlagHack = CHECK_VU_FLAGHACK; + mVUinitConstValues(mVU); +} + //------------------------------------------------------------------ // Recompiler //------------------------------------------------------------------ @@ -386,38 +307,20 @@ microVUt(void) mVUinitConstValues(mV) { microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { using namespace x86Emitter; - microBlock* pBlock = NULL; - u8* thisPtr = x86Ptr; - const u32 endCount = (mVU->microMemSize / 8) - 1; - - // Setup Program Bounds/Range - mVUsetupRange(mVU, startPC, 1); - - // Reset regAlloc - mVU->regAlloc->reset(); + microFlagCycles mFC; + microBlock* pBlock = NULL; + u8* thisPtr = x86Ptr; + const u32 endCount = (mVU->microMemSize / 8) - 1; // First Pass iPC = startPC / 4; - setCode(); - mVUbranch = 0; - mVUstartPC = iPC; - mVUcount = 0; - mVUcycles = 0; // Skips "M" phase, and starts counting cycles at "T" stage - mVU->p = 0; // All blocks start at p index #0 - mVU->q = 0; // All blocks start at q index #0 - memcpy_fast(&mVUregs, (microRegInfo*)pState, sizeof(microRegInfo)); // Loads up Pipeline State Info - mVUblock.x86ptrStart = thisPtr; - pBlock = mVUblocks[startPC/8]->add(&mVUblock); // Add this block to block manager - mVUpBlock = pBlock; - mVUregs.flags = 0; - mVUflagInfo = 0; - mVUsFlagHack = CHECK_VU_FLAGHACK; - - mVUinitConstValues(mVU); - + mVUsetupRange(mVU, startPC, 1); // Setup Program Bounds/Range + mVU->regAlloc->reset(); // Reset regAlloc + mVUinitFirstPass(mVU, pBlock, pState, thisPtr); + for (int branch = 0; mVUcount < endCount; mVUcount++) { incPC(1); - startLoop(); + startLoop(mVU); mVUincCycles(mVU, 1); mVUopU(mVU, 0); if (curI & _Ebit_) { branch = 1; mVUup.eBit = 1; } @@ -430,19 +333,16 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { mVUinfo.writeQ = !mVU->q; mVUinfo.readP = mVU->p; mVUinfo.writeP = !mVU->p; - if (branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(); break; } + if (branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; } else if (branch == 1) { branch = 2; } if (mVUbranch) { mVUsetFlagInfo(mVU); branch = 3; mVUbranch = 0; } incPC(1); } - // Sets Up Flag instances - int xStatus[4], xMac[4], xClip[4]; - int xCycles = mVUsetFlags(mVU, xStatus, xMac, xClip); - // Fix up vi15 const info for propagation through blocks mVUregs.vi15 = (mVUconstReg[15].isValid && !CHECK_VU_CONSTHACK) ? ((1<<31) | (mVUconstReg[15].regValue&0xffff)) : 0; - + + mVUsetFlags(mVU, mFC); // Sets Up Flag instances mVUoptimizePipeState(mVU); // Optimize the End Pipeline State for nicer Block Linking mVUtestCycles(mVU); // Update VU Cycles and Exit Early if Necessary @@ -450,8 +350,8 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { iPC = mVUstartPC; setCode(); mVUbranch = 0; - uint x; - for (x = 0; x < endCount; x++) { + u32 x = 0; + for (; x < endCount; x++) { if (mVUinfo.isEOB) { x = 0xffff; } if (mVUup.mBit) { OR32ItoM((uptr)&mVU->regs->flags, VUFLAG_MFLAGSET); } if (mVUlow.isNOP) { incPC(1); doUpperOp(); doIbit(mVU); } @@ -459,111 +359,27 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { else { doSwapOp(mVU); } if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); } if (!doRegAlloc) { mVU->regAlloc->flushAll(); } - - if (!mVUinfo.isBdelay) { incPC(1); } + if (!mVUinfo.isBdelay) { incPC(1); } else { - microBlock* bBlock = NULL; - s32* ajmp = 0; mVUsetupRange(mVU, xPC, 0); mVUdebugNOW(1); - switch (mVUbranch) { - case 3: branchCase(Jcc_Equal); // IBEQ - case 4: branchCase(Jcc_GreaterOrEqual); // IBGEZ - case 5: branchCase(Jcc_Greater); // IBGTZ - case 6: branchCase(Jcc_LessOrEqual); // IBLEQ - case 7: branchCase(Jcc_Less); // IBLTZ - case 8: branchCase(Jcc_NotEqual); // IBNEQ - case 1: case 2: // B/BAL - - mVUprint("mVUcompile B/BAL"); - incPC(-3); // Go back to branch opcode (to get branch imm addr) - - if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, 1, xStatus, xMac, xClip); } // E-bit Branch - mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles); - - // Check if branch-block has already been compiled - blockCreate(branchAddr/8); - pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs); - if (pBlock) { xJMP(pBlock->x86ptrStart); } - else { mVUcompile(mVU, branchAddr, (uptr)&mVUregs); } - return thisPtr; - case 9: case 10: // JR/JALR - - mVUprint("mVUcompile JR/JALR"); - incPC(-3); // Go back to jump opcode - - if (mVUlow.constJump.isValid) { - if (mVUup.eBit) { // E-bit Jump - iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1); - mVUendProgram(mVU, 1, xStatus, xMac, xClip); - } - else { - int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8); - mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles); - // Check if jump-to-block has already been compiled - blockCreate(jumpAddr/8); - pBlock = mVUblocks[jumpAddr/8]->search((microRegInfo*)&mVUregs); - if (pBlock) { xJMP(pBlock->x86ptrStart); } - else { mVUcompile(mVU, jumpAddr, (uptr)&mVUregs); } - } - return thisPtr; - } - - if (mVUup.eBit) { // E-bit Jump - mVUendProgram(mVU, 2, xStatus, xMac, xClip); - MOV32MtoR(gprT1, (uptr)&mVU->branch); - MOV32RtoM((uptr)&mVU->regs->VI[REG_TPC].UL, gprT1); - xJMP(mVU->exitFunct); - return thisPtr; - } - - memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); - mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles); - - mVUbackupRegs(mVU); - MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX first argument for __fastcall) - MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX second argument for __fastcall) - - if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState) - else xCALL(mVUcompileJIT<1>); - mVUrestoreRegs(mVU); - JMPR(gprT1); // Jump to rec-code address - return thisPtr; + case 3: condBranch(mVU, mFC, pBlock, Jcc_Equal); return thisPtr; // IBEQ + case 4: condBranch(mVU, mFC, pBlock, Jcc_GreaterOrEqual); return thisPtr; // IBGEZ + case 5: condBranch(mVU, mFC, pBlock, Jcc_Greater); return thisPtr; // IBGTZ + case 6: condBranch(mVU, mFC, pBlock, Jcc_LessOrEqual); return thisPtr; // IBLEQ + case 7: condBranch(mVU, mFC, pBlock, Jcc_Less); return thisPtr; // IBLTZ + case 8: condBranch(mVU, mFC, pBlock, Jcc_NotEqual); return thisPtr; // IBNEQ + case 1: case 2: normBranch(mVU, mFC); return thisPtr; // B/BAL + case 9: case 10: normJump (mVU, mFC, pBlock); return thisPtr; // JR/JALR } - // Conditional Branches - mVUprint("mVUcompile conditional branch"); - if (mVUup.eBit) return thisPtr; // Handled in Branch Case - if (bBlock) { // Branch non-taken has already been compiled - incPC(-3); // Go back to branch opcode (to get branch imm addr) - - // Check if branch-block has already been compiled - blockCreate(branchAddr/8); - pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs); - if (pBlock) { xJMP( pBlock->x86ptrStart ); } - else { mVUblockFetch(mVU, branchAddr, (uptr)&mVUregs); } - } - else { - uptr jumpAddr; - u32 bPC = iPC; // mVUcompile can modify iPC and mVUregs so back them up - memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); - - incPC2(1); // Get PC for branch not-taken - mVUcompile(mVU, xPC, (uptr)&mVUregs); - - iPC = bPC; - incPC(-3); // Go back to branch opcode (to get branch imm addr) - jumpAddr = (uptr)mVUblockFetch(mVU, branchAddr, (uptr)&pBlock->pStateEnd); - *ajmp = (jumpAddr - ((uptr)ajmp + 4)); - } - return thisPtr; } } if (x == endCount) { Console::Error("microVU%d: Possible infinite compiling loop!", params mVU->index); } // E-bit End mVUsetupRange(mVU, xPC-8, 0); - mVUendProgram(mVU, 1, xStatus, xMac, xClip); + mVUendProgram(mVU, &mFC, 1); return thisPtr; } @@ -584,4 +400,3 @@ microVUt(void*) mVUblockFetch(microVU* mVU, u32 startPC, uptr pState) { microVUx(void*) __fastcall mVUcompileJIT(u32 startPC, uptr pState) { return mVUblockFetch(mVUx, startPC, pState); } - diff --git a/pcsx2/x86/microVU_Flags.inl b/pcsx2/x86/microVU_Flags.inl index 4abc004193..2f83c5e701 100644 --- a/pcsx2/x86/microVU_Flags.inl +++ b/pcsx2/x86/microVU_Flags.inl @@ -77,7 +77,7 @@ int sortFlag(int* fFlag, int* bFlag, int cycles) { #define sFlagCond ((sFLAG.doFlag && !mVUsFlagHack) || mVUlow.isFSSET || mVUinfo.doDivFlag) // Note: Flag handling is 'very' complex, it requires full knowledge of how microVU recs work, so don't touch! -microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) { +microVUt(void) mVUsetFlags(mV, microFlagCycles& mFC) { int endPC = iPC; u32 aCount = 1; // Amount of instructions needed to get valid mac flag instances for block linking @@ -95,31 +95,31 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) { // Status/Mac Flags Setup Code int xS = 0, xM = 0, xC = 0; for (int i = 0; i < 4; i++) { - xStatus[i] = i; - xMac [i] = i; - xClip [i] = i; + mFC.xStatus[i] = i; + mFC.xMac [i] = i; + mFC.xClip [i] = i; } if (!(mVUpBlock->pState.needExactMatch & 0x00f)) { xS = (mVUpBlock->pState.flags >> 0) & 3; - xStatus[0] = -1; xStatus[1] = -1; - xStatus[2] = -1; xStatus[3] = -1; - xStatus[(xS-1)&3] = 0; + mFC.xStatus[0] = -1; mFC.xStatus[1] = -1; + mFC.xStatus[2] = -1; mFC.xStatus[3] = -1; + mFC.xStatus[(xS-1)&3] = 0; } if (!(mVUpBlock->pState.needExactMatch & 0xf00)) { xC = (mVUpBlock->pState.flags >> 2) & 3; - xClip[0] = -1; xClip[1] = -1; - xClip[2] = -1; xClip[3] = -1; - xClip[(xC-1)&3] = 0; + mFC.xClip[0] = -1; mFC.xClip[1] = -1; + mFC.xClip[2] = -1; mFC.xClip[3] = -1; + mFC.xClip[(xC-1)&3] = 0; } if (!(mVUpBlock->pState.needExactMatch & 0x0f0)) { - xMac[0] = -1; xMac[1] = -1; - xMac[2] = -1; xMac[3] = -1; + mFC.xMac[0] = -1; mFC.xMac[1] = -1; + mFC.xMac[2] = -1; mFC.xMac[3] = -1; } - int cycles = 0; + mFC.cycles = 0; u32 xCount = mVUcount; // Backup count iPC = mVUstartPC; for (mVUcount = 0; mVUcount < xCount; mVUcount++) { @@ -129,11 +129,11 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) { } else mVUstatusFlagOp(mVU); } - cycles += mVUstall; + mFC.cycles += mVUstall; - sFLAG.read = findFlagInst(xStatus, cycles); - mFLAG.read = findFlagInst(xMac, cycles); - cFLAG.read = findFlagInst(xClip, cycles); + sFLAG.read = findFlagInst(mFC.xStatus, mFC.cycles); + mFLAG.read = findFlagInst(mFC.xMac, mFC.cycles); + cFLAG.read = findFlagInst(mFC.xClip, mFC.cycles); sFLAG.write = xS; mFLAG.write = xM; @@ -143,17 +143,16 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) { mFLAG.lastWrite = (xM-1) & 3; cFLAG.lastWrite = (xC-1) & 3; - if (sFlagCond) { xStatus[xS] = cycles + 4; xS = (xS+1) & 3; } - if (mFLAG.doFlag) { xMac [xM] = cycles + 4; xM = (xM+1) & 3; } - if (cFLAG.doFlag) { xClip [xC] = cycles + 4; xC = (xC+1) & 3; } + if (sFlagCond) { mFC.xStatus[xS] = mFC.cycles + 4; xS = (xS+1) & 3; } + if (mFLAG.doFlag) { mFC.xMac [xM] = mFC.cycles + 4; xM = (xM+1) & 3; } + if (cFLAG.doFlag) { mFC.xClip [xC] = mFC.cycles + 4; xC = (xC+1) & 3; } - cycles++; + mFC.cycles++; incPC2(2); } mVUregs.flags = ((__Clip) ? 0 : (xC << 2)) | ((__Status) ? 0 : xS); iPC = endPC; - return cycles; } #define getFlagReg1(x) ((x == 3) ? gprF3 : ((x == 2) ? gprF2 : ((x == 1) ? gprF1 : gprF0))) @@ -164,11 +163,11 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) { #define shuffleClip ((bClip[3]<<6)|(bClip[2]<<4)|(bClip[1]<<2)|bClip[0]) // Recompiles Code for Proper Flags on Block Linkings -microVUt(void) mVUsetupFlags(mV, int* xStatus, int* xMac, int* xClip, int cycles) { +microVUt(void) mVUsetupFlags(mV, microFlagCycles& mFC) { if (__Status) { int bStatus[4]; - int sortRegs = sortFlag(xStatus, bStatus, cycles); + int sortRegs = sortFlag(mFC.xStatus, bStatus, mFC.cycles); // DevCon::Status("sortRegs = %d", params sortRegs); // Note: Emitter will optimize out mov(reg1, reg1) cases... if (sortRegs == 1) { @@ -207,7 +206,7 @@ microVUt(void) mVUsetupFlags(mV, int* xStatus, int* xMac, int* xClip, int cycles if (__Mac) { int bMac[4]; - sortFlag(xMac, bMac, cycles); + sortFlag(mFC.xMac, bMac, mFC.cycles); SSE_MOVAPS_M128_to_XMM(xmmT1, (uptr)mVU->macFlag); SSE_SHUFPS_XMM_to_XMM (xmmT1, xmmT1, shuffleMac); SSE_MOVAPS_XMM_to_M128((uptr)mVU->macFlag, xmmT1); @@ -215,7 +214,7 @@ microVUt(void) mVUsetupFlags(mV, int* xStatus, int* xMac, int* xClip, int cycles if (__Clip) { int bClip[4]; - sortFlag(xClip, bClip, cycles); + sortFlag(mFC.xClip, bClip, mFC.cycles); SSE_MOVAPS_M128_to_XMM(xmmT2, (uptr)mVU->clipFlag); SSE_SHUFPS_XMM_to_XMM (xmmT2, xmmT2, shuffleClip); SSE_MOVAPS_XMM_to_M128((uptr)mVU->clipFlag, xmmT2); diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index f8faadd5ca..872dce21d9 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -122,6 +122,13 @@ struct microFlagInst { u8 read; // Points to the instance that should be read by a lower instruction (t-stage read) }; +struct microFlagCycles { + int xStatus[4]; + int xMac[4]; + int xClip[4]; + int cycles; +}; + struct microOp { u8 stall; // Info on how much current instruction stalled bool isEOB; // Cur Instruction is last instruction in block (End of Block) From 5ce6df15bc9ac64885c4a42e9cfff85882ee0dac Mon Sep 17 00:00:00 2001 From: arcum42 Date: Fri, 14 Aug 2009 10:24:23 +0000 Subject: [PATCH 18/50] Added some tag code in I was fiddling with. (Nothing uses it yet. I mainly wanted a backup of what I was working on.) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1622 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Makefile.am | 2 +- pcsx2/MemoryCard.h | 20 ++ pcsx2/Tags.h | 225 +++++++++++++++++++++ pcsx2/windows/VCprojects/pcsx2.vcxproj | 1 + pcsx2/windows/VCprojects/pcsx2_2008.vcproj | 4 + 5 files changed, 251 insertions(+), 1 deletion(-) create mode 100644 pcsx2/Tags.h diff --git a/pcsx2/Makefile.am b/pcsx2/Makefile.am index 04a0bf84a9..09ff7a821d 100644 --- a/pcsx2/Makefile.am +++ b/pcsx2/Makefile.am @@ -38,7 +38,7 @@ Hw.h IopMem.h Misc.h R5900.h SaveState.h Th Dump.h IopBios.h IopSio2.h NakedAsm.h R5900Exceptions.h Sif.h VU.h vtlb.h \ COP0.h Elfheader.h IopBios2.h Mdec.h Patch.h R5900OpcodeTables.h Sifcmd.h VUflags.h \ Cache.h Exceptions.h IopCommon.h MemcpyFast.h Paths.h Sio.h Sio_internal.h VUmicro.h \ -GS.h IopCounters.h Memory.h Plugins.h SPR.h Stats.h VUops.h +GS.h IopCounters.h Memory.h Plugins.h SPR.h Stats.h VUops.h Tags.h #RedtapeWindows.h SUBDIRS = x86 . CDVD DebugTools IPU RDebug tinyxml Linux \ No newline at end of file diff --git a/pcsx2/MemoryCard.h b/pcsx2/MemoryCard.h index a098e1f2ad..eb3c773f8b 100644 --- a/pcsx2/MemoryCard.h +++ b/pcsx2/MemoryCard.h @@ -45,6 +45,26 @@ public: static u64 GetCRC( uint mcdId ); }; +struct superblock +{ + char magic[28]; // 0x00 + char version[12]; // 0x1c + u16 page_len; // 0x28 + u16 pages_per_cluster; // 0x2a + u16 pages_per_block; // 0x2c + u16 unused; // 0x2e + u32 clusters_per_card; // 0x30 + u32 alloc_offset; // 0x34 + u32 alloc_end; // 0x38 + u32 rootdir_cluster; // 0x3c + u32 backup_block1; // 0x40 + u32 backup_block2; // 0x44 + u32 ifc_list[32]; // 0x50 + u32 bad_block_list[32]; // 0xd0 + u8 card_type; // 0x150 + u8 card_flags; // 0x151 +}; + #if 0 // unused code? struct McdBlock { diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h new file mode 100644 index 0000000000..5be98ea2fa --- /dev/null +++ b/pcsx2/Tags.h @@ -0,0 +1,225 @@ +/* Pcsx2 - Pc Ps2 Emulator + * Copyright (C) 2002-2009 Pcsx2 Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + */ + +// This is meant to be a collection of generic functions dealing with tags. +// I kept seeing the same code over and over with different structure names +// and the same members, and figured it'd be a good spot to use templates... + +enum TransferMode +{ + NORMAL_MODE = 0, + CHAIN_MODE, + INTERLEAVE_MODE, + UNDEFINED_MODE +}; + +// Transfer a tag. +template +static __forceinline bool TransferTag(const char *s, T tag, u32* &ptag) +{ + if (ptag == NULL) // Is ptag empty? + { + Console::Error("%s BUSERR", params s); + tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); // Transfer upper part of tag to CHCR bits 31-15 + psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; // Set BEIS (BUSERR) in DMAC_STAT register + return false; + } + else + { + tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + tag->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag + return true; + } +} + +enum pce_values +{ + PCE_NOTHING = 0, + PCE_RESERVED, + PCE_DISABLED, + PCE_ENABLED +}; + +enum tag_id +{ + TAG_REFE = 0, + TAG_CNT, + TAG_NEXT, + TAG_REF, + TAG_REFS, + TAG_CALL, + TAG_RET, + TAG_END +}; + +namespace ChainTags +{ + // Untested + static __forceinline u16 QWC(u32 *tag) + { + return (tag[0] & 0xffff); + } + + // Untested + static __forceinline pce_values PCE(u32 *tag) + { + u8 temp = 0; + if (tag[0] & (1 << 22)) temp |= (1 << 0); + if (tag[0] & (1 << 23)) temp |= (1 << 1); + return (pce_values)temp; + } + + static __forceinline tag_id Id(u32* &tag) + { + u8 temp = 0; + if (tag[0] & (1 << 28)) temp |= (1 << 0); + if (tag[0] & (1 << 29)) temp |= (1 << 1); + if (tag[0] & (1 << 30)) temp |= (1 << 2); + return (tag_id)temp; + } + + static __forceinline bool IRQ(u32 *tag) + { + return (tag[0] & 0x8000000); + } +} + +enum chcr_flags +{ + CHCR_DIR = 0x0, + CHCR_MOD1 = 0x4, + CHCR_MOD2 = 0x8, + CHCR_ASP1 = 0x10, + CHCR_ASP2 = 0x20, + CHCR_TTE = 0x40, + CHCR_TIE = 0x80, + CHCR_STR = 0x100 +}; + +namespace CHCR +{ + // Query the flags in the channel control register. + template + static __forceinline bool STR(T tag) { return (tag->chcr & CHCR_STR); } + + template + static __forceinline bool TIE(T tag) { return (tag->chcr & CHCR_TIE); } + + template + static __forceinline bool TTE(T tag) { return (tag->chcr & CHCR_TTE); } + + template + static __forceinline u8 DIR(T tag) { return (tag->chcr & CHCR_DIR); } + + template + static __forceinline TransferMode MOD(T tag) + { + u8 temp = 0; + if (tag->chcr & CHCR_MOD1) temp |= (1 << 0); + if (tag->chcr & CHCR_MOD2) temp |= (1 << 1); + return (TransferMode)temp; + } + + template + static __forceinline u8 ASP(T tag) + { + u8 temp = 0; + if (tag->chcr & CHCR_ASP1) temp |= (1 << 0); + if (tag->chcr & CHCR_ASP2) temp |= (1 << 1); + return temp; + } + + // Set the individual flags. Untested. + template + static __forceinline void setSTR(T tag) { tag->chcr &= ~CHCR_STR; } + + template + static __forceinline void setTIE(T tag) { tag->chcr &= ~CHCR_TIE; } + + template + static __forceinline void setTTE(T tag) { tag->chcr &= ~CHCR_TTE; } + + template + static __forceinline void setDIR(T tag) { tag->chcr &= ~CHCR_DIR; } + + template + static __forceinline void setMOD(T tag, TransferMode mode) + { + if (mode & (1 << 0)) + tag->chcr |= CHCR_MOD1; + else + tag->chcr &= CHCR_MOD1; + + if (mode & (1 << 1)) + tag->chcr |= CHCR_MOD2; + else + tag->chcr &= CHCR_MOD2; + } + + template + static __forceinline void ASP(T tag, u8 num) + { + if (num & (1 << 0)) + tag->chcr |= CHCR_ASP1; + else + tag->chcr &= CHCR_ASP2; + + if (num & (1 << 1)) + tag->chcr |= CHCR_ASP1; + else + tag->chcr &= CHCR_ASP2; + } + + // Clear them. Untested. + template + static __forceinline void clearSTR(T tag) { tag->chcr |= CHCR_STR; } + + template + static __forceinline void clearTIE(T tag) { tag->chcr |= CHCR_TIE; } + + template + static __forceinline void clearTTE(T tag) { tag->chcr |= CHCR_TTE; } + + template + static __forceinline void clearDIR(T tag) { tag->chcr |= CHCR_DIR; } + + // Print information about a chcr tag. + template + static __forceinline void Print(const char* s, T tag) + { + u8 num_addr = ASP(tag); + TransferMode mode = MOD(tag); + + Console::Write("%s chcr %s mem: ", params s, (DIR(tag)) ? "from" : "to"); + + if (mode == NORMAL_MODE) + Console::Write(" normal mode; "); + else if (mode == CHAIN_MODE) + Console::Write(" chain mode; "); + else if (mode == INTERLEAVE_MODE) + Console::Write(" interleave mode; "); + else + Console::Write(" ?? mode; "); + + if (num_addr != 0) Console::Write("ASP = %d;", params num_addr); + if (TTE(tag)) Console::Write("TTE;"); + if (TIE(tag)) Console::Write("TIE;"); + if (STR(tag)) Console::Write(" (DMA started)."); else Console::Write(" (DMA stopped)."); + Console::WriteLn(""); + } +} \ No newline at end of file diff --git a/pcsx2/windows/VCprojects/pcsx2.vcxproj b/pcsx2/windows/VCprojects/pcsx2.vcxproj index cb3b4fd246..f640abdb8e 100644 --- a/pcsx2/windows/VCprojects/pcsx2.vcxproj +++ b/pcsx2/windows/VCprojects/pcsx2.vcxproj @@ -649,6 +649,7 @@ + diff --git a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj index a300c0fd7d..aa560711a1 100644 --- a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj +++ b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj @@ -2467,6 +2467,10 @@ RelativePath="..\..\System.h" > + + From fb3f07b2d6bc8eef6485dcf0f855fbc172a2d539 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sat, 15 Aug 2009 04:37:01 +0000 Subject: [PATCH 19/50] Link in Tags.h, use one of my new enums in various places, and move some code in IPU.h to a new function of it's own. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1623 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Gif.cpp | 16 ++++---- pcsx2/Hw.cpp | 29 ++++++++------- pcsx2/IPU/IPU.cpp | 93 +++++++++++++++++++++++++++-------------------- pcsx2/Sif.cpp | 13 ++++--- pcsx2/Tags.h | 13 ++----- pcsx2/Vif.cpp | 13 ++++--- 6 files changed, 93 insertions(+), 84 deletions(-) diff --git a/pcsx2/Gif.cpp b/pcsx2/Gif.cpp index 5f531da3e9..7fb313a331 100644 --- a/pcsx2/Gif.cpp +++ b/pcsx2/Gif.cpp @@ -25,6 +25,7 @@ #include "Counters.h" #include "VifDma.h" +#include "Tags.h" using std::min; @@ -43,8 +44,7 @@ static int gifstate = GIF_STATE_READY; //static u64 s_gstag = 0; // used for querying the last tag -// This should be a bool, as should the return value of hwDmacSrcChainWithStack. -// Next time I feel like breaking the save state, it will be. --arcum42 +// This should be a bool. Next time I feel like breaking the save state, it will be. --arcum42 static int gspath3done = 0; static u32 gscycles = 0, prevcycles = 0, mfifocycles = 0; @@ -491,31 +491,31 @@ void mfifoGIFtransfer(int qwc) gifqwc--; switch (id) { - case 0: // Refe - Transfer Packet According to ADDR field + case TAG_REFE: // Refe - Transfer Packet According to ADDR field gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); gifstate = GIF_STATE_DONE; //End Transfer break; - case 1: // CNT - Transfer QWC following the tag. + case TAG_CNT: // CNT - Transfer QWC following the tag. gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW after Tag gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data gifstate = GIF_STATE_READY; break; - case 2: // Next - Transfer QWC following tag. TADR = ADDR + case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR temp = gif->madr; //Temporarily Store ADDR gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW following the tag gif->tadr = temp; //Copy temporarily stored ADDR to Tag gifstate = GIF_STATE_READY; break; - case 3: // Ref - Transfer QWC from ADDR field - case 4: // Refs - Transfer QWC from ADDR field (Stall Control) + case TAG_REF: // Ref - Transfer QWC from ADDR field + case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set TADR to next tag gifstate = GIF_STATE_READY; break; - case 7: // End - Transfer QWC following the tag + case TAG_END: // End - Transfer QWC following the tag gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to data following the tag gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data gifstate = GIF_STATE_DONE; //End Transfer diff --git a/pcsx2/Hw.cpp b/pcsx2/Hw.cpp index 7d3f740e8e..fc3e1ccdd1 100644 --- a/pcsx2/Hw.cpp +++ b/pcsx2/Hw.cpp @@ -32,6 +32,7 @@ #include "VifDma.h" #include "SPR.h" #include "Sif.h" +#include "Tags.h" using namespace R5900; @@ -150,27 +151,27 @@ bool hwMFIFOWrite(u32 addr, u8 *data, u32 size) { bool hwDmacSrcChainWithStack(DMACh *dma, int id) { switch (id) { - case 0: // Refe - Transfer Packet According to ADDR field + case TAG_REFE: // Refe - Transfer Packet According to ADDR field return true; //End Transfer - case 1: // CNT - Transfer QWC following the tag. + case TAG_CNT: // CNT - Transfer QWC following the tag. dma->madr = dma->tadr + 16; //Set MADR to QW after Tag dma->tadr = dma->madr + (dma->qwc << 4); //Set TADR to QW following the data return false; - case 2: // Next - Transfer QWC following tag. TADR = ADDR + case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR { u32 temp = dma->madr; //Temporarily Store ADDR dma->madr = dma->tadr + 16; //Set MADR to QW following the tag dma->tadr = temp; //Copy temporarily stored ADDR to Tag return false; } - case 3: // Ref - Transfer QWC from ADDR field - case 4: // Refs - Transfer QWC from ADDR field (Stall Control) + case TAG_REF: // Ref - Transfer QWC from ADDR field + case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) dma->tadr += 16; //Set TADR to next tag return false; - case 5: // Call - Transfer QWC following the tag, save succeeding tag + case TAG_CALL: // Call - Transfer QWC following the tag, save succeeding tag { u32 temp = dma->madr; //Temporarily Store ADDR @@ -191,7 +192,7 @@ bool hwDmacSrcChainWithStack(DMACh *dma, int id) { return false; } - case 6: // Ret - Transfer QWC following the tag, load next tag + case TAG_RET: // Ret - Transfer QWC following the tag, load next tag dma->madr = dma->tadr + 16; //Set MADR to data following the tag if ((dma->chcr & 0x30) == 0x20) { //If ASR1 is NOT equal to 0 (Contains address) @@ -211,7 +212,7 @@ bool hwDmacSrcChainWithStack(DMACh *dma, int id) { } return false; - case 7: // End - Transfer QWC following the tag + case TAG_END: // End - Transfer QWC following the tag dma->madr = dma->tadr + 16; //Set MADR to data following the tag //Dont Increment tadr, breaks Soul Calibur II and III return true; //End Transfer @@ -224,26 +225,26 @@ bool hwDmacSrcChain(DMACh *dma, int id) { u32 temp; switch (id) { - case 0: // Refe - Transfer Packet According to ADDR field + case TAG_REFE: // Refe - Transfer Packet According to ADDR field return true; //End Transfer - case 1: // CNT - Transfer QWC following the tag. + case TAG_CNT: // CNT - Transfer QWC following the tag. dma->madr = dma->tadr + 16; //Set MADR to QW after Tag dma->tadr = dma->madr + (dma->qwc << 4); //Set TADR to QW following the data return false; - case 2: // Next - Transfer QWC following tag. TADR = ADDR + case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR temp = dma->madr; //Temporarily Store ADDR dma->madr = dma->tadr + 16; //Set MADR to QW following the tag dma->tadr = temp; //Copy temporarily stored ADDR to Tag return false; - case 3: // Ref - Transfer QWC from ADDR field - case 4: // Refs - Transfer QWC from ADDR field (Stall Control) + case TAG_REF: // Ref - Transfer QWC from ADDR field + case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) dma->tadr += 16; //Set TADR to next tag return false; - case 7: // End - Transfer QWC following the tag + case TAG_END: // End - Transfer QWC following the tag dma->madr = dma->tadr + 16; //Set MADR to data following the tag //Dont Increment tadr, breaks Soul Calibur II and III return true; //End Transfer diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index 4adf2495f2..91d57e28ef 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -26,6 +26,7 @@ #include "coroutine.h" #include "Vif.h" +#include "Tags.h" using namespace std; // for min / max @@ -1392,15 +1393,18 @@ static __forceinline bool IPU1chain(u32* &pMem, int &totalqwc) return false; } +// Remind me to give this a better name. --arcum42 static __forceinline bool IncreaseTadr(u32 tag) { - switch (tag & 0x70000000) + u32 id = (tag >> 28) & 0x7; + + switch (id) { - case 0x00000000: + case TAG_REFE: // refe ipu1dma->tadr += 16; return true; - case 0x70000000: + case TAG_END: // end ipu1dma->tadr = ipu1dma->madr; return true; } @@ -1409,6 +1413,48 @@ static __forceinline bool IncreaseTadr(u32 tag) extern void gsInterrupt(); +static __forceinline bool ipuDmacSrcChain(DMACh *tag, u32 *ptag) +{ + u32 id = (ptag[0] >> 28) & 0x7; + + switch (id) + { + case TAG_REFE: // refe + // do not change tadr + tag->madr = ptag[1]; + return true; + break; + + case TAG_CNT: // cnt + tag->madr = tag->tadr + 16; + // Set the taddr to the next tag + tag->tadr += 16 + (tag->qwc << 4); + break; + + case TAG_NEXT: // next + tag->madr = tag->tadr + 16; + tag->tadr = ptag[1]; + break; + + case TAG_REF: // ref + tag->madr = ptag[1]; + tag->tadr += 16; + break; + + case TAG_END: // end + // do not change tadr + tag->madr = tag->tadr + 16; + return true; + break; + + default: + Console::Error("IPU ERROR: different transfer mode!, Please report to PCSX2 Team"); + break; + } + + return false; +} + int IPU1dma() { u32 *ptag, *pMem; @@ -1421,7 +1467,7 @@ int IPU1dma() if (!(ipu1dma->chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_TO_IPU))) return 0; assert(!(g_nDMATransfer & IPU_DMA_TIE1)); - + //We need to make sure GIF has flushed before sending IPU data, it seems to REALLY screw FFX videos while(gif->chcr & 0x100 && vif1Regs->mskpath3 == 0) { @@ -1509,41 +1555,8 @@ int IPU1dma() ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 ipu1dma->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag - - switch (ptag[0] & 0x70000000) - { - case 0x00000000: // refe - // do not change tadr - ipu1dma->madr = ptag[1]; - done = TRUE; - break; - - case 0x10000000: // cnt - ipu1dma->madr = ipu1dma->tadr + 16; - // Set the taddr to the next tag - ipu1dma->tadr += 16 + (ipu1dma->qwc << 4); - break; - - case 0x20000000: // next - ipu1dma->madr = ipu1dma->tadr + 16; - ipu1dma->tadr = ptag[1]; - break; - - case 0x30000000: // ref - ipu1dma->madr = ptag[1]; - ipu1dma->tadr += 16; - break; - - case 0x70000000: // end - // do not change tadr - ipu1dma->madr = ipu1dma->tadr + 16; - done = TRUE; - break; - - default: - Console::Error("IPU ERROR: different transfer mode!, Please report to PCSX2 Team"); - break; - } + + done = ipuDmacSrcChain(ipu1dma, ptag); IPU_LOG("dmaIPU1 dmaChain %8.8x_%8.8x size=%d, addr=%lx, fifosize=%x", ptag[1], ptag[0], ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); @@ -1555,7 +1568,7 @@ int IPU1dma() if (ipu1dma->qwc == 0) { - //if ((ipu1dma->chcr & 0x80) && (ptag[0] & 0x80000000)) //Check TIE bit of CHCR and IRQ bit of tag + //Check TIE bit of CHCR and IRQ bit of tag if (g_nDMATransfer & IPU_DMA_DOTIE1) { Console::WriteLn("IPU1 TIE"); diff --git a/pcsx2/Sif.cpp b/pcsx2/Sif.cpp index d6b9469d9d..703cadc327 100644 --- a/pcsx2/Sif.cpp +++ b/pcsx2/Sif.cpp @@ -22,6 +22,7 @@ #include "IopCommon.h" #include "Sifcmd.h" +#include "Tags.h" using namespace std; @@ -305,33 +306,33 @@ __forceinline void SIF1Dma() switch (id) { - case 0: // refe + case TAG_REFE: // refe SIF_LOG(" REFE %08X", ptag[1]); sif1.end = 1; sif1dma->madr = ptag[1]; sif1dma->tadr += 16; break; - case 1: // cnt + case TAG_CNT: // cnt SIF_LOG(" CNT"); sif1dma->madr = sif1dma->tadr + 16; sif1dma->tadr = sif1dma->madr + (sif1dma->qwc << 4); break; - case 2: // next + case TAG_NEXT: // next SIF_LOG(" NEXT %08X", ptag[1]); sif1dma->madr = sif1dma->tadr + 16; sif1dma->tadr = ptag[1]; break; - case 3: // ref - case 4: // refs + case TAG_REF: // ref + case TAG_REFS: // refs SIF_LOG(" REF %08X", ptag[1]); sif1dma->madr = ptag[1]; sif1dma->tadr += 16; break; - case 7: // end + case TAG_END: // end SIF_LOG(" END"); sif1.end = 1; sif1dma->madr = sif1dma->tadr + 16; diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 5be98ea2fa..1cbb86f359 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -78,19 +78,12 @@ namespace ChainTags // Untested static __forceinline pce_values PCE(u32 *tag) { - u8 temp = 0; - if (tag[0] & (1 << 22)) temp |= (1 << 0); - if (tag[0] & (1 << 23)) temp |= (1 << 1); - return (pce_values)temp; + return (pce_values)((tag[0] >> 22) & 0x3); } - static __forceinline tag_id Id(u32* &tag) + static __forceinline tag_id Id(u32* tag) { - u8 temp = 0; - if (tag[0] & (1 << 28)) temp |= (1 << 0); - if (tag[0] & (1 << 29)) temp |= (1 << 1); - if (tag[0] & (1 << 30)) temp |= (1 << 2); - return (tag_id)temp; + return (tag_id)((tag[0] >> 28) & 0x7); } static __forceinline bool IRQ(u32 *tag) diff --git a/pcsx2/Vif.cpp b/pcsx2/Vif.cpp index 714560e814..3f38cc471a 100644 --- a/pcsx2/Vif.cpp +++ b/pcsx2/Vif.cpp @@ -24,6 +24,7 @@ #include "VUmicro.h" #include "Vif.h" #include "VifDma.h" +#include "Tags.h" VIFregisters *vifRegs; u32* vifRow = NULL; @@ -479,18 +480,18 @@ void mfifoVIF1transfer(int qwc) switch (id) { - case 0: // Refe - Transfer Packet According to ADDR field + case TAG_REFE: // Refe - Transfer Packet According to ADDR field vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); vif1.done = true; //End Transfer break; - case 1: // CNT - Transfer QWC following the tag. + case TAG_CNT: // CNT - Transfer QWC following the tag. vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW after Tag vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data vif1.done = false; break; - case 2: // Next - Transfer QWC following tag. TADR = ADDR + case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR { int temp = vif1ch->madr; //Temporarily Store ADDR vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW following the tag @@ -500,13 +501,13 @@ void mfifoVIF1transfer(int qwc) break; } - case 3: // Ref - Transfer QWC from ADDR field - case 4: // Refs - Transfer QWC from ADDR field (Stall Control) + case TAG_REF: // Ref - Transfer QWC from ADDR field + case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control) vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set TADR to next tag vif1.done = false; break; - case 7: // End - Transfer QWC following the tag + case TAG_END: // End - Transfer QWC following the tag vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to data following the tag vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data vif1.done = true; //End Transfer From b6cce7c560d393980fbbfc03cc380e8456a2c9b4 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sat, 15 Aug 2009 09:51:23 +0000 Subject: [PATCH 20/50] A bunch of IPU.cpp now uses Tags.h. Ironed out a few things in Tags.h. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1625 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/IPU/IPU.cpp | 110 ++++++++++++++++++++++++---------------------- pcsx2/Tags.h | 43 ++++++++++++------ 2 files changed, 87 insertions(+), 66 deletions(-) diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index 91d57e28ef..7e3f07c27b 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -37,7 +37,7 @@ using namespace std; // for min / max //#define IPU_INT0_FROM() CPU_INT( DMAC_FROM_IPU, 0 ) // IPU Inline'd IRQs : Calls the IPU interrupt handlers directly instead of -// feeding them through the EE's branch test. (see IPU.H for details) +// feeding them through the EE's branch test. (see IPU.h for details) #ifdef IPU_INLINE_IRQS # define IPU_INT_TO( cycles ) ipu1Interrupt() @@ -811,7 +811,7 @@ void IPUCMD_WRITE(u32 val) case SCE_IPU_FDEC: IPU_LOG("IPU FDEC command. Skip 0x%X bits, FIFO 0x%X qwords, BP 0x%X, FP %d, CHCR 0x%x, %x", - val & 0x3f, g_BP.IFC, (int)g_BP.BP, g_BP.FP, ((DMACh*)&PS2MEM_HW[0xb400])->chcr, cpuRegs.pc); + val & 0x3f, g_BP.IFC, (int)g_BP.BP, g_BP.FP, ipu1dma->chcr, cpuRegs.pc); g_BP.BP += val & 0x3F; if (ipuFDEC(val)) return; ipuRegs->cmd.BUSY = 0x80000000; @@ -840,7 +840,7 @@ void IPUCMD_WRITE(u32 val) if (ipuCSC(ipuRegs->cmd.DATA)) { - if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if (ipu0dma->qwc > 0 && (CHCR::STR(ipu0dma))) IPU_INT0_FROM(); return; } break; @@ -855,7 +855,7 @@ void IPUCMD_WRITE(u32 val) if (ipuIDEC(val)) { // idec done, ipu0 done too - if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if (ipu0dma->qwc > 0 && (CHCR::STR(ipu0dma))) IPU_INT0_FROM(); return; } ipuRegs->topbusy = 0x80000000; @@ -867,7 +867,7 @@ void IPUCMD_WRITE(u32 val) case SCE_IPU_BDEC: if (ipuBDEC(val)) { - if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if (ipu0dma->qwc > 0 && (CHCR::STR(ipu0dma))) IPU_INT0_FROM(); if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) hwIntcIrq(INTC_IPU); return; } @@ -931,7 +931,7 @@ void IPUWorker() hwIntcIrq(INTC_IPU); return; } - if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if ((ipu0dma->qwc > 0) && (CHCR::STR(ipu0dma))) IPU_INT0_FROM(); break; case SCE_IPU_PACK: @@ -957,7 +957,7 @@ void IPUWorker() ipuCurCmd = 0xffffffff; // CHECK!: IPU0dma remains when IDEC is done, so we need to clear it - if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if ((ipu0dma->qwc > 0) && (CHCR::STR(ipu0dma))) IPU_INT0_FROM(); s_routine = NULL; break; @@ -974,7 +974,7 @@ void IPUWorker() ipuRegs->cmd.BUSY = 0; ipuCurCmd = 0xffffffff; - if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if ((ipu0dma->qwc > 0) && (CHCR::STR(ipu0dma))) IPU_INT0_FROM(); s_routine = NULL; if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) hwIntcIrq(INTC_IPU); return; @@ -1328,6 +1328,7 @@ int FIFOto_read(void *value) // wait until enough data if (g_BP.IFC == 0) { + // This is the only spot that wants a return value for IPU1dma. if (IPU1dma() == 0) return 0; assert(g_BP.IFC > 0); } @@ -1365,11 +1366,12 @@ int FIFOto_write(u32* pMem, int size) return firsttrans; } -static __forceinline bool IPU1chain(u32* &pMem, int &totalqwc) +static __forceinline bool IPU1chain(int &totalqwc) { if (ipu1dma->qwc > 0) { int qwc = ipu1dma->qwc; + u32 *pMem; pMem = (u32*)dmaGetAddr(ipu1dma->madr); @@ -1455,33 +1457,37 @@ static __forceinline bool ipuDmacSrcChain(DMACh *tag, u32 *ptag) return false; } -int IPU1dma() +static __forceinline void flushGIF() { - u32 *ptag, *pMem; - bool done = FALSE; - int ipu1cycles = 0; - int totalqwc = 0; - - assert(!(ipu1dma->chcr & 0x40)); - - if (!(ipu1dma->chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_TO_IPU))) return 0; - - assert(!(g_nDMATransfer & IPU_DMA_TIE1)); - - //We need to make sure GIF has flushed before sending IPU data, it seems to REALLY screw FFX videos - while(gif->chcr & 0x100 && vif1Regs->mskpath3 == 0) + while(CHCR::STR(gif) && (vif1Regs->mskpath3 == 0)) { GIF_LOG("Flushing gif chcr %x tadr %x madr %x qwc %x", gif->chcr, gif->tadr, gif->madr, gif->qwc); gsInterrupt(); } +} + +int IPU1dma() +{ + u32 *ptag; + bool done = false; + int ipu1cycles = 0, totalqwc = 0; + + assert(!(CHCR::TTE(ipu1dma))); + + if (!(CHCR::STR(ipu1dma)) || (cpuRegs.interrupt & (1 << DMAC_TO_IPU))) return 0; + + assert(!(g_nDMATransfer & IPU_DMA_TIE1)); + + //We need to make sure GIF has flushed before sending IPU data, it seems to REALLY screw FFX videos + flushGIF(); // in kh, qwc == 0 when dma_actv1 is set if ((g_nDMATransfer & IPU_DMA_ACTV1) && ipu1dma->qwc > 0) { - if (IPU1chain(pMem, totalqwc)) return totalqwc; + if (IPU1chain(totalqwc)) return totalqwc; //Check TIE bit of CHCR and IRQ bit of tag - if ((ipu1dma->chcr & 0x80) && (g_nDMATransfer & IPU_DMA_DOTIE1)) + if (CHCR::TIE(ipu1dma) && (g_nDMATransfer & IPU_DMA_DOTIE1)) { Console::WriteLn("IPU1 TIE"); @@ -1491,22 +1497,24 @@ int IPU1dma() return totalqwc; } - if (!(ipu1dma->chcr & 0xc)) + if (CHCR::MOD(ipu1dma) == NORMAL_MODE) // If mode is normal mode. { IPU_INT_TO(totalqwc * BIAS); return totalqwc; } else { + // Chain mode. u32 tag = ipu1dma->chcr; // upper bits describe current tag - if ((ipu1dma->chcr & 0x80) && (tag & 0x80000000)) + if (CHCR::TIE(ipu1dma) && ChainTags::IRQ(tag)) { ptag = (u32*)dmaGetAddr(ipu1dma->tadr); IncreaseTadr(tag); - ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); + UpperTagTransfer(ipu1dma, ptag); + IPU_LOG("IPU dmaIrq Set"); IPU_INT_TO(totalqwc * BIAS); g_nDMATransfer |= IPU_DMA_TIE1; @@ -1523,7 +1531,8 @@ int IPU1dma() g_nDMATransfer &= ~(IPU_DMA_ACTV1 | IPU_DMA_DOTIE1); } - if (((ipu1dma->chcr & 0xc) == 0) && (ipu1dma->qwc == 0)) // Normal Mode + // Normal Mode & qwc is finished + if ((CHCR::MOD(ipu1dma) == NORMAL_MODE) && (ipu1dma->qwc == 0)) { //Console::WriteLn("ipu1 normal empty qwc?"); return totalqwc; @@ -1535,7 +1544,7 @@ int IPU1dma() IPU_LOG("dmaIPU1 Normal size=%d, addr=%lx, fifosize=%x", ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); - if (!IPU1chain(pMem, totalqwc)) IPU_INT_TO((ipu1cycles + totalqwc) * BIAS); + if (!IPU1chain(totalqwc)) IPU_INT_TO((ipu1cycles + totalqwc) * BIAS); return totalqwc; } @@ -1543,25 +1552,19 @@ int IPU1dma() { // Chain Mode & ipu1dma->qwc is 0 ptag = (u32*)dmaGetAddr(ipu1dma->tadr); //Set memory pointer to TADR - if (ptag == NULL) //Is ptag empty? - { - Console::Error("IPU1 BUSERR"); - ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; //If yes, set BEIS (BUSERR) in DMAC_STAT register - return totalqwc; - } - + + // Transfer the tag. + if (!(TransferTag("IPU1", ipu1dma, ptag))) return totalqwc; + ipu1cycles += 1; // Add 1 cycles from the QW read for the tag - - ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - ipu1dma->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag done = ipuDmacSrcChain(ipu1dma, ptag); IPU_LOG("dmaIPU1 dmaChain %8.8x_%8.8x size=%d, addr=%lx, fifosize=%x", ptag[1], ptag[0], ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); - if ((ipu1dma->chcr & 0x80) && ptag[0] & 0x80000000) + + if (CHCR::TIE(ipu1dma) && ChainTags::IRQ(ptag)) g_nDMATransfer |= IPU_DMA_DOTIE1; else g_nDMATransfer &= ~IPU_DMA_DOTIE1; @@ -1573,7 +1576,7 @@ int IPU1dma() { Console::WriteLn("IPU1 TIE"); - if (IPU1chain(pMem, totalqwc)) return totalqwc; + if (IPU1chain(totalqwc)) return totalqwc; if (done) { @@ -1581,7 +1584,8 @@ int IPU1dma() IncreaseTadr(ptag[0]); - ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); + // Transfer the last of ptag into chcr. + UpperTagTransfer(ipu1dma, ptag); } IPU_INT_TO(ipu1cycles + totalqwc * BIAS); // Should it be (ipu1cycles + totalqwc) * BIAS? @@ -1592,14 +1596,14 @@ int IPU1dma() { //Britney Dance beat does a blank NEXT tag, for some odd reason the fix doesnt work if after IPU1Chain O_o if (!done) IPU1dma(); - if (IPU1chain(pMem, totalqwc)) return totalqwc; + if (IPU1chain(totalqwc)) return totalqwc; } IncreaseTadr(ptag[0]); } else { - if (IPU1chain(pMem, totalqwc)) return totalqwc; + if (IPU1chain(totalqwc)) return totalqwc; } } @@ -1677,10 +1681,10 @@ int IPU0dma() int readsize; void* pMem; - if ((!(ipu0dma->chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_FROM_IPU))) || (ipu0dma->qwc == 0)) + if ((!(CHCR::STR(ipu0dma)) || (cpuRegs.interrupt & (1 << DMAC_FROM_IPU))) || (ipu0dma->qwc == 0)) return 0; - assert(!(ipu0dma->chcr&0x40)); + assert(!(CHCR::TTE(ipu0dma))); IPU_LOG("dmaIPU0 chcr = %lx, madr = %lx, qwc = %lx", ipu0dma->chcr, ipu0dma->madr, ipu0dma->qwc); @@ -1739,22 +1743,22 @@ void ipu0Interrupt() { // gif g_nDMATransfer &= ~IPU_DMA_GIFSTALL; - if (((DMACh*)&PS2MEM_HW[0xA000])->chcr & 0x100) GIFdma(); + if (CHCR::STR(gif)) GIFdma(); } if (g_nDMATransfer & IPU_DMA_VIFSTALL) { // vif g_nDMATransfer &= ~IPU_DMA_VIFSTALL; - if (((DMACh*)&PS2MEM_HW[0x9000])->chcr & 0x100)dmaVIF1(); + if (CHCR::STR(vif1ch)) dmaVIF1(); } if (g_nDMATransfer & IPU_DMA_TIE0) { g_nDMATransfer &= ~IPU_DMA_TIE0; } - - ipu0dma->chcr &= ~0x100; + + CHCR::setSTR(ipu0dma); hwDmacIrq(DMAC_FROM_IPU); } @@ -1772,7 +1776,7 @@ IPU_FORCEINLINE void ipu1Interrupt() if (g_nDMATransfer & IPU_DMA_TIE1) g_nDMATransfer &= ~IPU_DMA_TIE1; else - ipu1dma->chcr &= ~0x100; + CHCR::setSTR(ipu1dma); hwDmacIrq(DMAC_TO_IPU); } diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 1cbb86f359..1b27479966 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -28,21 +28,37 @@ enum TransferMode UNDEFINED_MODE }; +template +static __forceinline void UpperTagTransfer(T tag, u32* ptag) +{ + // Transfer upper part of tag to CHCR bits 31-15 + tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); +} + +template +static __forceinline void LowerTagTransfer(T tag, u32* ptag) +{ + //QWC set to lower 16bits of the tag + tag->qwc = (u16)ptag[0]; +} + // Transfer a tag. template -static __forceinline bool TransferTag(const char *s, T tag, u32* &ptag) +static __forceinline bool TransferTag(const char *s, T tag, u32* ptag) { if (ptag == NULL) // Is ptag empty? { Console::Error("%s BUSERR", params s); - tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); // Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; // Set BEIS (BUSERR) in DMAC_STAT register + UpperTagTransfer(tag, ptag); + + // Set BEIS (BUSERR) in DMAC_STAT register + psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; return false; } else { - tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - tag->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag + UpperTagTransfer(tag, ptag); + LowerTagTransfer(tag, ptag); return true; } } @@ -90,6 +106,11 @@ namespace ChainTags { return (tag[0] & 0x8000000); } + + static __forceinline bool IRQ(u32 tag) + { + return (tag & 0x8000000); + } } enum chcr_flags @@ -97,8 +118,10 @@ enum chcr_flags CHCR_DIR = 0x0, CHCR_MOD1 = 0x4, CHCR_MOD2 = 0x8, + CHCR_MOD = 0xC, // MOD1 & MOD2 CHCR_ASP1 = 0x10, CHCR_ASP2 = 0x20, + CHCR_ASP = 0x30, // ASP1 & ASP2 CHCR_TTE = 0x40, CHCR_TIE = 0x80, CHCR_STR = 0x100 @@ -122,19 +145,13 @@ namespace CHCR template static __forceinline TransferMode MOD(T tag) { - u8 temp = 0; - if (tag->chcr & CHCR_MOD1) temp |= (1 << 0); - if (tag->chcr & CHCR_MOD2) temp |= (1 << 1); - return (TransferMode)temp; + return (TransferMode)((tag->chcr & CHCR_MOD) >> 2); } template static __forceinline u8 ASP(T tag) { - u8 temp = 0; - if (tag->chcr & CHCR_ASP1) temp |= (1 << 0); - if (tag->chcr & CHCR_ASP2) temp |= (1 << 1); - return temp; + return (TransferMode)((tag->chcr & CHCR_ASP) >> 2); } // Set the individual flags. Untested. From d156fcfddb6ae384725184a449ecee7aef3cc7cc Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Sat, 15 Aug 2009 11:25:52 +0000 Subject: [PATCH 21/50] Disable vsync when going from "limit" to "skip" framelimit mode. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1626 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Misc.cpp | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/pcsx2/Misc.cpp b/pcsx2/Misc.cpp index 3077150e82..3efe477522 100644 --- a/pcsx2/Misc.cpp +++ b/pcsx2/Misc.cpp @@ -499,16 +499,6 @@ void CycleFrameLimit(int dir) newOptions = (Config.Options & ~PCSX2_FRAMELIMIT_MASK) | newFrameLimit; gsResetFrameSkip(); - - // Allows sync to vblank only when framelimit is on, if GS can. - if(GSsetFrameLimit == NULL) - { - DevCon::Notice("Notice: GS Plugin does not implement GSsetFrameLimit."); - } - else - { - GSsetFrameLimit(newFrameLimit); - } switch(newFrameLimit) { case PCSX2_FRAMELIMIT_NORMAL: @@ -516,6 +506,15 @@ void CycleFrameLimit(int dir) break; case PCSX2_FRAMELIMIT_LIMIT: limitMsg = "Limit"; + //Tell GS plugin we want a frame limit, it can enable vsync then + if(GSsetFrameLimit == NULL) + { + DevCon::Notice("Notice: GS Plugin does not implement GSsetFrameLimit."); + } + else + { + GSsetFrameLimit(newFrameLimit); + } break; case PCSX2_FRAMELIMIT_SKIP: if( GSsetFrameSkip == NULL ) @@ -530,8 +529,16 @@ void CycleFrameLimit(int dir) // are properly synchronized. gsDynamicSkipEnable(); limitMsg = "Skip"; + //Disables eventually enabled vsync + if(GSsetFrameLimit == NULL) + { + DevCon::Notice("Notice: GS Plugin does not implement GSsetFrameLimit."); + } + else + { + GSsetFrameLimit(0); + } } - break; } Threading::AtomicExchange( Config.Options, newOptions ); @@ -539,6 +546,7 @@ void CycleFrameLimit(int dir) Console::Notice("Frame Limit Mode Changed: %s", params limitMsg ); // [Air]: Do we really want to save runtime changes to frameskipping? + // I'd rather do that, yeah :p (rama) //SaveConfig(); } From 233f4348bca0f02cd7cf0be7ff8462fb0e50089c Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sat, 15 Aug 2009 11:38:17 +0000 Subject: [PATCH 22/50] Fix a silly mistake I made in naming functions in Tags.h. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1627 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/IPU/IPU.cpp | 4 +-- pcsx2/Tags.h | 82 +++++++++++++++++++++++------------------------ 2 files changed, 43 insertions(+), 43 deletions(-) diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index 7e3f07c27b..2fd50b1644 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -1758,7 +1758,7 @@ void ipu0Interrupt() g_nDMATransfer &= ~IPU_DMA_TIE0; } - CHCR::setSTR(ipu0dma); + CHCR::clearSTR(ipu0dma); hwDmacIrq(DMAC_FROM_IPU); } @@ -1776,7 +1776,7 @@ IPU_FORCEINLINE void ipu1Interrupt() if (g_nDMATransfer & IPU_DMA_TIE1) g_nDMATransfer &= ~IPU_DMA_TIE1; else - CHCR::setSTR(ipu1dma); + CHCR::clearSTR(ipu1dma); hwDmacIrq(DMAC_TO_IPU); } diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 1b27479966..35780fb1c2 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -73,14 +73,28 @@ enum pce_values enum tag_id { - TAG_REFE = 0, - TAG_CNT, - TAG_NEXT, - TAG_REF, - TAG_REFS, - TAG_CALL, - TAG_RET, - TAG_END + TAG_REFE = 0, // Transfer Packet According to ADDR field, clear STR, and end + TAG_CNT, // Transfer QWC following the tag. + TAG_NEXT, // Transfer QWC following tag. TADR = ADDR + TAG_REF, // Transfer QWC from ADDR field + TAG_REFS, // Transfer QWC from ADDR field (Stall Control) + TAG_CALL, // Transfer QWC following the tag, save succeeding tag + TAG_RET, // Transfer QWC following the tag, load next tag + TAG_END // Transfer QWC following the tag +}; + +enum chcr_flags +{ + CHCR_DIR = 0x1, // Direction: 0 - to memory, 1 - from memory. VIF1 & SIF2 only. + CHCR_MOD1 = 0x4, + CHCR_MOD2 = 0x8, + CHCR_MOD = 0xC, // MOD1 & MOD2; Holds which of the Transfer modes above is used. + CHCR_ASP1 = 0x10, + CHCR_ASP2 = 0x20, + CHCR_ASP = 0x30, // ASP1 & ASP2; Address stack pointer. 0, 1, or 2 addresses. + CHCR_TTE = 0x40, // Tag Transfer Enable. 0 - Diable / 1 - Enable. + CHCR_TIE = 0x80, // Tag Interrupt Enable. 0 - Diable / 1 - Enable. + CHCR_STR = 0x100 // Start. 0 while stopping DMA, 1 while it's running. }; namespace ChainTags @@ -113,20 +127,6 @@ namespace ChainTags } } -enum chcr_flags -{ - CHCR_DIR = 0x0, - CHCR_MOD1 = 0x4, - CHCR_MOD2 = 0x8, - CHCR_MOD = 0xC, // MOD1 & MOD2 - CHCR_ASP1 = 0x10, - CHCR_ASP2 = 0x20, - CHCR_ASP = 0x30, // ASP1 & ASP2 - CHCR_TTE = 0x40, - CHCR_TIE = 0x80, - CHCR_STR = 0x100 -}; - namespace CHCR { // Query the flags in the channel control register. @@ -154,18 +154,31 @@ namespace CHCR return (TransferMode)((tag->chcr & CHCR_ASP) >> 2); } - // Set the individual flags. Untested. + // Clear the individual flags. template - static __forceinline void setSTR(T tag) { tag->chcr &= ~CHCR_STR; } + static __forceinline void clearSTR(T tag) { tag->chcr &= ~CHCR_STR; } template - static __forceinline void setTIE(T tag) { tag->chcr &= ~CHCR_TIE; } + static __forceinline void clearTIE(T tag) { tag->chcr &= ~CHCR_TIE; } template - static __forceinline void setTTE(T tag) { tag->chcr &= ~CHCR_TTE; } + static __forceinline void clearTTE(T tag) { tag->chcr &= ~CHCR_TTE; } template - static __forceinline void setDIR(T tag) { tag->chcr &= ~CHCR_DIR; } + static __forceinline void clearDIR(T tag) { tag->chcr &= ~CHCR_DIR; } + + // Set them. + template + static __forceinline void setSTR(T tag) { tag->chcr |= CHCR_STR; } + + template + static __forceinline void setTIE(T tag) { tag->chcr |= CHCR_TIE; } + + template + static __forceinline void setTTE(T tag) { tag->chcr |= CHCR_TTE; } + + template + static __forceinline void setDIR(T tag) { tag->chcr |= CHCR_DIR; } template static __forceinline void setMOD(T tag, TransferMode mode) @@ -182,7 +195,7 @@ namespace CHCR } template - static __forceinline void ASP(T tag, u8 num) + static __forceinline void setASP(T tag, u8 num) { if (num & (1 << 0)) tag->chcr |= CHCR_ASP1; @@ -195,19 +208,6 @@ namespace CHCR tag->chcr &= CHCR_ASP2; } - // Clear them. Untested. - template - static __forceinline void clearSTR(T tag) { tag->chcr |= CHCR_STR; } - - template - static __forceinline void clearTIE(T tag) { tag->chcr |= CHCR_TIE; } - - template - static __forceinline void clearTTE(T tag) { tag->chcr |= CHCR_TTE; } - - template - static __forceinline void clearDIR(T tag) { tag->chcr |= CHCR_DIR; } - // Print information about a chcr tag. template static __forceinline void Print(const char* s, T tag) From 0efb1c534f96a4e3980cdbfd5b09daf543cdc7c1 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 16 Aug 2009 00:49:34 +0000 Subject: [PATCH 23/50] microVU: minor changes git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1629 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.h | 2 +- pcsx2/x86/microVU_Analyze.inl | 6 +++--- pcsx2/x86/microVU_Branch.inl | 4 ++-- pcsx2/x86/microVU_Flags.inl | 10 +++++----- pcsx2/x86/microVU_IR.h | 4 ++-- pcsx2/x86/microVU_Lower.inl | 20 ++++++++++---------- pcsx2/x86/microVU_Misc.h | 6 +++--- pcsx2/x86/microVU_Misc.inl | 2 +- 8 files changed, 27 insertions(+), 27 deletions(-) diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index e1e1b5cbfd..cb4fff6963 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -88,7 +88,7 @@ public: && (linkI->block->pState.vi15 == pState->vi15) && (linkI->block->pState.flags == pState->flags) && (linkI->block->pState.xgkick == pState->xgkick) - && !(linkI->block->pState.needExactMatch & 0xf0f)) { return linkI->block; } + && !(linkI->block->pState.needExactMatch & 5)) { return linkI->block; } linkI = linkI->next; } } diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index ff19ae7d33..44659e7fd3 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -297,7 +297,7 @@ microVUt(void) mVUanalyzeSflag(mV, int It) { mVUsFlagHack = 0; // Don't Optimize Out Status Flags for this block mVUinfo.swapOps = 1; flagSet(mVU, 0); - if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf; } + if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 1; } } } @@ -318,7 +318,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) { else { // Need set _doMac for 4 previous Ops (need to do all 4 because stalls could change the result needed) mVUinfo.swapOps = 1; flagSet(mVU, 1); - if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << 4; } + if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 2; } } } @@ -329,7 +329,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) { microVUt(void) mVUanalyzeCflag(mV, int It) { mVUinfo.swapOps = 1; mVUlow.readFlags = 1; - if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << 8; } + if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 4; } analyzeVIreg2(It, mVUlow.VI_write, 1); } diff --git a/pcsx2/x86/microVU_Branch.inl b/pcsx2/x86/microVU_Branch.inl index 74de944483..44109ef659 100644 --- a/pcsx2/x86/microVU_Branch.inl +++ b/pcsx2/x86/microVU_Branch.inl @@ -22,8 +22,8 @@ microVUt(void) mVUincCycles(mV, int x); microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState); #define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); } -#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3)) -#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3)) +#define sI ((mVUpBlock->pState.needExactMatch & 1) ? 3 : ((mVUpBlock->pState.flags >> 0) & 3)) +#define cI ((mVUpBlock->pState.needExactMatch & 4) ? 3 : ((mVUpBlock->pState.flags >> 2) & 3)) microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) { diff --git a/pcsx2/x86/microVU_Flags.inl b/pcsx2/x86/microVU_Flags.inl index 2f83c5e701..f2c0d1e15c 100644 --- a/pcsx2/x86/microVU_Flags.inl +++ b/pcsx2/x86/microVU_Flags.inl @@ -100,21 +100,21 @@ microVUt(void) mVUsetFlags(mV, microFlagCycles& mFC) { mFC.xClip [i] = i; } - if (!(mVUpBlock->pState.needExactMatch & 0x00f)) { + if (!(mVUpBlock->pState.needExactMatch & 1)) { xS = (mVUpBlock->pState.flags >> 0) & 3; mFC.xStatus[0] = -1; mFC.xStatus[1] = -1; mFC.xStatus[2] = -1; mFC.xStatus[3] = -1; mFC.xStatus[(xS-1)&3] = 0; } - if (!(mVUpBlock->pState.needExactMatch & 0xf00)) { + if (!(mVUpBlock->pState.needExactMatch & 4)) { xC = (mVUpBlock->pState.flags >> 2) & 3; mFC.xClip[0] = -1; mFC.xClip[1] = -1; mFC.xClip[2] = -1; mFC.xClip[3] = -1; mFC.xClip[(xC-1)&3] = 0; } - if (!(mVUpBlock->pState.needExactMatch & 0x0f0)) { + if (!(mVUpBlock->pState.needExactMatch & 2)) { mFC.xMac[0] = -1; mFC.xMac[1] = -1; mFC.xMac[2] = -1; mFC.xMac[3] = -1; } @@ -248,7 +248,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) { if (mVUbranch) { branch = ((mVUbranch>8)?(5):((mVUbranch<3)?3:4)); aBranchAddr = branchAddr; mVUbranch = 0; } incPC(1); } - if (mVUcount < 4) { mVUflagInfo |= 0xfff; } + if (mVUcount < 4) { mVUflagInfo |= 0x7; } iPC = oldPC; mVUcount = oldCount; mVUbranch = oldBranch; @@ -263,7 +263,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) { microVUt(void) mVUsetFlagInfo(mV) { branchType1 { incPC(-1); mVUflagPass(mVU, branchAddr, 4); incPC(1); } branchType2 { - if (!mVUlow.constJump.isValid) { mVUflagInfo |= 0xfff; } + if (!mVUlow.constJump.isValid) { mVUflagInfo |= 0x7; } else { mVUflagPass(mVU, (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8), 4); } } branchType3 { diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index 872dce21d9..6b78bbc630 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -34,8 +34,8 @@ union regInfo { #endif __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares - u32 needExactMatch; // If set, block needs an exact match of pipeline state u32 vi15; // Constant Prop Info for vi15 (only valid if sign-bit set) + u8 needExactMatch; // If set, block needs an exact match of pipeline state u8 q; u8 p; u8 r; @@ -43,7 +43,7 @@ __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares u8 VI[16]; regInfo VF[32]; u8 flags; // clip x2 :: status x2 - u8 padding[3]; // 160 bytes + u8 padding[6]; // 160 bytes #if defined(_MSC_VER) }; #else diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index d46065e580..621f58b451 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -458,7 +458,7 @@ mVUop(mVU_FCAND) { mVUallocVIb(mVU, gprT1, 1); } pass3 { mVUlog("FCAND vi01, $%x", _Imm24_); } - pass4 { mVUflagInfo |= 0xf << 8; } + pass4 { mVUflagInfo |= 4; } } mVUop(mVU_FCEQ) { @@ -471,7 +471,7 @@ mVUop(mVU_FCEQ) { mVUallocVIb(mVU, gprT1, 1); } pass3 { mVUlog("FCEQ vi01, $%x", _Imm24_); } - pass4 { mVUflagInfo |= 0xf << 8; } + pass4 { mVUflagInfo |= 4; } } mVUop(mVU_FCGET) { @@ -482,7 +482,7 @@ mVUop(mVU_FCGET) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FCGET vi%02d", _Ft_); } - pass4 { mVUflagInfo |= 0xf << 8; } + pass4 { mVUflagInfo |= 4; } } mVUop(mVU_FCOR) { @@ -495,7 +495,7 @@ mVUop(mVU_FCOR) { mVUallocVIb(mVU, gprT1, 1); } pass3 { mVUlog("FCOR vi01, $%x", _Imm24_); } - pass4 { mVUflagInfo |= 0xf << 8; } + pass4 { mVUflagInfo |= 4; } } mVUop(mVU_FCSET) { @@ -520,7 +520,7 @@ mVUop(mVU_FMAND) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FMAND vi%02d, vi%02d", _Ft_, _Fs_); } - pass4 { mVUflagInfo |= 0xf << 4; } + pass4 { mVUflagInfo |= 2; } } mVUop(mVU_FMEQ) { @@ -534,7 +534,7 @@ mVUop(mVU_FMEQ) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FMEQ vi%02d, vi%02d", _Ft_, _Fs_); } - pass4 { mVUflagInfo |= 0xf << 4; } + pass4 { mVUflagInfo |= 2; } } mVUop(mVU_FMOR) { @@ -546,7 +546,7 @@ mVUop(mVU_FMOR) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FMOR vi%02d, vi%02d", _Ft_, _Fs_); } - pass4 { mVUflagInfo |= 0xf << 4; } + pass4 { mVUflagInfo |= 2; } } //------------------------------------------------------------------ @@ -561,7 +561,7 @@ mVUop(mVU_FSAND) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FSAND vi%02d, $%x", _Ft_, _Imm12_); } - pass4 { mVUflagInfo |= 0xf; } + pass4 { mVUflagInfo |= 1; } } mVUop(mVU_FSOR) { @@ -572,7 +572,7 @@ mVUop(mVU_FSOR) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FSOR vi%02d, $%x", _Ft_, _Imm12_); } - pass4 { mVUflagInfo |= 0xf; } + pass4 { mVUflagInfo |= 1; } } mVUop(mVU_FSEQ) { @@ -604,7 +604,7 @@ mVUop(mVU_FSEQ) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FSEQ vi%02d, $%x", _Ft_, _Imm12_); } - pass4 { mVUflagInfo |= 0xf; } + pass4 { mVUflagInfo |= 1; } } mVUop(mVU_FSSET) { diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index c2a2d509c6..6ae6b3c397 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -222,9 +222,9 @@ typedef u32 (__fastcall *mVUCall)(void*, void*); #define shuffleSS(x) ((x==1)?(0x27):((x==2)?(0xc6):((x==4)?(0xe1):(0xe4)))) // Flag Info -#define __Status (mVUflagInfo & (0xf<<0)) -#define __Mac (mVUflagInfo & (0xf<<4)) -#define __Clip (mVUflagInfo & (0xf<<8)) +#define __Status (mVUflagInfo & 1) +#define __Mac (mVUflagInfo & 2) +#define __Clip (mVUflagInfo & 4) // Pass 3 Helper Macros #define _Fsf_String ((_Fsf_ == 3) ? "w" : ((_Fsf_ == 2) ? "z" : ((_Fsf_ == 1) ? "y" : "x"))) diff --git a/pcsx2/x86/microVU_Misc.inl b/pcsx2/x86/microVU_Misc.inl index c9768581a3..1e92a5dc44 100644 --- a/pcsx2/x86/microVU_Misc.inl +++ b/pcsx2/x86/microVU_Misc.inl @@ -542,5 +542,5 @@ void mVUcustomSearch() { exitPoint.SetTarget(); xRET(); - HostSys::MemProtect(mVUsearchXMM, 0x1000, Protect_ReadOnly, true ); + HostSys::MemProtect(mVUsearchXMM, 0x1000, Protect_ReadOnly, true); } From 1c37a9abf46b6476c4c7215aa1ebe5e34147e71b Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 16 Aug 2009 02:49:25 +0000 Subject: [PATCH 24/50] microVU: Implemented some undocumented stuff which lets Champions Return to Arms get in-game. The game still looks ugly, I'm not sure if its problems are gsdx or pcsx2. zeroGS just renders a black screen which it no help xD Note: I still need to optimize this fix. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1630 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.h | 11 ++++++----- pcsx2/x86/microVU_Analyze.inl | 8 ++++++-- pcsx2/x86/microVU_Compile.inl | 7 +++++++ pcsx2/x86/microVU_IR.h | 1 + 4 files changed, 20 insertions(+), 7 deletions(-) diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index cb4fff6963..38b15cce9d 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -83,11 +83,12 @@ public: } else { // Can do Simple Search (Only Matches the Important Pipeline Stuff) for (int i = 0; i <= listI; i++) { - if ((linkI->block->pState.q == pState->q) - && (linkI->block->pState.p == pState->p) - && (linkI->block->pState.vi15 == pState->vi15) - && (linkI->block->pState.flags == pState->flags) - && (linkI->block->pState.xgkick == pState->xgkick) + if ((linkI->block->pState.q == pState->q) + && (linkI->block->pState.p == pState->p) + && (linkI->block->pState.vi15 == pState->vi15) + && (linkI->block->pState.flags == pState->flags) + && (linkI->block->pState.xgkick == pState->xgkick) + && (linkI->block->pState.viBackUp == pState->viBackUp) && !(linkI->block->pState.needExactMatch & 5)) { return linkI->block; } linkI = linkI->next; } diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index 44659e7fd3..f0b4ca364a 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -356,10 +356,14 @@ microVUt(void) mVUanalyzeXGkick(mV, int Fs, int xCycles) { microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { if (!xReg) return; int i; - int iEnd = aMin(5, mVUcount); + int iEnd = aMin(5, (mVUcount+1)); int bPC = iPC; incPC2(-2); for (i = 0; i < iEnd; i++) { + if (i == mVUcount) { + if (mVUpBlock->pState.viBackUp == xReg) infoVar = 1; + break; + } if ((mVUlow.VI_write.reg == xReg) && mVUlow.VI_write.used) { if (mVUlow.readFlags || i == 5) break; if (i == 0) { incPC2(-2); continue; } @@ -371,7 +375,7 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { } if (i) { incPC2(2); - mVUlow.backupVI = 1; + if (!infoVar) mVUlow.backupVI = 1; iPC = bPC; infoVar = 1; DevCon::Status("microVU%d: Branch VI-Delay (%d) [%04x]", params getIndex, i, xPC); diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 3013f1e60c..b9785572bb 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -162,6 +162,12 @@ microVUt(void) branchWarning(mV) { Console::Error("microVU%d Warning: Branch in E-bit/Branch delay slot! [%04x]", params mVU->index, xPC); mVUlow.isNOP = 1; } + if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay + if (mVUlow.VI_write.reg && mVUlow.VI_write.used) { + mVUlow.backupVI = 1; + mVUregs.viBackUp = mVUlow.VI_write.reg; + } + } } // Optimizes the End Pipeline State Removing Unnecessary Info @@ -294,6 +300,7 @@ microVUt(void) mVUinitFirstPass(microVU* mVU, microBlock* &pBlock, uptr pState, mVUblock.x86ptrStart = thisPtr; pBlock = mVUblocks[mVUstartPC/2]->add(&mVUblock); // Add this block to block manager mVUpBlock = pBlock; + mVUregs.viBackUp= 0; mVUregs.flags = 0; mVUflagInfo = 0; mVUsFlagHack = CHECK_VU_FLAGHACK; diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index 6b78bbc630..70a9cc3548 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -40,6 +40,7 @@ __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares u8 p; u8 r; u8 xgkick; + u8 viBackUp; u8 VI[16]; regInfo VF[32]; u8 flags; // clip x2 :: status x2 From e0aaf5569a0e8aa3c8574e58e478b1b0794ef27d Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 16 Aug 2009 05:24:02 +0000 Subject: [PATCH 25/50] microVU: minor cleanups git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1631 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Branch.inl | 75 ++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 42 deletions(-) diff --git a/pcsx2/x86/microVU_Branch.inl b/pcsx2/x86/microVU_Branch.inl index 44109ef659..b081222006 100644 --- a/pcsx2/x86/microVU_Branch.inl +++ b/pcsx2/x86/microVU_Branch.inl @@ -79,18 +79,35 @@ microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) { // Recompiles Code for Proper Flags and Q/P regs on Block Linkings microVUt(void) mVUsetupBranch(mV, microFlagCycles& mFC) { - mVUprint("mVUsetupBranch"); - - // Flush Allocated Regs - mVU->regAlloc->flushAll(); - - // Shuffle Flag Instances - mVUsetupFlags(mVU, mFC); + + mVU->regAlloc->flushAll(); // Flush Allocated Regs + mVUsetupFlags(mVU, mFC); // Shuffle Flag Instances // Shuffle P/Q regs since every block starts at instance #0 if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); } } +void normBranchCompile(microVU* mVU, u32 branchPC) { + using namespace x86Emitter; + microBlock* pBlock; + blockCreate(branchPC/8); + pBlock = mVUblocks[branchPC/8]->search((microRegInfo*)&mVUregs); + if (pBlock) { xJMP(pBlock->x86ptrStart); } + else { mVUcompile(mVU, branchPC, (uptr)&mVUregs); } +} + +void normBranch(mV, microFlagCycles& mFC) { + + incPC(-3); // Go back to branch opcode (to get branch imm addr) + + // E-bit Branch + if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; } + + // Normal Branch + mVUsetupBranch(mVU, mFC); + normBranchCompile(mVU, branchAddr); +} + void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { using namespace x86Emitter; mVUsetupBranch(mVU, mFC); @@ -115,14 +132,9 @@ void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs); incPC2(-1); if (bBlock) { // Branch non-taken has already been compiled - xJcc( xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart ); - - // Check if branch-block has already been compiled + xJcc(xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart); incPC(-3); // Go back to branch opcode (to get branch imm addr) - blockCreate(branchAddr/8); - pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs); - if (pBlock) { xJMP( pBlock->x86ptrStart ); } - else { mVUblockFetch(mVU, branchAddr, (uptr)&mVUregs); } + normBranchCompile(mVU, branchAddr); } else { s32* ajmp = xJcc32((JccComparisonType)JMPcc); @@ -141,41 +153,20 @@ void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { } } -void normBranch(mV, microFlagCycles& mFC) { - using namespace x86Emitter; - microBlock* pBlock; - incPC(-3); // Go back to branch opcode (to get branch imm addr) - - // E-bit Branch - if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; } - mVUsetupBranch(mVU, mFC); - - // Check if branch-block has already been compiled - blockCreate(branchAddr/8); - pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs); - if (pBlock) { xJMP(pBlock->x86ptrStart); } - else { mVUcompile(mVU, branchAddr, (uptr)&mVUregs); } -} - void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) { using namespace x86Emitter; mVUprint("mVUcompile JR/JALR"); incPC(-3); // Go back to jump opcode - if (mVUlow.constJump.isValid) { + if (mVUlow.constJump.isValid) { // Jump Address is Constant if (mVUup.eBit) { // E-bit Jump iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1); mVUendProgram(mVU, &mFC, 1); + return; } - else { - int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8); - mVUsetupBranch(mVU, mFC); - // Check if jump-to-block has already been compiled - blockCreate(jumpAddr/8); - pBlock = mVUblocks[jumpAddr/8]->search((microRegInfo*)&mVUregs); - if (pBlock) { xJMP(pBlock->x86ptrStart); } - else { mVUcompile(mVU, jumpAddr, (uptr)&mVUregs); } - } + int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8); + mVUsetupBranch(mVU, mFC); + normBranchCompile(mVU, jumpAddr); return; } @@ -191,8 +182,8 @@ void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) { mVUsetupBranch(mVU, mFC); mVUbackupRegs(mVU); - MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX first argument for __fastcall) - MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX second argument for __fastcall) + MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX 1st argument for __fastcall) + MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX 2nd argument for __fastcall) if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState) else xCALL(mVUcompileJIT<1>); From a364c72a57814620f810b98cbf4233e341c3cdcb Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 16 Aug 2009 06:09:11 +0000 Subject: [PATCH 26/50] microVU: - Fixed a bug from r1630 (it was breaking SO3 and probably some other games) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1632 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Analyze.inl | 17 +++++++++++------ pcsx2/x86/microVU_Compile.inl | 2 +- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index f0b4ca364a..ad6418b819 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -360,8 +360,11 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { int bPC = iPC; incPC2(-2); for (i = 0; i < iEnd; i++) { - if (i == mVUcount) { - if (mVUpBlock->pState.viBackUp == xReg) infoVar = 1; + if ((i == mVUcount) && (i < 5)) { + if (mVUpBlock->pState.viBackUp == xReg) { + infoVar = 1; + i++; + } break; } if ((mVUlow.VI_write.reg == xReg) && mVUlow.VI_write.used) { @@ -374,13 +377,15 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { break; } if (i) { - incPC2(2); - if (!infoVar) mVUlow.backupVI = 1; + if (!infoVar) { + incPC2(2); + mVUlow.backupVI = 1; + infoVar = 1; + } iPC = bPC; - infoVar = 1; DevCon::Status("microVU%d: Branch VI-Delay (%d) [%04x]", params getIndex, i, xPC); } - iPC = bPC; + else iPC = bPC; } microVUt(void) mVUanalyzeBranch1(mV, int Is) { diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index b9785572bb..50e612eb38 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -163,7 +163,7 @@ microVUt(void) branchWarning(mV) { mVUlow.isNOP = 1; } if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay - if (mVUlow.VI_write.reg && mVUlow.VI_write.used) { + if (mVUlow.VI_write.reg && mVUlow.VI_write.used && !mVUlow.readFlags) { mVUlow.backupVI = 1; mVUregs.viBackUp = mVUlow.VI_write.reg; } From 05bf33c35cb73cb2ebe736ec704c9a07de9c29ae Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 16 Aug 2009 06:22:45 +0000 Subject: [PATCH 27/50] pcsx2: fixed some msvc++ compiler warnings git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1633 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Tags.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 35780fb1c2..61551657d0 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -118,12 +118,12 @@ namespace ChainTags static __forceinline bool IRQ(u32 *tag) { - return (tag[0] & 0x8000000); + return !!(tag[0] & 0x8000000); } static __forceinline bool IRQ(u32 tag) { - return (tag & 0x8000000); + return !!(tag & 0x8000000); } } @@ -131,13 +131,13 @@ namespace CHCR { // Query the flags in the channel control register. template - static __forceinline bool STR(T tag) { return (tag->chcr & CHCR_STR); } + static __forceinline bool STR(T tag) { return !!(tag->chcr & CHCR_STR); } template - static __forceinline bool TIE(T tag) { return (tag->chcr & CHCR_TIE); } + static __forceinline bool TIE(T tag) { return !!(tag->chcr & CHCR_TIE); } template - static __forceinline bool TTE(T tag) { return (tag->chcr & CHCR_TTE); } + static __forceinline bool TTE(T tag) { return !!(tag->chcr & CHCR_TTE); } template static __forceinline u8 DIR(T tag) { return (tag->chcr & CHCR_DIR); } From 2dc77cd1286e47c0ab0d6d59ba4442058f9da2a4 Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Sun, 16 Aug 2009 11:35:30 +0000 Subject: [PATCH 28/50] GSdx: Re-enabled capturing via F12 key. It was missing the callback entirely. The videos I capture here turn out all blueish though. No idea why :p git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1635 96395faa-99c1-11dd-bbfe-3dabce05a288 --- plugins/GSdx/GS.cpp | 8 ++++++++ plugins/GSdx/GSRenderer.cpp | 10 ++++++++++ plugins/GSdx/GSRenderer.h | 2 +- plugins/GSdx/GSdx.def | 3 ++- 4 files changed, 21 insertions(+), 2 deletions(-) diff --git a/plugins/GSdx/GS.cpp b/plugins/GSdx/GS.cpp index 20dc3aee96..8a104f56fc 100644 --- a/plugins/GSdx/GS.cpp +++ b/plugins/GSdx/GS.cpp @@ -289,6 +289,14 @@ EXPORT_C GSirqCallback(void (*irq)()) s_irq = irq; } + +EXPORT_C_(int) GSsetupRecording(int start, void* pData) +{ + s_gs->ToggleRecord(); + + return 1; +} + EXPORT_C GSsetGameCRC(uint32 crc, int options) { s_gs->SetGameCRC(crc, options); diff --git a/plugins/GSdx/GSRenderer.cpp b/plugins/GSdx/GSRenderer.cpp index 7964640209..2e25684a94 100644 --- a/plugins/GSdx/GSRenderer.cpp +++ b/plugins/GSdx/GSRenderer.cpp @@ -403,6 +403,16 @@ bool GSRenderer::MakeSnapshot(const string& path) return true; } +void GSRenderer::ToggleRecord(void) +{ + if(m_capture.IsCapturing()){ + m_capture.EndCapture(); + } + else { + m_capture.BeginCapture(GetFPS()); + } +} + void GSRenderer::KeyEvent(GSKeyEventData* e) { if(e->type == KEYPRESS) diff --git a/plugins/GSdx/GSRenderer.h b/plugins/GSdx/GSRenderer.h index 484a144561..2f4118da92 100644 --- a/plugins/GSdx/GSRenderer.h +++ b/plugins/GSdx/GSRenderer.h @@ -77,7 +77,7 @@ public: virtual void VSync(int field); virtual bool MakeSnapshot(const string& path); virtual void KeyEvent(GSKeyEventData* e); - + virtual void ToggleRecord(); virtual bool CanUpscale() { return !m_nativeres && m_regs->PMODE.EN != 0; // upscale ratio depends on the display size, with no output it may not be set correctly (ps2 logo to game transition) diff --git a/plugins/GSdx/GSdx.def b/plugins/GSdx/GSdx.def index ec872b0b12..b08d67fa63 100644 --- a/plugins/GSdx/GSdx.def +++ b/plugins/GSdx/GSdx.def @@ -28,7 +28,8 @@ EXPORTS GSabout GSreadFIFO GSreadFIFO2 - GSirqCallback + GSirqCallback + GSsetupRecording GSsetGameCRC GSsetFrameSkip GSsetFrameLimit From 7a36e448c955940ff33189cfc6ce96780bdb5b61 Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Sun, 16 Aug 2009 13:46:50 +0000 Subject: [PATCH 29/50] GSdx: Fix for the bad colors when capturing. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1636 96395faa-99c1-11dd-bbfe-3dabce05a288 --- plugins/GSdx/GSDevice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/GSdx/GSDevice.cpp b/plugins/GSdx/GSDevice.cpp index 8d1dd4007a..32c0b01d31 100644 --- a/plugins/GSdx/GSDevice.cpp +++ b/plugins/GSdx/GSDevice.cpp @@ -25,7 +25,7 @@ GSDevice::GSDevice() : m_wnd(NULL) - , m_rbswapped(false) + , m_rbswapped(true) //(GScapture) was false before, but seems to be needed now (rama) , m_backbuffer(NULL) , m_merge(NULL) , m_weavebob(NULL) From de2d3603a0fd8ef31dafb1b0acbdd9d707f3cceb Mon Sep 17 00:00:00 2001 From: gabest11 Date: Sun, 16 Aug 2009 16:45:26 +0000 Subject: [PATCH 30/50] GSdx: corrected recording code. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1637 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/windows/VCprojects/pcsx2.vcxproj | 1 + pcsx2/windows/VCprojects/pcsx2.vcxproj.filters | 3 +++ plugins/GSdx/GS.cpp | 10 +++++++--- plugins/GSdx/GSDevice.cpp | 2 +- plugins/GSdx/GSRenderer.cpp | 18 ++++-------------- plugins/GSdx/GSRenderer.h | 3 +-- 6 files changed, 17 insertions(+), 20 deletions(-) diff --git a/pcsx2/windows/VCprojects/pcsx2.vcxproj b/pcsx2/windows/VCprojects/pcsx2.vcxproj index f640abdb8e..54cc63b2d6 100644 --- a/pcsx2/windows/VCprojects/pcsx2.vcxproj +++ b/pcsx2/windows/VCprojects/pcsx2.vcxproj @@ -731,6 +731,7 @@ + diff --git a/pcsx2/windows/VCprojects/pcsx2.vcxproj.filters b/pcsx2/windows/VCprojects/pcsx2.vcxproj.filters index 4caba0668a..1631567454 100644 --- a/pcsx2/windows/VCprojects/pcsx2.vcxproj.filters +++ b/pcsx2/windows/VCprojects/pcsx2.vcxproj.filters @@ -1110,6 +1110,9 @@ Ps2\EmotionEngine\VUmicro\Dynarec\microVU + + Ps2\EmotionEngine\VUmicro\Dynarec\microVU + Ps2\EmotionEngine\VUmicro\Dynarec\microVU diff --git a/plugins/GSdx/GS.cpp b/plugins/GSdx/GS.cpp index 8a104f56fc..ec0c53f555 100644 --- a/plugins/GSdx/GS.cpp +++ b/plugins/GSdx/GS.cpp @@ -289,10 +289,14 @@ EXPORT_C GSirqCallback(void (*irq)()) s_irq = irq; } - -EXPORT_C_(int) GSsetupRecording(int start, void* pData) +EXPORT_C_(int) GSsetupRecording(int start, void* data) { - s_gs->ToggleRecord(); + GSKeyEventData e; + + e.type = KEYPRESS; + e.key = VK_F12; + + s_gs->KeyEvent(&e, start & 1); return 1; } diff --git a/plugins/GSdx/GSDevice.cpp b/plugins/GSdx/GSDevice.cpp index 32c0b01d31..8d1dd4007a 100644 --- a/plugins/GSdx/GSDevice.cpp +++ b/plugins/GSdx/GSDevice.cpp @@ -25,7 +25,7 @@ GSDevice::GSDevice() : m_wnd(NULL) - , m_rbswapped(true) //(GScapture) was false before, but seems to be needed now (rama) + , m_rbswapped(false) , m_backbuffer(NULL) , m_merge(NULL) , m_weavebob(NULL) diff --git a/plugins/GSdx/GSRenderer.cpp b/plugins/GSdx/GSRenderer.cpp index 2e25684a94..9191041263 100644 --- a/plugins/GSdx/GSRenderer.cpp +++ b/plugins/GSdx/GSRenderer.cpp @@ -375,7 +375,7 @@ void GSRenderer::VSync(int field) if(offscreen->Map(m)) { - m_capture.DeliverFrame(m.bits, m.pitch, m_dev->IsRBSwapped()); + m_capture.DeliverFrame(m.bits, m.pitch, !m_dev->IsRBSwapped()); offscreen->Unmap(); } @@ -403,17 +403,7 @@ bool GSRenderer::MakeSnapshot(const string& path) return true; } -void GSRenderer::ToggleRecord(void) -{ - if(m_capture.IsCapturing()){ - m_capture.EndCapture(); - } - else { - m_capture.BeginCapture(GetFPS()); - } -} - -void GSRenderer::KeyEvent(GSKeyEventData* e) +void GSRenderer::KeyEvent(GSKeyEventData* e, int param) { if(e->type == KEYPRESS) { @@ -433,8 +423,8 @@ void GSRenderer::KeyEvent(GSKeyEventData* e) m_shader = (m_shader + 3 + step) % 3; return; case VK_F12: - if(m_capture.IsCapturing()) m_capture.EndCapture(); - else m_capture.BeginCapture(GetFPS()); + if(param) m_capture.BeginCapture(GetFPS()); + else m_capture.EndCapture(); return; case VK_DELETE: m_aa1 = !m_aa1; diff --git a/plugins/GSdx/GSRenderer.h b/plugins/GSdx/GSRenderer.h index 2f4118da92..378ab45afb 100644 --- a/plugins/GSdx/GSRenderer.h +++ b/plugins/GSdx/GSRenderer.h @@ -76,8 +76,7 @@ public: virtual bool Create(const string& title, int w, int h); virtual void VSync(int field); virtual bool MakeSnapshot(const string& path); - virtual void KeyEvent(GSKeyEventData* e); - virtual void ToggleRecord(); + virtual void KeyEvent(GSKeyEventData* e, int param = 0); virtual bool CanUpscale() { return !m_nativeres && m_regs->PMODE.EN != 0; // upscale ratio depends on the display size, with no output it may not be set correctly (ps2 logo to game transition) From adb9c06dba3e6707adf0ea0b2dc4f496332d5ebb Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sun, 16 Aug 2009 20:03:55 +0000 Subject: [PATCH 31/50] Converted VifDma.cpp over to using Tags.h. Worked some more on straightening out Tags.h. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1638 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/IPU/IPU.cpp | 18 ++--- pcsx2/Tags.h | 193 +++++++++++++++++++++++++--------------------- pcsx2/VifDma.cpp | 145 ++++++++++++++++------------------ pcsx2/VifDma.h | 4 +- 4 files changed, 181 insertions(+), 179 deletions(-) diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index 2fd50b1644..d5ca82144b 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -1398,9 +1398,7 @@ static __forceinline bool IPU1chain(int &totalqwc) // Remind me to give this a better name. --arcum42 static __forceinline bool IncreaseTadr(u32 tag) { - u32 id = (tag >> 28) & 0x7; - - switch (id) + switch (Tag::Id(tag)) { case TAG_REFE: // refe ipu1dma->tadr += 16; @@ -1417,9 +1415,7 @@ extern void gsInterrupt(); static __forceinline bool ipuDmacSrcChain(DMACh *tag, u32 *ptag) { - u32 id = (ptag[0] >> 28) & 0x7; - - switch (id) + switch (Tag::Id(ptag)) { case TAG_REFE: // refe // do not change tadr @@ -1507,13 +1503,13 @@ int IPU1dma() // Chain mode. u32 tag = ipu1dma->chcr; // upper bits describe current tag - if (CHCR::TIE(ipu1dma) && ChainTags::IRQ(tag)) + if (CHCR::TIE(ipu1dma) && Tag::IRQ(tag)) { ptag = (u32*)dmaGetAddr(ipu1dma->tadr); IncreaseTadr(tag); - UpperTagTransfer(ipu1dma, ptag); + Tag::UpperTransfer(ipu1dma, ptag); IPU_LOG("IPU dmaIrq Set"); IPU_INT_TO(totalqwc * BIAS); @@ -1554,7 +1550,7 @@ int IPU1dma() ptag = (u32*)dmaGetAddr(ipu1dma->tadr); //Set memory pointer to TADR // Transfer the tag. - if (!(TransferTag("IPU1", ipu1dma, ptag))) return totalqwc; + if (!(Tag::Transfer("IPU1", ipu1dma, ptag))) return totalqwc; ipu1cycles += 1; // Add 1 cycles from the QW read for the tag @@ -1564,7 +1560,7 @@ int IPU1dma() ptag[1], ptag[0], ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); - if (CHCR::TIE(ipu1dma) && ChainTags::IRQ(ptag)) + if (CHCR::TIE(ipu1dma) && Tag::IRQ(ptag)) g_nDMATransfer |= IPU_DMA_DOTIE1; else g_nDMATransfer &= ~IPU_DMA_DOTIE1; @@ -1585,7 +1581,7 @@ int IPU1dma() IncreaseTadr(ptag[0]); // Transfer the last of ptag into chcr. - UpperTagTransfer(ipu1dma, ptag); + Tag::UpperTransfer(ipu1dma, ptag); } IPU_INT_TO(ipu1cycles + totalqwc * BIAS); // Should it be (ipu1cycles + totalqwc) * BIAS? diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 61551657d0..b900785f5c 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -20,48 +20,7 @@ // I kept seeing the same code over and over with different structure names // and the same members, and figured it'd be a good spot to use templates... -enum TransferMode -{ - NORMAL_MODE = 0, - CHAIN_MODE, - INTERLEAVE_MODE, - UNDEFINED_MODE -}; - -template -static __forceinline void UpperTagTransfer(T tag, u32* ptag) -{ - // Transfer upper part of tag to CHCR bits 31-15 - tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); -} - -template -static __forceinline void LowerTagTransfer(T tag, u32* ptag) -{ - //QWC set to lower 16bits of the tag - tag->qwc = (u16)ptag[0]; -} - -// Transfer a tag. -template -static __forceinline bool TransferTag(const char *s, T tag, u32* ptag) -{ - if (ptag == NULL) // Is ptag empty? - { - Console::Error("%s BUSERR", params s); - UpperTagTransfer(tag, ptag); - - // Set BEIS (BUSERR) in DMAC_STAT register - psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; - return false; - } - else - { - UpperTagTransfer(tag, ptag); - LowerTagTransfer(tag, ptag); - return true; - } -} +// Actually, looks like I didn't need templates after all... :) enum pce_values { @@ -97,8 +56,73 @@ enum chcr_flags CHCR_STR = 0x100 // Start. 0 while stopping DMA, 1 while it's running. }; -namespace ChainTags +enum TransferMode { + NORMAL_MODE = 0, + CHAIN_MODE, + INTERLEAVE_MODE, + UNDEFINED_MODE +}; + +namespace Tag +{ + // Transfer functions, + static __forceinline void UpperTransfer(DMACh *tag, u32* ptag) + { + // Transfer upper part of tag to CHCR bits 31-15 + tag->chcr = (tag->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); + } + + static __forceinline void LowerTransfer(DMACh *tag, u32* ptag) + { + //QWC set to lower 16bits of the tag + tag->qwc = (u16)ptag[0]; + } + + static __forceinline bool Transfer(const char *s, DMACh *tag, u32* ptag) + { + if (ptag == NULL) // Is ptag empty? + { + Console::Error("%s BUSERR", params s); + UpperTransfer(tag, ptag); + + // Set BEIS (BUSERR) in DMAC_STAT register + psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; + return false; + } + else + { + UpperTransfer(tag, ptag); + LowerTransfer(tag, ptag); + return true; + } + } + + /*// Not sure if I'll need this one. + static __forceinline bool SafeTransfer(const char *s, DMACh *tag, u32* ptag) + { + if (ptag == NULL) // Is ptag empty? + { + Console::Error("%s BUSERR", params s); + + // Set BEIS (BUSERR) in DMAC_STAT register + psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; + return false; + } + else + { + UpperTransfer(tag, ptag); + LowerTransfer(tag, ptag); + return true; + } + }*/ + + static __forceinline void UnsafeTransfer(DMACh *tag, u32* ptag) + { + UpperTransfer(tag, ptag); + LowerTransfer(tag, ptag); + } + // Untested static __forceinline u16 QWC(u32 *tag) { @@ -116,6 +140,11 @@ namespace ChainTags return (tag_id)((tag[0] >> 28) & 0x7); } + static __forceinline tag_id Id(u32 tag) + { + return (tag_id)((tag >> 28) & 0x7); + } + static __forceinline bool IRQ(u32 *tag) { return !!(tag[0] & 0x8000000); @@ -130,58 +159,34 @@ namespace ChainTags namespace CHCR { // Query the flags in the channel control register. - template - static __forceinline bool STR(T tag) { return !!(tag->chcr & CHCR_STR); } - - template - static __forceinline bool TIE(T tag) { return !!(tag->chcr & CHCR_TIE); } - - template - static __forceinline bool TTE(T tag) { return !!(tag->chcr & CHCR_TTE); } - - template - static __forceinline u8 DIR(T tag) { return (tag->chcr & CHCR_DIR); } - - template - static __forceinline TransferMode MOD(T tag) + static __forceinline bool STR(DMACh *tag) { return !!(tag->chcr & CHCR_STR); } + static __forceinline bool TIE(DMACh *tag) { return !!(tag->chcr & CHCR_TIE); } + static __forceinline bool TTE(DMACh *tag) { return !!(tag->chcr & CHCR_TTE); } + static __forceinline u8 DIR(DMACh *tag) { return !!(tag->chcr & CHCR_DIR); } + + static __forceinline TransferMode MOD(DMACh *tag) { return (TransferMode)((tag->chcr & CHCR_MOD) >> 2); } - template - static __forceinline u8 ASP(T tag) + static __forceinline u8 ASP(DMACh *tag) { return (TransferMode)((tag->chcr & CHCR_ASP) >> 2); } // Clear the individual flags. - template - static __forceinline void clearSTR(T tag) { tag->chcr &= ~CHCR_STR; } - - template - static __forceinline void clearTIE(T tag) { tag->chcr &= ~CHCR_TIE; } - - template - static __forceinline void clearTTE(T tag) { tag->chcr &= ~CHCR_TTE; } - - template - static __forceinline void clearDIR(T tag) { tag->chcr &= ~CHCR_DIR; } + static __forceinline void clearSTR(/*T*/DMACh *tag) { tag->chcr &= ~CHCR_STR; } + static __forceinline void clearTIE(DMACh *tag) { tag->chcr &= ~CHCR_TIE; } + static __forceinline void clearTTE(DMACh *tag) { tag->chcr &= ~CHCR_TTE; } + static __forceinline void clearDIR(DMACh *tag) { tag->chcr &= ~CHCR_DIR; } // Set them. - template - static __forceinline void setSTR(T tag) { tag->chcr |= CHCR_STR; } + static __forceinline void setSTR(DMACh *tag) { tag->chcr |= CHCR_STR; } + static __forceinline void setTIE(DMACh *tag) { tag->chcr |= CHCR_TIE; } + static __forceinline void setTTE(DMACh *tag) { tag->chcr |= CHCR_TTE; } + static __forceinline void setDIR(DMACh *tag) { tag->chcr |= CHCR_DIR; } - template - static __forceinline void setTIE(T tag) { tag->chcr |= CHCR_TIE; } - - template - static __forceinline void setTTE(T tag) { tag->chcr |= CHCR_TTE; } - - template - static __forceinline void setDIR(T tag) { tag->chcr |= CHCR_DIR; } - - template - static __forceinline void setMOD(T tag, TransferMode mode) + static __forceinline void setMOD(DMACh *tag, TransferMode mode) { if (mode & (1 << 0)) tag->chcr |= CHCR_MOD1; @@ -194,8 +199,7 @@ namespace CHCR tag->chcr &= CHCR_MOD2; } - template - static __forceinline void setASP(T tag, u8 num) + static __forceinline void setASP(DMACh *tag, u8 num) { if (num & (1 << 0)) tag->chcr |= CHCR_ASP1; @@ -209,8 +213,7 @@ namespace CHCR } // Print information about a chcr tag. - template - static __forceinline void Print(const char* s, T tag) + static __forceinline void Print(const char* s, DMACh *tag) { u8 num_addr = ASP(tag); TransferMode mode = MOD(tag); @@ -232,4 +235,18 @@ namespace CHCR if (STR(tag)) Console::Write(" (DMA started)."); else Console::Write(" (DMA stopped)."); Console::WriteLn(""); } -} \ No newline at end of file +} + +namespace QWC +{ + static __forceinline bool Empty(DMACh *tag) + { + return (tag->qwc == 0); + } + + + static __forceinline void Clear(DMACh *tag) + { + tag->qwc == 0; + } +} diff --git a/pcsx2/VifDma.cpp b/pcsx2/VifDma.cpp index 37808750bc..b304befa29 100644 --- a/pcsx2/VifDma.cpp +++ b/pcsx2/VifDma.cpp @@ -23,6 +23,7 @@ #include "VUmicro.h" #include "GS.h" #include "VifDma.h" +#include "Tags.h" #include #include @@ -425,23 +426,19 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int { vif->tag.addr += (((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + ((4 - ft->qsize) + unpacksize)) * 4; dest += ((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + (4 - ft->qsize) + unpacksize; - if(vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) - { - vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff); - dest = (u32*)(VU->Mem + v->addr); - } } else { vif->tag.addr += ((4 - ft->qsize) + unpacksize) * 4; dest += (4 - ft->qsize) + unpacksize; - if(vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) - { - vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff); - dest = (u32*)(VU->Mem + v->addr); - } - } + + if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) + { + vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff); + dest = (u32*)(VU->Mem + v->addr); + } + cdata += unpacksize * ft->dsize; vif->cl = 0; VIFUNPACK_LOG("Aligning packet done size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr); @@ -451,12 +448,14 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int else { vif->tag.addr += ((4 - ft->qsize) + unpacksize) * 4; - dest += (4 - ft->qsize) + unpacksize; - if(vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) + dest += (4 - ft->qsize) + unpacksize; + + if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) { vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff); dest = (u32*)(VU->Mem + v->addr); } + cdata += unpacksize * ft->dsize; VIFUNPACK_LOG("Aligning packet done size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr); } @@ -468,7 +467,7 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int if (vifRegs->cycle.cl >= vifRegs->cycle.wl) // skipping write { - if(vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) + if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) { vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff); dest = (u32*)(VU->Mem + v->addr); @@ -498,7 +497,9 @@ static int VIFalign(u32 *data, vifCode *v, unsigned int size, const unsigned int dest += 4; vif->tag.addr += 16; } - if(vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) + + // Hurrah for the 4th occurrance of this piece of code in this function... + if (vif->tag.addr >= (u32)(VIFdmanum ? 0x4000 : 0x1000)) { vif->tag.addr &= (u32)(VIFdmanum ? 0x3fff : 0xfff); dest = (u32*)(VU->Mem + v->addr); @@ -629,7 +630,7 @@ static void VIFunpack(u32 *data, vifCode *v, unsigned int size, const unsigned i ((memlimit + (vifRegs->cycle.cl - vifRegs->cycle.wl) * 16) == tempsize) || (tempsize == memlimit))) { - //Its a red herring! so ignore it! SSE unpacks will be much quicker + //It's a red herring, so ignore it! SSE unpacks will be much quicker. tempsize = 0; } else @@ -985,6 +986,7 @@ static int __fastcall Vif0TransNull(u32 *data) // Shouldnt go here vif0.cmd = 0; return 0; } + static int __fastcall Vif0TransSTMask(u32 *data) // STMASK { SetNewMask(g_vif0Masks, g_vif0HasMask3, data[0], vif0Regs->mask); @@ -1372,30 +1374,24 @@ int _chainVIF0() int id, ret; vif0ptag = (u32*)dmaGetAddr(vif0ch->tadr); //Set memory pointer to TADR - if (vif0ptag == NULL) //Is vif0ptag empty? - { - Console::Error("Vif0 Tag BUSERR"); - vif0ch->chcr = (vif0ch->chcr & 0xFFFF) | ((*vif0ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; //If yes, set BEIS (BUSERR) in DMAC_STAT register - return -1; //Return -1 as an error has occurred - } - - id = (vif0ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag - vif0ch->qwc = (u16)vif0ptag[0]; //QWC set to lower 16bits of the tag - vif0ch->madr = vif0ptag[1]; //MADR = ADDR field - g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag + + if (!(Tag::Transfer("Vif0 Tag", vif0ch, vif0ptag))) return -1; + + vif0ch->madr = vif0ptag[1]; // MADR = ADDR field + id = Tag::Id(vif0ptag); // ID for DmaChain copied from bit 28 of the tag + g_vifCycles += 1; // Increase the QW read for the tag + VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx", vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr); - vif0ch->chcr = (vif0ch->chcr & 0xFFFF) | ((*vif0ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 // Transfer dma tag if tte is set - - if (vif0ch->chcr & 0x40) + if (CHCR::TTE(vif0ch)) { if (vif0.vifstalled) ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, 1); //Transfer Tag on stall else ret = VIF0transfer(vif0ptag + 2, 2, 1); //Transfer Tag + if (ret == -1) return -1; //There has been an error if (ret == -2) return -2; //IRQ set by VIFTransfer } @@ -1407,7 +1403,7 @@ int _chainVIF0() ret = _VIF0chain(); //Transfers the data set by the switch - if ((vif0ch->chcr & 0x80) && (vif0ptag[0] >> 31)) //Check TIE bit of CHCR and IRQ bit of tag + if (CHCR::TIE(vif0ch) && Tag::IRQ(vif0ptag)) //Check TIE bit of CHCR and IRQ bit of tag { VIF_LOG("dmaIrq Set\n"); @@ -1446,9 +1442,9 @@ void vif0Interrupt() } } - if ((vif0ch->chcr & 0x100) == 0) Console::WriteLn("Vif0 running when CHCR = %x", params vif0ch->chcr); + if (!CHCR::STR(vif0ch)) Console::WriteLn("Vif0 running when CHCR = %x", params vif0ch->chcr); - if ((vif0ch->chcr & 0x4) && (!vif0.done) && (!vif0.vifstalled)) + if ((CHCR::MOD(vif0ch) == CHAIN_MODE) && (!vif0.done) && (!vif0.vifstalled)) { if (!(psHu32(DMAC_CTRL) & 0x1)) @@ -1469,7 +1465,7 @@ void vif0Interrupt() if (vif0ch->qwc > 0) Console::WriteLn("VIF0 Ending with QWC left"); if (vif0.cmd != 0) Console::WriteLn("vif0.cmd still set %x", params vif0.cmd); - vif0ch->chcr &= ~0x100; + CHCR::clearSTR(vif0ch); hwDmacIrq(DMAC_VIF0); vif0Regs->stat &= ~0xF000000; // FQC=0 } @@ -1658,7 +1654,7 @@ void vif0Reset() memzero_obj(*vif0Regs); SetNewMask(g_vif0Masks, g_vif0HasMask3, 0, 0xffffffff); psHu64(VIF0_FIFO) = 0; - psHu64(0x10004008) = 0; // VIF0_FIFO + 8 + psHu64(VIF0_FIFO + 8) = 0; vif0Regs->stat &= ~VIF0_STAT_VPS; vif0.done = true; vif0Regs->stat &= ~0xF000000; // FQC=0 @@ -1866,7 +1862,7 @@ static int __fastcall Vif1TransDirectHL(u32 *data) if ((vif1.cmd & 0x7f) == 0x51) { - if (gif->chcr & 0x100 && (!vif1Regs->mskpath3 && (Path3progress == IMAGE_MODE))) //PATH3 is in image mode, so wait for end of transfer + if (CHCR::STR(gif) && (!vif1Regs->mskpath3 && (Path3progress == IMAGE_MODE))) //PATH3 is in image mode, so wait for end of transfer { vif1Regs->stat |= VIF1_STAT_VGW; return 0; @@ -1961,8 +1957,7 @@ static int __fastcall Vif1TransUnpack(u32 *data) if (vif1.vifpacketsize < vif1.tag.size) { int ret = vif1.tag.size; - /* size is less that the total size, transfer is - 'in pieces' */ + /* size is less that the total size, transfer is 'in pieces' */ if(vif1Regs->offset != 0 || vif1.cl != 0) { vif1.tag.size -= vif1.vifpacketsize - VIFalign(data, &vif1.tag, vif1.vifpacketsize, VIF1dmanum); @@ -2073,7 +2068,7 @@ void Vif1MskPath3() // MSKPATH3 } static void Vif1CMDMskPath3() // MSKPATH3 { - if(vif1ch->chcr & 0x100) + if (CHCR::STR(vif1ch)) { schedulepath3msk = 0x10 | ((vif1Regs->code >> 15) & 0x1); vif1.vifstalled = true; @@ -2101,7 +2096,7 @@ static void Vif1CMDFlush() // FLUSH/E/A if ((vif1.cmd & 0x7f) == 0x13) { // Gif is already transferring so wait for it. - if (((Path3progress != STOPPED_MODE) || !vif1Regs->mskpath3) && gif->chcr & 0x100) + if (((Path3progress != STOPPED_MODE) || !vif1Regs->mskpath3) && CHCR::STR(gif)) { vif1Regs->stat |= VIF1_STAT_VGW; CPU_INT(2, 4); @@ -2236,7 +2231,9 @@ int VIF1transfer(u32 *data, int size, int istag) ret = Vif1TransTLB[vif1.cmd](data); data += ret; vif1.vifpacketsize -= ret; - if (vif1.cmd == 0) vif1Regs->stat &= ~VIF1_STAT_VPS_T; //We are once again waiting for a new vifcode as the command has cleared + + //We are once again waiting for a new vifcode as the command has cleared + if (vif1.cmd == 0) vif1Regs->stat &= ~VIF1_STAT_VPS_T; continue; } @@ -2303,8 +2300,7 @@ int VIF1transfer(u32 *data, int size, int istag) if (((vif1Regs->code >> 24) & 0x7f) != 0x7) vif1Regs->stat |= VIF1_STAT_VIS; // Note: commenting this out fixes WALL-E - if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) - vif1.inprogress &= ~0x1; + if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1; // spiderman doesn't break on qw boundaries if (istag) return -2; @@ -2334,8 +2330,7 @@ int VIF1transfer(u32 *data, int size, int istag) } - if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) - vif1.inprogress &= ~0x1; + if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) vif1.inprogress &= ~0x1; return vif1.vifstalled ? -2 : 0; } @@ -2406,7 +2401,7 @@ int _VIF1chain() return 0; } - if (vif1.dmamode == VIF_NORMAL_MEM_MODE) + if (vif1.dmamode == VIF_NORMAL_FROM_MEM_MODE) { vif1TransferFromMemory(); vif1.inprogress = 0; @@ -2435,40 +2430,31 @@ int _VIF1chain() bool _chainVIF1() { - return vif1.done;//Return Done + return vif1.done; // Return Done } __forceinline void vif1SetupTransfer() { switch (vif1.dmamode) { - case VIF_NORMAL_MODE: //Normal - case VIF_NORMAL_MEM_MODE: //Normal (From memory) + case VIF_NORMAL_TO_MEM_MODE: // Normal + case VIF_NORMAL_FROM_MEM_MODE: // Normal (From memory) vif1.inprogress = 1; vif1.done = true; g_vifCycles = 2; break; - case VIF_CHAIN_MODE: //Chain + case VIF_CHAIN_MODE: // Chain int id; int ret; vif1ptag = (u32*)dmaGetAddr(vif1ch->tadr); //Set memory pointer to TADR - if (vif1ptag == NULL) //Is vif0ptag empty? - { - Console::Error("Vif1 Tag BUSERR"); - vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*vif1ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; //If yes, set BEIS (BUSERR) in DMAC_STAT register - return; //Return -1 as an error has occurred - } - - id = (vif1ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag - vif1ch->qwc = (u16)vif1ptag[0]; //QWC set to lower 16bits of the tag + if (!(Tag::Transfer("Vif1 Tag", vif1ch, vif1ptag))) return; + vif1ch->madr = vif1ptag[1]; //MADR = ADDR field - vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*vif1ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag + id = Tag::Id(vif1ptag); //ID for DmaChain copied from bit 28 of the tag // Transfer dma tag if tte is set @@ -2488,7 +2474,7 @@ __forceinline void vif1SetupTransfer() vif1.inprogress = 1; - if (vif1ch->chcr & 0x40) + if (CHCR::TTE(vif1ch)) { if (vif1.vifstalled) @@ -2506,12 +2492,13 @@ __forceinline void vif1SetupTransfer() vif1.irqoffset = 0; vif1.done |= hwDmacSrcChainWithStack(vif1ch, id); - if ((vif1ch->chcr & 0x80) && (vif1ptag[0] >> 31)) //Check TIE bit of CHCR and IRQ bit of tag + //Check TIE bit of CHCR and IRQ bit of tag + if ((CHCR::TIE(vif1ch)) && (Tag::IRQ(vif1ptag))) { VIF_LOG("dmaIrq Set"); vif1.done = true; - return; //End Transfer + return; //End Transfer } break; } @@ -2527,7 +2514,7 @@ __forceinline void vif1Interrupt() if((vif1Regs->stat & VIF1_STAT_VGW)) { - if(gif->chcr & 0x100) + if (CHCR::STR(gif)) { CPU_INT(1, gif->qwc * BIAS); return; @@ -2536,7 +2523,7 @@ __forceinline void vif1Interrupt() } - if ((vif1ch->chcr & 0x100) == 0) Console::WriteLn("Vif1 running when CHCR == %x", params vif1ch->chcr); + if (!(CHCR::STR(vif1ch))) Console::WriteLn("Vif1 running when CHCR == %x", params vif1ch->chcr); if (vif1.irq && vif1.tag.size == 0) { @@ -2601,7 +2588,7 @@ __forceinline void vif1Interrupt() //Games effected by setting, Fatal Frame, KH2, Shox, Crash N Burn, GT3/4 possibly //Im guessing due to the full gs fifo before the reverse? (Refraction) //Note also this is only the condition for reverse fifo mode, normal direction clears it as normal - if(!vif1Regs->mskpath3 || (vif1ch->chcr & 0x1))vif1Regs->stat &= ~0x1F000000; // FQC=0 + if (!vif1Regs->mskpath3 || (CHCR::DIR(vif1ch))) vif1Regs->stat &= ~0x1F000000; // FQC=0 } void dmaVIF1() @@ -2617,7 +2604,7 @@ void dmaVIF1() if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) // VIF MFIFO { //Console::WriteLn("VIFMFIFO\n"); - if (!(vif1ch->chcr & 0x4)) Console::WriteLn("MFIFO mode != Chain! %x", params vif1ch->chcr); + if (CHCR::MOD(vif1ch) != CHAIN_MODE) Console::WriteLn("MFIFO mode != Chain! %x", params vif1ch->chcr); vifMFIFOInterrupt(); return; } @@ -2629,23 +2616,23 @@ void dmaVIF1() } #endif - if (!(vif1ch->chcr & 0x4) || vif1ch->qwc > 0) // Normal Mode + if ((CHCR::MOD(vif1ch) == NORMAL_MODE) || vif1ch->qwc > 0) // Normal Mode { if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40) Console::WriteLn("DMA Stall Control on VIF1 normal"); - if ((vif1ch->chcr & 0x1)) // to Memory - vif1.dmamode = VIF_NORMAL_MODE; + if ((CHCR::DIR(vif1ch))) // to Memory + vif1.dmamode = VIF_NORMAL_TO_MEM_MODE; else - vif1.dmamode = VIF_NORMAL_MEM_MODE; + vif1.dmamode = VIF_NORMAL_FROM_MEM_MODE; } else { vif1.dmamode = VIF_CHAIN_MODE; } - if(vif1.dmamode != VIF_NORMAL_MEM_MODE) + if (vif1.dmamode != VIF_NORMAL_FROM_MEM_MODE) vif1Regs->stat |= 0x10000000; // FQC=16 else vif1Regs->stat |= min((u16)16, vif1ch->qwc) << 24; // FQC=16 @@ -2677,14 +2664,16 @@ void vif1Write32(u32 mem, u32 value) cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's vif1ch->qwc = 0; //? psHu64(VIF1_FIFO) = 0; - psHu64(0x10005008) = 0; // VIF1_FIFO + 8 + psHu64(VIF1_FIFO + 8) = 0; vif1.done = true; + if(vif1Regs->mskpath3) { vif1Regs->mskpath3 = 0; psHu32(GIF_STAT) &= ~0x2; - if(gif->chcr & 0x100) CPU_INT(2, 4); + if (CHCR::STR(gif)) CPU_INT(2, 4); } + vif1Regs->err = 0; vif1.inprogress = 0; vif1Regs->stat &= ~(0x1F800000 | VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS | VIF1_STAT_VPS); // FQC=0 @@ -2741,7 +2730,7 @@ void vif1Write32(u32 mem, u32 value) // Gets the timing right - Flatout CPU_INT(1, vif1ch->qwc * BIAS); } - vif1ch->chcr |= 0x100; + CHCR::setSTR(vif1ch); } } } diff --git a/pcsx2/VifDma.h b/pcsx2/VifDma.h index 627a5386e5..4024590b3d 100644 --- a/pcsx2/VifDma.h +++ b/pcsx2/VifDma.h @@ -20,8 +20,8 @@ enum VifModes { - VIF_NORMAL_MODE = 0, - VIF_NORMAL_MEM_MODE = 1, + VIF_NORMAL_TO_MEM_MODE = 0, + VIF_NORMAL_FROM_MEM_MODE = 1, VIF_CHAIN_MODE = 2 }; From 5c187ebed786368f37aa9fcc6c626ac24a939bf5 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Sun, 16 Aug 2009 20:12:07 +0000 Subject: [PATCH 32/50] Minor correction to the last revision. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1639 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Tags.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index b900785f5c..9c96fba97b 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -162,7 +162,7 @@ namespace CHCR static __forceinline bool STR(DMACh *tag) { return !!(tag->chcr & CHCR_STR); } static __forceinline bool TIE(DMACh *tag) { return !!(tag->chcr & CHCR_TIE); } static __forceinline bool TTE(DMACh *tag) { return !!(tag->chcr & CHCR_TTE); } - static __forceinline u8 DIR(DMACh *tag) { return !!(tag->chcr & CHCR_DIR); } + static __forceinline u8 DIR(DMACh *tag) { return (tag->chcr & CHCR_DIR); } static __forceinline TransferMode MOD(DMACh *tag) { @@ -175,7 +175,7 @@ namespace CHCR } // Clear the individual flags. - static __forceinline void clearSTR(/*T*/DMACh *tag) { tag->chcr &= ~CHCR_STR; } + static __forceinline void clearSTR(DMACh *tag) { tag->chcr &= ~CHCR_STR; } static __forceinline void clearTIE(DMACh *tag) { tag->chcr &= ~CHCR_TIE; } static __forceinline void clearTTE(DMACh *tag) { tag->chcr &= ~CHCR_TTE; } static __forceinline void clearDIR(DMACh *tag) { tag->chcr &= ~CHCR_DIR; } From 761e36796a852bc1385f14d04d1ab00696748412 Mon Sep 17 00:00:00 2001 From: "Jake.Stine" Date: Sun, 16 Aug 2009 21:09:35 +0000 Subject: [PATCH 33/50] Improved the safe_delete / safe_free macros to avoid potential block scoping pitfalls, and fixed what looks to have been a minor typo in Tags.h :) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1640 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/SafeArray.h | 39 +++++++++++++++------------------------ pcsx2/Tags.h | 2 +- pcsx2_suite_2010.sln | 9 +++++++++ 3 files changed, 25 insertions(+), 25 deletions(-) diff --git a/pcsx2/SafeArray.h b/pcsx2/SafeArray.h index 664db6fd01..e115364d09 100644 --- a/pcsx2/SafeArray.h +++ b/pcsx2/SafeArray.h @@ -29,40 +29,31 @@ extern void pcsx2_aligned_free(void* pmem); # define _aligned_realloc pcsx2_aligned_realloc #endif -////////////////////////////////////////////////////////////// -// Safe deallocation macros -- always check pointer validity (non-null) -// and set pointer to null on deallocation. +////////////////////////////////////////////////////////////////////////////////////////// +// Safe deallocation macros -- always check pointer validity (non-null) when needed, +// and set pointer to null after deallocation. #define safe_delete( ptr ) \ - if( ptr != NULL ) { \ - delete ptr; \ - ptr = NULL; \ - } + ((void) (( ( ptr != NULL ) && (delete ptr, !!0) ), ptr = NULL)) #define safe_delete_array( ptr ) \ - if( ptr != NULL ) { \ - delete[] ptr; \ - ptr = NULL; \ - } + ((void) (( ( ptr != NULL ) && (delete[] ptr, !!0) ), ptr = NULL)) +// fixme: I'm pretty sure modern libc implementations inder gcc and msvc check null status +// inside free(), meaning we shouldn't have to do it ourselves. But legacy implementations +// didn't always check, so best to be cautious unless absolutely certain it's being covered on +// all ported platforms. #define safe_free( ptr ) \ - if( ptr != NULL ) { \ - free( ptr ); \ - ptr = NULL; \ - } + ((void) (( ( ptr != NULL ) && (free( ptr ), !!0) ), ptr = NULL)) +// Implementation note: all known implementations of _aligned_free check the pointer for +// NULL status (our implementation under GCC, and microsoft's under MSVC), so no need to +// do it here. #define safe_aligned_free( ptr ) \ - if( ptr != NULL ) { \ - _aligned_free( ptr ); \ - ptr = NULL; \ - } + ( (void) ( _aligned_free( ptr ), ptr = NULL ) ) #define SafeSysMunmap( ptr, size ) \ - if( ptr != NULL ) { \ - HostSys::Munmap( (uptr)ptr, size ); \ - ptr = NULL; \ - } - + ( (void) ( HostSys::Munmap( (uptr)ptr, size ), ptr = NULL ) ) ////////////////////////////////////////////////////////////////////////////////////////// // Handy little class for allocating a resizable memory block, complete with diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 9c96fba97b..74a8f8d3f4 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -247,6 +247,6 @@ namespace QWC static __forceinline void Clear(DMACh *tag) { - tag->qwc == 0; + tag->qwc = 0; } } diff --git a/pcsx2_suite_2010.sln b/pcsx2_suite_2010.sln index c03a172e1c..cf0aab5eac 100644 --- a/pcsx2_suite_2010.sln +++ b/pcsx2_suite_2010.sln @@ -21,6 +21,15 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "GSdx", "plugins\GSdx\GSdx.v EndProject Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "xpad", "plugins\xpad\xpad.vcxproj", "{6F3C4136-5801-4EBC-AC6E-37DF6FAB150A}" EndProject +Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Common", "Common", "{06C9589C-DFD3-4CE8-B69A-32208C2767B2}" + ProjectSection(SolutionItems) = preProject + common\include\afxresmw.h = common\include\afxresmw.h + common\include\Pcsx2Api.h = common\include\Pcsx2Api.h + common\include\Pcsx2Config.h = common\include\Pcsx2Config.h + common\include\Pcsx2Defs.h = common\include\Pcsx2Defs.h + common\include\Pcsx2Types.h = common\include\Pcsx2Types.h + EndProjectSection +EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution Debug|Win32 = Debug|Win32 From 47b04ffb5ba4109e927820b312a11019a0f4956c Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Mon, 17 Aug 2009 01:51:13 +0000 Subject: [PATCH 34/50] microVU: Fixed a case where a cached microProgram was killed but was still being used... This fixes Suikoden III hanging/infinite loop problems, and possibly some other games... git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1641 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.cpp | 7 ++++--- pcsx2/x86/microVU_Compile.inl | 6 +++--- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/pcsx2/x86/microVU.cpp b/pcsx2/x86/microVU.cpp index a4630a3e1e..6b4e028c3e 100644 --- a/pcsx2/x86/microVU.cpp +++ b/pcsx2/x86/microVU.cpp @@ -207,13 +207,13 @@ microVUt(void) mVUvsyncUpdate(mV) { mVU->prog.prog[i].used = 0; mVU->prog.prog[i].frame = mVU->prog.curFrame; } - if((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (360 * 10)) { + else if (((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (360 * 10)) && (i != mVU->prog.cur)) { mVU->prog.total--; if (!mVU->index) mVUclearProg<0>(i); else mVUclearProg<1>(i); DevCon::Status("microVU%d: Killing Dead Program [%03d]", params mVU->index, i+1); } - else if (!mVU->prog.prog[i].isOld && ((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (30 * 1))) { + else if (((mVU->prog.curFrame - mVU->prog.prog[i].frame) >= (30 * 1)) && !mVU->prog.prog[i].isOld) { mVU->prog.prog[i].isOld = 1; //DevCon::Status("microVU%d: Aging Old Program [%03d]", params mVU->index, i+1); } @@ -267,7 +267,8 @@ microVUf(int) mVUsearchProg() { mVU->prog.isSame = 1; return 0; } - mVU->prog.prog[mVU->prog.cur].used = 1; + mVU->prog.prog[mVU->prog.cur].used = 1; + mVU->prog.prog[mVU->prog.cur].isOld = 0; return 1; // If !cleared, then we're still on the same program as last-time ;) } diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 50e612eb38..6502641abf 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -258,8 +258,8 @@ microVUt(void) mVUsetCycles(mV) { tCycles(mVUregs.xgkick, mVUregsTemp.xgkick); } -void __fastcall mVUwarning0(u32 PC) { Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); } -void __fastcall mVUwarning1(u32 PC) { Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); } +void __fastcall mVUwarning0(mV) { Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x] [%x]", params xPC, mVU->prog.cur); } +void __fastcall mVUwarning1(mV) { Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x] [%x]", params xPC, mVU->prog.cur); } void __fastcall mVUprintPC1(u32 PC) { Console::Write("Block PC [%04x] ", params PC); } void __fastcall mVUprintPC2(u32 PC) { Console::Write("[%04x]\n", params PC); } @@ -269,7 +269,7 @@ microVUt(void) mVUtestCycles(mV) { SUB32ItoM((uptr)&mVU->cycles, mVUcycles); if (IsDevBuild || !isVU1) { u32* jmp32 = JG32(0); - MOV32ItoR(gprT2, xPC); + MOV32ItoR(gprT2, (uptr)mVU); if (isVU1) CALLFunc((uptr)mVUwarning1); //else CALLFunc((uptr)mVUwarning0); // VU0 is allowed early exit for COP2 Interlock Simulation MOV32ItoR(gprR, Roffset); // Restore gprR From e08c2cc57d26edcc6115b93ee6f043856aa25074 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Mon, 17 Aug 2009 06:38:56 +0000 Subject: [PATCH 35/50] microVU: Now prints some more Warnings to the console when unimplemented features are happening. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1642 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Compile.inl | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 6502641abf..79ceb701b3 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -170,6 +170,14 @@ microVUt(void) branchWarning(mV) { } } +microVUt(void) eBitWarning(mV) { + incPC(2); + if (curI & _Ebit_) { + Console::Error("microVU%d Warning: E-bit in Branch delay slot! [%04x]", params mVU->index, xPC); + } + incPC(-2); +} + // Optimizes the End Pipeline State Removing Unnecessary Info microVUt(void) mVUoptimizePipeState(mV) { for (int i = 0; i < 32; i++) { @@ -342,7 +350,7 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { mVUinfo.writeP = !mVU->p; if (branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; } else if (branch == 1) { branch = 2; } - if (mVUbranch) { mVUsetFlagInfo(mVU); branch = 3; mVUbranch = 0; } + if (mVUbranch) { mVUsetFlagInfo(mVU); eBitWarning(mVU); branch = 3; mVUbranch = 0; } incPC(1); } From fc35912a520106aa33434d6d52a57d07bddcf7a2 Mon Sep 17 00:00:00 2001 From: "Jake.Stine" Date: Mon, 17 Aug 2009 09:52:50 +0000 Subject: [PATCH 36/50] Removed duplicate null checks on safe_delete. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1643 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/SafeArray.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/pcsx2/SafeArray.h b/pcsx2/SafeArray.h index e115364d09..aa01ca913a 100644 --- a/pcsx2/SafeArray.h +++ b/pcsx2/SafeArray.h @@ -30,16 +30,16 @@ extern void pcsx2_aligned_free(void* pmem); #endif ////////////////////////////////////////////////////////////////////////////////////////// -// Safe deallocation macros -- always check pointer validity (non-null) when needed, -// and set pointer to null after deallocation. +// Safe deallocation macros -- checks pointer validity (non-null) when needed, and sets +// pointer to null after deallocation. #define safe_delete( ptr ) \ - ((void) (( ( ptr != NULL ) && (delete ptr, !!0) ), ptr = NULL)) + ((void) (delete ptr), ptr = NULL) #define safe_delete_array( ptr ) \ - ((void) (( ( ptr != NULL ) && (delete[] ptr, !!0) ), ptr = NULL)) + ((void) (delete[] ptr), ptr = NULL) -// fixme: I'm pretty sure modern libc implementations inder gcc and msvc check null status +// fixme: I'm pretty sure modern libc implementations under gcc and msvc check null status // inside free(), meaning we shouldn't have to do it ourselves. But legacy implementations // didn't always check, so best to be cautious unless absolutely certain it's being covered on // all ported platforms. @@ -50,10 +50,10 @@ extern void pcsx2_aligned_free(void* pmem); // NULL status (our implementation under GCC, and microsoft's under MSVC), so no need to // do it here. #define safe_aligned_free( ptr ) \ - ( (void) ( _aligned_free( ptr ), ptr = NULL ) ) + ((void) ( _aligned_free( ptr ), ptr = NULL )) #define SafeSysMunmap( ptr, size ) \ - ( (void) ( HostSys::Munmap( (uptr)ptr, size ), ptr = NULL ) ) + ((void) ( HostSys::Munmap( (uptr)ptr, size ), ptr = NULL )) ////////////////////////////////////////////////////////////////////////////////////////// // Handy little class for allocating a resizable memory block, complete with From 5b1700f98d5f3a897b5571980dc53e9fc820cc48 Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Mon, 17 Aug 2009 10:36:53 +0000 Subject: [PATCH 37/50] Fix a foopah, and get rid of the useless imdct warning. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1644 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Misc.cpp | 9 +++++++++ plugins/spu2-x/src/3rdparty/liba52/imdct.c | 2 +- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/pcsx2/Misc.cpp b/pcsx2/Misc.cpp index 3efe477522..d0deaeee7c 100644 --- a/pcsx2/Misc.cpp +++ b/pcsx2/Misc.cpp @@ -503,6 +503,15 @@ void CycleFrameLimit(int dir) switch(newFrameLimit) { case PCSX2_FRAMELIMIT_NORMAL: limitMsg = "None/Normal"; + //Disables eventually enabled vsync + if(GSsetFrameLimit == NULL) + { + DevCon::Notice("Notice: GS Plugin does not implement GSsetFrameLimit."); + } + else + { + GSsetFrameLimit(0); + } break; case PCSX2_FRAMELIMIT_LIMIT: limitMsg = "Limit"; diff --git a/plugins/spu2-x/src/3rdparty/liba52/imdct.c b/plugins/spu2-x/src/3rdparty/liba52/imdct.c index 4e81e4a099..6148705460 100644 --- a/plugins/spu2-x/src/3rdparty/liba52/imdct.c +++ b/plugins/spu2-x/src/3rdparty/liba52/imdct.c @@ -425,7 +425,7 @@ void a52_imdct_init (uint32_t mm_accel) } else #endif { - fprintf (stderr, "No accelerated IMDCT transform found\n"); + //fprintf (stderr, "No accelerated IMDCT transform found\n"); ifft128 = ifft128_c; ifft64 = ifft64_c; } From 9714a50dc51886053a8f4a47a1e9802360ceb97b Mon Sep 17 00:00:00 2001 From: arcum42 Date: Mon, 17 Aug 2009 12:34:27 +0000 Subject: [PATCH 38/50] Changed the MFIFO test and message because it spams too much now that it actually does what it said it did before. Fixes the FFXII opening. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1645 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/VifDma.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/pcsx2/VifDma.cpp b/pcsx2/VifDma.cpp index b304befa29..a068d00f7b 100644 --- a/pcsx2/VifDma.cpp +++ b/pcsx2/VifDma.cpp @@ -2604,10 +2604,11 @@ void dmaVIF1() if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) // VIF MFIFO { //Console::WriteLn("VIFMFIFO\n"); - if (CHCR::MOD(vif1ch) != CHAIN_MODE) Console::WriteLn("MFIFO mode != Chain! %x", params vif1ch->chcr); + // Test changed because the Final Fantasy 12 opening somehow has the tag in *Undefined* mode, which is not in the documentation that I saw. + if (CHCR::MOD(vif1ch) == NORMAL_MODE) Console::WriteLn("MFIFO mode is normal (which isn't normal here)! %x", params vif1ch->chcr); vifMFIFOInterrupt(); return; - } + } #ifdef PCSX2_DEVBUILD if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40) // STD == VIF1 From 4509e085c6b68fccca50749112e7f59cb285e549 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Mon, 17 Aug 2009 20:41:32 +0000 Subject: [PATCH 39/50] Convert Sif.cpp & Vif.cpp to use the Tags.h code. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1646 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Sif.cpp | 43 ++++++++++++++++++++++--------------------- pcsx2/Vif.cpp | 38 ++++++++++++++++++-------------------- 2 files changed, 40 insertions(+), 41 deletions(-) diff --git a/pcsx2/Sif.cpp b/pcsx2/Sif.cpp index 703cadc327..21b91676e0 100644 --- a/pcsx2/Sif.cpp +++ b/pcsx2/Sif.cpp @@ -140,6 +140,7 @@ __forceinline void SIF0Dma() if (sif0.counter == 0) // If there's no more to transfer { // Note.. add normal mode here + // The if statement doesn't seem to match the description... if (sif0.sifData.data & 0xC0000000) // If NORMAL mode or end of CHAIN, or interrupt then stop DMA { SIF_LOG(" IOP SIF Stopped"); @@ -153,7 +154,7 @@ __forceinline void SIF0Dma() PSX_INT(IopEvt_SIF0, psxCycles); sif0.sifData.data = 0; - done = TRUE; + done = true; } else // Chain mode { @@ -173,7 +174,7 @@ __forceinline void SIF0Dma() SIF_LOG(" END"); else SIF_LOG(" CNT %08X, %08X", sif0.sifData.data, sif0.sifData.words); - done = FALSE; + done = false; } } else // There's some data ready to transfer into the fifo.. @@ -220,7 +221,8 @@ __forceinline void SIF0Dma() if (sif0dma->qwc == 0) { - if (((sif0dma->chcr & 0x80000080) == 0x80000080) || (sif0.end)) // Stop on tag IRQ or END + // Stop if TIE & the IRQ are set, or at the end. (I'll try to convert this to use the tags code later.) + if (((sif0dma->chcr & 0x80000080) == 0x80000080) || (sif0.end)) { if (sif0.end) SIF_LOG(" EE SIF end"); @@ -229,7 +231,7 @@ __forceinline void SIF0Dma() eesifbusy[0] = 0; CPU_INT(5, cycles*BIAS); - done = TRUE; + done = true; } else if (sif0.fifoSize >= 4) // Read a tag { @@ -243,11 +245,12 @@ __forceinline void SIF0Dma() SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)", sif0dma->madr, sif0dma->qwc, (tag[0] >> 28)&3, (tag[0] >> 31)&1, tag[1], tag[0]); - if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0] >> 28)&3) == 0) + // (tag[0] >> 28) & 3? Surely this is supposed to be (tag[0] >> 28) & 7? --arcum42 + if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0] >> 28) & 3) == 0) psHu32(DMAC_STADR) = sif0dma->madr + (sif0dma->qwc * 16); sif0.chain = 1; if (tag[0] & 0x40000000) sif0.end = 1; - done = FALSE; + done = false; } } @@ -258,7 +261,6 @@ __forceinline void SIF0Dma() __forceinline void SIF1Dma() { - int id; u32 *ptag; bool done = FALSE; int cycles = 0, psxCycles = 0; @@ -272,12 +274,12 @@ __forceinline void SIF1Dma() if (sif1dma->qwc == 0) // If there's no more to transfer { - if ((sif1dma->chcr & 0xc) == 0 || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA + if ((CHCR::MOD(sif1dma) == NORMAL_MODE) || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA { // Stop & signal interrupts on EE SIF_LOG("EE SIF1 End %x", sif1.end); eesifbusy[1] = 0; - done = TRUE; + done = true; CPU_INT(6, cycles*BIAS); sif1.chain = 0; sif1.end = 0; @@ -285,7 +287,7 @@ __forceinline void SIF1Dma() else // Chain mode { // Process DMA tag at sif1dma->tadr - done = FALSE; + done = false; ptag = _dmaGetAddr(sif1dma, sif1dma->tadr, 6); if (ptag == NULL) return; @@ -295,16 +297,15 @@ __forceinline void SIF1Dma() sif1dma->chcr = (sif1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); // Copy the tag sif1dma->qwc = (u16)ptag[0]; - if (sif1dma->chcr & 0x40) + if (CHCR::TTE(sif1dma)) { Console::WriteLn("SIF1 TTE"); SIF1write(ptag + 2, 2); } sif1.chain = 1; - id = (ptag[0] >> 28) & 0x7; - switch (id) + switch (Tag::Id(ptag)) { case TAG_REFE: // refe SIF_LOG(" REFE %08X", ptag[1]); @@ -342,7 +343,7 @@ __forceinline void SIF1Dma() default: Console::WriteLn("Bad addr1 source chain"); } - if ((sif1dma->chcr & 0x80) && (ptag[0] >> 31)) + if ((CHCR::TIE(sif1dma)) && (Tag::IRQ(ptag))) { Console::WriteLn("SIF1 TIE"); sif1.end = 1; @@ -355,7 +356,7 @@ __forceinline void SIF1Dma() u32 *data; data = _dmaGetAddr(sif1dma, sif1dma->madr, 6); - if (data == NULL) return; + if (data == NULL) return; //_dmaGetAddr(sif1dma, *data, sif1dma->madr, 6); @@ -374,7 +375,7 @@ __forceinline void SIF1Dma() { int size = sif1.counter; - if (size > 0) // If we're reading something continue to do so + if (size > 0) // If we're reading something, continue to do so. { int readSize = size; @@ -401,7 +402,7 @@ __forceinline void SIF1Dma() iopsifbusy[1] = 0; PSX_INT(IopEvt_SIF1, psxCycles); sif1.tagMode = 0; - done = TRUE; + done = true; } else if (sif1.fifoSize >= 4) // Read a tag { @@ -411,7 +412,7 @@ __forceinline void SIF1Dma() HW_DMA10_MADR = d.data & 0xffffff; sif1.counter = d.words; sif1.tagMode = (d.data >> 24) & 0xFF; - done = FALSE; + done = false; } } } @@ -433,14 +434,14 @@ __forceinline void sif1Interrupt() __forceinline void EEsif0Interrupt() { - sif0dma->chcr &= ~0x100; hwDmacIrq(DMAC_SIF0); + CHCR::clearSTR(sif0dma); } __forceinline void EEsif1Interrupt() { hwDmacIrq(DMAC_SIF1); - sif1dma->chcr &= ~0x100; + CHCR::clearSTR(sif1dma); } __forceinline void dmaSIF0() @@ -495,7 +496,7 @@ __forceinline void dmaSIF2() SIF_LOG("dmaSIF2 chcr = %lx, madr = %lx, qwc = %lx", sif2dma->chcr, sif2dma->madr, sif2dma->qwc); - sif2dma->chcr &= ~0x100; + CHCR::clearSTR(sif2dma); hwDmacIrq(DMAC_SIF2); Console::WriteLn("*PCSX2*: dmaSIF2"); } diff --git a/pcsx2/Vif.cpp b/pcsx2/Vif.cpp index 3f38cc471a..2cf78d4192 100644 --- a/pcsx2/Vif.cpp +++ b/pcsx2/Vif.cpp @@ -453,7 +453,7 @@ void mfifoVIF1transfer(int qwc) { ptag = (u32*)dmaGetAddr(vif1ch->tadr); - if (vif1ch->chcr & 0x40) + if (CHCR::TTE(vif1ch)) { if (vif1.stallontag) ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on Stall @@ -467,15 +467,14 @@ void mfifoVIF1transfer(int qwc) return; //IRQ set by VIFTransfer } } - - id = (ptag[0] >> 28) & 0x7; - vif1ch->qwc = (ptag[0] & 0xffff); - vif1ch->madr = ptag[1]; - - vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); + + Tag::UnsafeTransfer(vif1ch, ptag); SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr); + + vif1ch->madr = ptag[1]; + id =Tag::Id(ptag); vifqwc--; switch (id) @@ -514,7 +513,7 @@ void mfifoVIF1transfer(int qwc) break; } - if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31)) + if ((CHCR::TIE(vif1ch)) && (Tag::IRQ(ptag))) { VIF_LOG("dmaIrq Set"); vif1.done = true; @@ -530,29 +529,28 @@ void vifMFIFOInterrupt() { g_vifCycles = 0; - if(schedulepath3msk) Vif1MskPath3(); + if (schedulepath3msk) Vif1MskPath3(); - if((vif1Regs->stat & VIF1_STAT_VGW)) + if ((vif1Regs->stat & VIF1_STAT_VGW)) { - if(gif->chcr & 0x100) + if (CHCR::STR(gif)) { CPU_INT(10, 16); return; } - else vif1Regs->stat &= ~VIF1_STAT_VGW; + else + { + vif1Regs->stat &= ~VIF1_STAT_VGW; + } } - if((spr0->chcr & 0x100) && spr0->qwc == 0) + if ((CHCR::STR(spr0)) && (spr0->qwc == 0)) { - spr0->chcr &= ~0x100; + CHCR::clearSTR(spr0); hwDmacIrq(DMAC_FROM_SPR); } - - - - if (vif1.irq && vif1.tag.size == 0) { vif1Regs->stat |= VIF1_STAT_INT; @@ -561,7 +559,7 @@ void vifMFIFOInterrupt() if (vif1Regs->stat & (VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) { vif1Regs->stat &= ~0x1F000000; // FQC=0 - vif1ch->chcr &= ~0x100; + CHCR::clearSTR(vif1ch); return; } } @@ -608,7 +606,7 @@ void vifMFIFOInterrupt() vif1.done = 1; g_vifCycles = 0; - vif1ch->chcr &= ~0x100; + CHCR::clearSTR(vif1ch); hwDmacIrq(DMAC_VIF1); VIF_LOG("vif mfifo dma end"); From 9da4a53929bc3ac137f661c72486c9a16b9f8baa Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Tue, 18 Aug 2009 00:17:09 +0000 Subject: [PATCH 40/50] microVU: Now properly supports E-bit set on branch delay slot instructions. (Gets rid of "Unknown Micro VU opcode called" errors in Dark Cloud 2, and possibly fixes some other games) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1647 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.h | 1 + pcsx2/x86/microVU_Branch.inl | 16 ++++----- pcsx2/x86/microVU_Compile.inl | 68 +++++++++++++++++++---------------- pcsx2/x86/microVU_Flags.inl | 10 +++--- pcsx2/x86/microVU_IR.h | 3 +- pcsx2/x86/microVU_Lower.inl | 20 +++++------ pcsx2/x86/microVU_Misc.h | 7 ++-- 7 files changed, 67 insertions(+), 58 deletions(-) diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index 38b15cce9d..db7063f98e 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -89,6 +89,7 @@ public: && (linkI->block->pState.flags == pState->flags) && (linkI->block->pState.xgkick == pState->xgkick) && (linkI->block->pState.viBackUp == pState->viBackUp) + && (linkI->block->pState.blockType == pState->blockType) && !(linkI->block->pState.needExactMatch & 5)) { return linkI->block; } linkI = linkI->next; } diff --git a/pcsx2/x86/microVU_Branch.inl b/pcsx2/x86/microVU_Branch.inl index b081222006..27dc66bf37 100644 --- a/pcsx2/x86/microVU_Branch.inl +++ b/pcsx2/x86/microVU_Branch.inl @@ -108,7 +108,7 @@ void normBranch(mV, microFlagCycles& mFC) { normBranchCompile(mVU, branchAddr); } -void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { +void condBranch(mV, microFlagCycles& mFC, int JMPcc) { using namespace x86Emitter; mVUsetupBranch(mVU, mFC); xCMP(ptr16[&mVU->branch], 0); @@ -138,8 +138,8 @@ void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { } else { s32* ajmp = xJcc32((JccComparisonType)JMPcc); - uptr jumpAddr; - u32 bPC = iPC; // mVUcompile can modify iPC and mVUregs so back them up + u32 bPC = iPC; // mVUcompile can modify iPC, mVUpBlock, and mVUregs so back them up + microBlock* pBlock = mVUpBlock; memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); incPC2(1); // Get PC for branch not-taken @@ -147,13 +147,13 @@ void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) { iPC = bPC; incPC(-3); // Go back to branch opcode (to get branch imm addr) - jumpAddr = (uptr)mVUblockFetch(mVU, branchAddr, (uptr)&pBlock->pStateEnd); + uptr jumpAddr = (uptr)mVUblockFetch(mVU, branchAddr, (uptr)&pBlock->pStateEnd); *ajmp = (jumpAddr - ((uptr)ajmp + 4)); } } } -void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) { +void normJump(mV, microFlagCycles& mFC) { using namespace x86Emitter; mVUprint("mVUcompile JR/JALR"); incPC(-3); // Go back to jump opcode @@ -178,12 +178,12 @@ void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) { return; } - memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); + memcpy_fast(&mVUpBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); mVUsetupBranch(mVU, mFC); mVUbackupRegs(mVU); - MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX 1st argument for __fastcall) - MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX 2nd argument for __fastcall) + MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX 1st argument for __fastcall) + MOV32ItoR(gprR, (u32)&mVUpBlock->pStateEnd); // Get pState (EDX 2nd argument for __fastcall) if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState) else xCALL(mVUcompileJIT<1>); diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 79ceb701b3..e01f7727ca 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -170,10 +170,19 @@ microVUt(void) branchWarning(mV) { } } -microVUt(void) eBitWarning(mV) { +microVUt(void) eBitPass1(mV, int& branch) { + if (!mVUregs.blockType) { + branch = 1; + mVUup.eBit = 1; + } +} + +microVUt(void) eBitWarning(mV, u32 endCount) { + if (endCount == 1) Console::Error("microVU%d Warning: Branch, E-bit, Branch! [%04x]", params mVU->index, xPC); incPC(2); if (curI & _Ebit_) { - Console::Error("microVU%d Warning: E-bit in Branch delay slot! [%04x]", params mVU->index, xPC); + DevCon::Status("microVU%d: E-bit in Branch delay slot! [%04x]", params mVU->index, xPC); + mVUregs.blockType = 1; } incPC(-2); } @@ -297,21 +306,21 @@ microVUt(void) mVUinitConstValues(microVU* mVU) { } // Initialize Variables -microVUt(void) mVUinitFirstPass(microVU* mVU, microBlock* &pBlock, uptr pState, u8* thisPtr) { - mVUstartPC = iPC; // Block Start PC - mVUbranch = 0; // Branch Type - mVUcount = 0; // Number of instructions ran - mVUcycles = 0; // Skips "M" phase, and starts counting cycles at "T" stage - mVU->p = 0; // All blocks start at p index #0 - mVU->q = 0; // All blocks start at q index #0 +microVUt(void) mVUinitFirstPass(microVU* mVU, uptr pState, u8* thisPtr) { + mVUstartPC = iPC; // Block Start PC + mVUbranch = 0; // Branch Type + mVUcount = 0; // Number of instructions ran + mVUcycles = 0; // Skips "M" phase, and starts counting cycles at "T" stage + mVU->p = 0; // All blocks start at p index #0 + mVU->q = 0; // All blocks start at q index #0 memcpy_fast(&mVUregs, (microRegInfo*)pState, sizeof(microRegInfo)); // Loads up Pipeline State Info - mVUblock.x86ptrStart = thisPtr; - pBlock = mVUblocks[mVUstartPC/2]->add(&mVUblock); // Add this block to block manager - mVUpBlock = pBlock; - mVUregs.viBackUp= 0; - mVUregs.flags = 0; - mVUflagInfo = 0; - mVUsFlagHack = CHECK_VU_FLAGHACK; + mVUblock.x86ptrStart = thisPtr; + mVUpBlock = mVUblocks[mVUstartPC/2]->add(&mVUblock); // Add this block to block manager + mVUregs.blockType = 0; + mVUregs.viBackUp = 0; + mVUregs.flags = 0; + mVUregs.needExactMatch = 0; + mVUsFlagHack = CHECK_VU_FLAGHACK; mVUinitConstValues(mVU); } @@ -323,22 +332,21 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { using namespace x86Emitter; microFlagCycles mFC; - microBlock* pBlock = NULL; u8* thisPtr = x86Ptr; - const u32 endCount = (mVU->microMemSize / 8) - 1; + const u32 endCount = (((microRegInfo*)pState)->blockType) ? 1 : (mVU->microMemSize / 8); // First Pass iPC = startPC / 4; mVUsetupRange(mVU, startPC, 1); // Setup Program Bounds/Range mVU->regAlloc->reset(); // Reset regAlloc - mVUinitFirstPass(mVU, pBlock, pState, thisPtr); + mVUinitFirstPass(mVU, pState, thisPtr); for (int branch = 0; mVUcount < endCount; mVUcount++) { incPC(1); startLoop(mVU); mVUincCycles(mVU, 1); mVUopU(mVU, 0); - if (curI & _Ebit_) { branch = 1; mVUup.eBit = 1; } + if (curI & _Ebit_) { eBitPass1(mVU, branch); } if (curI & _DTbit_) { branch = 4; } if (curI & _Mbit_) { mVUup.mBit = 1; } if (curI & _Ibit_) { mVUlow.isNOP = 1; mVUup.iBit = 1; } @@ -350,7 +358,7 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { mVUinfo.writeP = !mVU->p; if (branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; } else if (branch == 1) { branch = 2; } - if (mVUbranch) { mVUsetFlagInfo(mVU); eBitWarning(mVU); branch = 3; mVUbranch = 0; } + if (mVUbranch) { mVUsetFlagInfo(mVU); eBitWarning(mVU, endCount); branch = 3; mVUbranch = 0; } incPC(1); } @@ -379,18 +387,18 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { mVUsetupRange(mVU, xPC, 0); mVUdebugNOW(1); switch (mVUbranch) { - case 3: condBranch(mVU, mFC, pBlock, Jcc_Equal); return thisPtr; // IBEQ - case 4: condBranch(mVU, mFC, pBlock, Jcc_GreaterOrEqual); return thisPtr; // IBGEZ - case 5: condBranch(mVU, mFC, pBlock, Jcc_Greater); return thisPtr; // IBGTZ - case 6: condBranch(mVU, mFC, pBlock, Jcc_LessOrEqual); return thisPtr; // IBLEQ - case 7: condBranch(mVU, mFC, pBlock, Jcc_Less); return thisPtr; // IBLTZ - case 8: condBranch(mVU, mFC, pBlock, Jcc_NotEqual); return thisPtr; // IBNEQ - case 1: case 2: normBranch(mVU, mFC); return thisPtr; // B/BAL - case 9: case 10: normJump (mVU, mFC, pBlock); return thisPtr; // JR/JALR + case 1: case 2: normBranch(mVU, mFC); return thisPtr; // B/BAL + case 9: case 10: normJump (mVU, mFC); return thisPtr; // JR/JALR + case 3: condBranch(mVU, mFC, Jcc_Equal); return thisPtr; // IBEQ + case 4: condBranch(mVU, mFC, Jcc_GreaterOrEqual); return thisPtr; // IBGEZ + case 5: condBranch(mVU, mFC, Jcc_Greater); return thisPtr; // IBGTZ + case 6: condBranch(mVU, mFC, Jcc_LessOrEqual); return thisPtr; // IBLEQ + case 7: condBranch(mVU, mFC, Jcc_Less); return thisPtr; // IBLTZ + case 8: condBranch(mVU, mFC, Jcc_NotEqual); return thisPtr; // IBNEQ } } } - if (x == endCount) { Console::Error("microVU%d: Possible infinite compiling loop!", params mVU->index); } + if ((x == endCount) && (x!=1)) { Console::Error("microVU%d: Possible infinite compiling loop!", params mVU->index); } // E-bit End mVUsetupRange(mVU, xPC-8, 0); diff --git a/pcsx2/x86/microVU_Flags.inl b/pcsx2/x86/microVU_Flags.inl index f2c0d1e15c..ddc58d5fe0 100644 --- a/pcsx2/x86/microVU_Flags.inl +++ b/pcsx2/x86/microVU_Flags.inl @@ -248,7 +248,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) { if (mVUbranch) { branch = ((mVUbranch>8)?(5):((mVUbranch<3)?3:4)); aBranchAddr = branchAddr; mVUbranch = 0; } incPC(1); } - if (mVUcount < 4) { mVUflagInfo |= 0x7; } + if (mVUcount < 4) { mVUregs.needExactMatch |= 0x7; } iPC = oldPC; mVUcount = oldCount; mVUbranch = oldBranch; @@ -263,18 +263,18 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) { microVUt(void) mVUsetFlagInfo(mV) { branchType1 { incPC(-1); mVUflagPass(mVU, branchAddr, 4); incPC(1); } branchType2 { - if (!mVUlow.constJump.isValid) { mVUflagInfo |= 0x7; } + if (!mVUlow.constJump.isValid) { mVUregs.needExactMatch |= 0x7; } else { mVUflagPass(mVU, (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8), 4); } } branchType3 { incPC(-1); mVUflagPass(mVU, branchAddr, 4); - int backupFlagInfo = mVUflagInfo; - mVUflagInfo = 0; + int backupFlagInfo = mVUregs.needExactMatch; + mVUregs.needExactMatch = 0; incPC(4); // Branch Not Taken mVUflagPass(mVU, xPC, 4); incPC(-3); - mVUflagInfo |= backupFlagInfo; + mVUregs.needExactMatch |= backupFlagInfo; } } diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index 70a9cc3548..9ace1ed3f5 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -44,7 +44,8 @@ __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares u8 VI[16]; regInfo VF[32]; u8 flags; // clip x2 :: status x2 - u8 padding[6]; // 160 bytes + u8 blockType; // 0 = Normal; 1 = Compile one instruction with E-bit termination + u8 padding[5]; // 160 bytes #if defined(_MSC_VER) }; #else diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 621f58b451..1f696e4dc3 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -458,7 +458,7 @@ mVUop(mVU_FCAND) { mVUallocVIb(mVU, gprT1, 1); } pass3 { mVUlog("FCAND vi01, $%x", _Imm24_); } - pass4 { mVUflagInfo |= 4; } + pass4 { mVUregs.needExactMatch |= 4; } } mVUop(mVU_FCEQ) { @@ -471,7 +471,7 @@ mVUop(mVU_FCEQ) { mVUallocVIb(mVU, gprT1, 1); } pass3 { mVUlog("FCEQ vi01, $%x", _Imm24_); } - pass4 { mVUflagInfo |= 4; } + pass4 { mVUregs.needExactMatch |= 4; } } mVUop(mVU_FCGET) { @@ -482,7 +482,7 @@ mVUop(mVU_FCGET) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FCGET vi%02d", _Ft_); } - pass4 { mVUflagInfo |= 4; } + pass4 { mVUregs.needExactMatch |= 4; } } mVUop(mVU_FCOR) { @@ -495,7 +495,7 @@ mVUop(mVU_FCOR) { mVUallocVIb(mVU, gprT1, 1); } pass3 { mVUlog("FCOR vi01, $%x", _Imm24_); } - pass4 { mVUflagInfo |= 4; } + pass4 { mVUregs.needExactMatch |= 4; } } mVUop(mVU_FCSET) { @@ -520,7 +520,7 @@ mVUop(mVU_FMAND) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FMAND vi%02d, vi%02d", _Ft_, _Fs_); } - pass4 { mVUflagInfo |= 2; } + pass4 { mVUregs.needExactMatch |= 2; } } mVUop(mVU_FMEQ) { @@ -534,7 +534,7 @@ mVUop(mVU_FMEQ) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FMEQ vi%02d, vi%02d", _Ft_, _Fs_); } - pass4 { mVUflagInfo |= 2; } + pass4 { mVUregs.needExactMatch |= 2; } } mVUop(mVU_FMOR) { @@ -546,7 +546,7 @@ mVUop(mVU_FMOR) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FMOR vi%02d, vi%02d", _Ft_, _Fs_); } - pass4 { mVUflagInfo |= 2; } + pass4 { mVUregs.needExactMatch |= 2; } } //------------------------------------------------------------------ @@ -561,7 +561,7 @@ mVUop(mVU_FSAND) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FSAND vi%02d, $%x", _Ft_, _Imm12_); } - pass4 { mVUflagInfo |= 1; } + pass4 { mVUregs.needExactMatch |= 1; } } mVUop(mVU_FSOR) { @@ -572,7 +572,7 @@ mVUop(mVU_FSOR) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FSOR vi%02d, $%x", _Ft_, _Imm12_); } - pass4 { mVUflagInfo |= 1; } + pass4 { mVUregs.needExactMatch |= 1; } } mVUop(mVU_FSEQ) { @@ -604,7 +604,7 @@ mVUop(mVU_FSEQ) { mVUallocVIb(mVU, gprT1, _It_); } pass3 { mVUlog("FSEQ vi%02d, $%x", _Ft_, _Imm12_); } - pass4 { mVUflagInfo |= 1; } + pass4 { mVUregs.needExactMatch |= 1; } } mVUop(mVU_FSSET) { diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 6ae6b3c397..01985cc55f 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -205,7 +205,6 @@ typedef u32 (__fastcall *mVUCall)(void*, void*); #define sFLAG mVUinfo.sFlag #define mFLAG mVUinfo.mFlag #define cFLAG mVUinfo.cFlag -#define mVUflagInfo mVUregs.needExactMatch #define mVUrange mVUcurProg.ranges.range[mVUcurProg.ranges.total] #define xPC ((iPC / 2) * 8) #define curI ((u32*)mVU->regs->Micro)[iPC] //mVUcurProg.data[iPC] @@ -222,9 +221,9 @@ typedef u32 (__fastcall *mVUCall)(void*, void*); #define shuffleSS(x) ((x==1)?(0x27):((x==2)?(0xc6):((x==4)?(0xe1):(0xe4)))) // Flag Info -#define __Status (mVUflagInfo & 1) -#define __Mac (mVUflagInfo & 2) -#define __Clip (mVUflagInfo & 4) +#define __Status (mVUregs.needExactMatch & 1) +#define __Mac (mVUregs.needExactMatch & 2) +#define __Clip (mVUregs.needExactMatch & 4) // Pass 3 Helper Macros #define _Fsf_String ((_Fsf_ == 3) ? "w" : ((_Fsf_ == 2) ? "z" : ((_Fsf_ == 1) ? "y" : "x"))) From a1f45eab3cc4ea101f68cb7bad40901c682a9049 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Tue, 18 Aug 2009 11:15:10 +0000 Subject: [PATCH 41/50] And we can add Gif.cpp to the list of files now using Tags.h git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1648 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Gif.cpp | 74 +++++++++++++++++++++++---------------------------- 1 file changed, 34 insertions(+), 40 deletions(-) diff --git a/pcsx2/Gif.cpp b/pcsx2/Gif.cpp index 7fb313a331..22fc688fbe 100644 --- a/pcsx2/Gif.cpp +++ b/pcsx2/Gif.cpp @@ -65,7 +65,7 @@ __forceinline void gsInterrupt() { GIF_LOG("gsInterrupt: %8.8x", cpuRegs.cycle); - if ((gif->chcr & 0x100) == 0) + if (!(CHCR::STR(gif))) { //Console::WriteLn("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x", params gif->chcr, gif->qwc, done); return; @@ -94,7 +94,7 @@ __forceinline void gsInterrupt() gspath3done = 0; gscycles = 0; - gif->chcr &= ~0x100; + CHCR::clearSTR(gif); vif1Regs->stat &= ~VIF1_STAT_VGW; psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0 @@ -142,7 +142,6 @@ static u32 WRITERING_DMA(u32 *pMem, u32 qwc) int _GIFchain() { - //u32 qwc = ((psHu32(GIF_MODE) & 0x4) || vif1Regs->mskpath3) ? min(8, (int)gif->qwc) : min( gifsplit, (int)gif->qwc ); u32 qwc = min( gifsplit, (int)gif->qwc ); u32 *pMem; @@ -171,7 +170,7 @@ static __forceinline void GIFchain() static __forceinline bool checkTieBit(u32* &ptag) { - if ((gif->chcr & 0x80) && (ptag[0] >> 31)) //Check TIE bit of CHCR and IRQ bit of tag + if ((CHCR::TIE(gif)) && (Tag::IRQ(ptag))) //Check TIE bit of CHCR and IRQ bit of tag { GIF_LOG("dmaIrq Set"); gspath3done = 1; @@ -184,19 +183,13 @@ static __forceinline bool checkTieBit(u32* &ptag) static __forceinline bool ReadTag(u32* &ptag, u32 &id) { ptag = (u32*)dmaGetAddr(gif->tadr); //Set memory pointer to TADR - - if (ptag == NULL) //Is ptag empty? - { - //If yes, set BEIS (BUSERR) in DMAC_STAT register - psHu32(DMAC_STAT)|= DMAC_STAT_BEIS; - return false; - } - gscycles+=2; // Add 1 cycles from the QW read for the tag - gif->chcr = ( gif->chcr & 0xFFFF ) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - - id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag - gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag + + // If this messes things up, uncommenting the "Safe" will set it back to the way it was. + if (!(Tag::/*Safe*/Transfer("Gif", gif, ptag))) return false; gif->madr = ptag[1]; //MADR = ADDR field + + id = Tag::Id(ptag); //ID for DmaChain copied from bit 28 of the tag + gscycles+=2; // Add 1 cycles from the QW read for the tag gspath3done = hwDmacSrcChainWithStack(gif, id); return true; @@ -205,11 +198,11 @@ static __forceinline bool ReadTag(u32* &ptag, u32 &id) static __forceinline void ReadTag2(u32* &ptag) { ptag = (u32*)dmaGetAddr(gif->tadr); //Set memory pointer to TADR - gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag - gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + + Tag::UnsafeTransfer(gif, ptag); gif->madr = ptag[1]; - gspath3done = hwDmacSrcChainWithStack(gif, (ptag[0] >> 28) & 0x7); + gspath3done = hwDmacSrcChainWithStack(gif, Tag::Id(ptag)); } void GIFdma() @@ -255,7 +248,8 @@ void GIFdma() { if (gif->qwc == 0) { - if ((gif->chcr & 0x10c) == 0x104) + //if ((gif->chcr & 0x10c) == 0x104) + if ((CHCR::MOD(gif) == CHAIN_MODE) && CHCR::STR(gif)) { if (!ReadTag(ptag, id)) return; GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1], ptag[0], gif->qwc, id, gif->madr); @@ -278,10 +272,10 @@ void GIFdma() } // Transfer Dn_QWC from Dn_MADR to GIF - if (((gif->chcr & 0xc) == 0) || (gif->qwc > 0)) // Normal Mode + if ((CHCR::MOD(gif) == NORMAL_MODE) || (gif->qwc > 0)) // Normal Mode { - if (((psHu32(DMAC_CTRL) & 0xC0) == 0x80) && ((gif->chcr & 0xc) == 0)) + if (((psHu32(DMAC_CTRL) & 0xC0) == 0x80) && (CHCR::MOD(gif) == NORMAL_MODE)) { Console::WriteLn("DMA Stall Control on GIF normal"); } @@ -291,7 +285,8 @@ void GIFdma() CPU_INT(2, gscycles * BIAS); return; } - if (((gif->chcr & 0xc) == 0x4) && (gspath3done == 0)) // Chain Mode + + if ((CHCR::MOD(gif) == CHAIN_MODE) && (gspath3done == 0)) // Chain Mode { if (!ReadTag(ptag, id)) return; GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1], ptag[0], gif->qwc, id, gif->madr); @@ -320,11 +315,11 @@ void GIFdma() if ((gspath3done == 0) && (gif->qwc == 0)) { ptag = (u32*)dmaGetAddr(gif->tadr); //Set memory pointer to TADR - gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag - gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + + Tag::UnsafeTransfer(gif, ptag); gif->madr = ptag[1]; - gspath3done = hwDmacSrcChainWithStack(gif, (ptag[0] >> 28) & 0x7); + gspath3done = hwDmacSrcChainWithStack(gif, Tag::Id(ptag)); checkTieBit(ptag); @@ -357,7 +352,7 @@ void dmaGIF() return; } - if ((gif->qwc == 0) && ((gif->chcr & 0xc) != 0)) + if ((gif->qwc == 0) && ((CHCR::MOD(gif) != NORMAL_MODE))) { u32 *ptag; @@ -389,7 +384,7 @@ static __forceinline int mfifoGIFrbTransfer() // fixme - I don't think these should use WRITERING_DMA, since our source // isn't the DmaGetAddr(gif->madr) address that WRITERING_DMA expects. - /* it does, so first copy 's1' bytes from 'addr' to 'data' */ + /* it does (wrap around), so first copy 's1' bytes from 'addr' to 'data' */ src = (u32*)PSM(gif->madr); if (src == NULL) return -1; s1 = WRITERING_DMA(src, s1); @@ -410,8 +405,7 @@ static __forceinline int mfifoGIFrbTransfer() } else { - /* it doesn't, so just transfer 'qwc*16' words - from 'gif->madr' to GS */ + /* it doesn't, so just transfer 'qwc*16' words from 'gif->madr' to GS */ src = (u32*)PSM(gif->madr); if (src == NULL) return -1; @@ -429,7 +423,7 @@ static __forceinline int mfifoGIFchain() { /* Is QWC = 0? if so there is nothing to transfer */ if (gif->qwc == 0) return 0; - + if (gif->madr >= psHu32(DMAC_RBOR) && gif->madr <= (psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR))) { @@ -453,8 +447,8 @@ void mfifoGIFtransfer(int qwc) u32 *ptag; int id; u32 temp = 0; - mfifocycles = 0; + mfifocycles = 0; gifmfifoirq = false; if(qwc > 0 ) @@ -479,12 +473,12 @@ void mfifoGIFtransfer(int qwc) gif->tadr = psHu32(DMAC_RBOR) + (gif->tadr & psHu32(DMAC_RBSR)); ptag = (u32*)dmaGetAddr(gif->tadr); - id = (ptag[0] >> 28) & 0x7; - gif->qwc = (ptag[0] & 0xffff); + Tag::UnsafeTransfer(gif, ptag); + gif->madr = ptag[1]; + id =Tag::Id(ptag); mfifocycles += 2; - gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); GIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", ptag[1], ptag[0], gif->qwc, id, gif->madr, gif->tadr, gifqwc, spr0->madr); @@ -522,7 +516,7 @@ void mfifoGIFtransfer(int qwc) break; } - if ((gif->chcr & 0x80) && (ptag[0] >> 31)) + if ((CHCR::TIE(gif)) && (Tag::IRQ(ptag))) { SPR_LOG("dmaIrq Set"); gifstate = GIF_STATE_DONE; @@ -550,13 +544,13 @@ void gifMFIFOInterrupt() mfifocycles = 0; if (Path3progress == STOPPED_MODE) psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0 - if ((spr0->chcr & 0x100) && (spr0->qwc == 0)) + if ((CHCR::STR(spr0)) && (spr0->qwc == 0)) { - spr0->chcr &= ~0x100; + CHCR::clearSTR(spr0); hwDmacIrq(DMAC_FROM_SPR); } - if (!(gif->chcr & 0x100)) + if (!(CHCR::STR(gif))) { Console::WriteLn("WTF GIFMFIFO"); cpuRegs.interrupt &= ~(1 << 11); @@ -602,7 +596,7 @@ void gifMFIFOInterrupt() psHu32(GIF_STAT)&= ~0x1F000000; // QFC=0 vif1Regs->stat &= ~VIF1_STAT_VGW; - gif->chcr &= ~0x100; + CHCR::clearSTR(gif); gifstate = GIF_STATE_READY; hwDmacIrq(DMAC_GIF); clearFIFOstuff(false); From dc4f05d7c24c975a69f6d26afeaa5f716ce007f2 Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Wed, 19 Aug 2009 01:08:40 +0000 Subject: [PATCH 42/50] GSdx: Initial pixel offsetting support via gsdx.ini. Use pixoff_x = somevalue and pixoff_y = somevalue. This can be used as a workaround for the various upscaling errors :) Try these values for Takes of the Abyss for example: pixoff_x=-8 pixoff_y=-8 git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1650 96395faa-99c1-11dd-bbfe-3dabce05a288 --- plugins/GSdx/GSRendererDX.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/plugins/GSdx/GSRendererDX.h b/plugins/GSdx/GSRendererDX.h index 0b8f9dc69f..8afeb2f9a1 100644 --- a/plugins/GSdx/GSRendererDX.h +++ b/plugins/GSdx/GSRendererDX.h @@ -31,6 +31,8 @@ class GSRendererDX : public GSRendererHW GSVector2 m_pixelcenter; bool m_logz; bool m_fba; + int m_pixoff_x; + int m_pixoff_y; protected: int m_topology; @@ -47,6 +49,8 @@ public: { m_logz = !!theApp.GetConfig("logz", 0); m_fba = !!theApp.GetConfig("fba", 1); + m_pixoff_x = theApp.GetConfig("pixoff_x", 0); + m_pixoff_y = theApp.GetConfig("pixoff_y", 0); } virtual ~GSRendererDX() @@ -167,8 +171,8 @@ public: float sx = 2.0f * rt->GetScale().x / (rt->GetWidth() << 4); float sy = 2.0f * rt->GetScale().y / (rt->GetHeight() << 4); - float ox = (float)(int)context->XYOFFSET.OFX; - float oy = (float)(int)context->XYOFFSET.OFY; + float ox = (float)(int)context->XYOFFSET.OFX + m_pixoff_x; + float oy = (float)(int)context->XYOFFSET.OFY + m_pixoff_y; float ox2 = 2.0f * m_pixelcenter.x / rt->GetWidth(); float oy2 = 2.0f * m_pixelcenter.y / rt->GetHeight(); From 614cc7e55d31dd218fe8b3536b82e15ecafb32ca Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Wed, 19 Aug 2009 04:00:53 +0000 Subject: [PATCH 43/50] microVU: minor changes... git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1651 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Analyze.inl | 28 ++++++++++++++++++++-- pcsx2/x86/microVU_Compile.inl | 9 ++++--- pcsx2/x86/microVU_Lower.inl | 45 +++++++++++++++++++---------------- 3 files changed, 57 insertions(+), 25 deletions(-) diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index ad6418b819..5f3a826c73 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -388,14 +388,28 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { else iPC = bPC; } -microVUt(void) mVUanalyzeBranch1(mV, int Is) { +// Branch in Branch Delay-Slots +microVUt(void) mVUbranchCheck(mV) { + if (!mVUcount) return; + incPC(-2); + if (mVUlow.branch) { + incPC(2); + Console::Error("microVU%d Warning: Branch in Branch delay slot! [%04x]", params mVU->index, xPC); + mVUlow.isNOP = 1; + } + else incPC(2); +} + +microVUt(void) mVUanalyzeCondBranch1(mV, int Is) { + mVUbranchCheck(mVU); analyzeVIreg1(Is, mVUlow.VI_read[0]); if (!mVUstall) { analyzeBranchVI(mVU, Is, mVUlow.memReadIs); } } -microVUt(void) mVUanalyzeBranch2(mV, int Is, int It) { +microVUt(void) mVUanalyzeCondBranch2(mV, int Is, int It) { + mVUbranchCheck(mVU); analyzeVIreg1(Is, mVUlow.VI_read[0]); analyzeVIreg1(It, mVUlow.VI_read[1]); if (!mVUstall) { @@ -404,7 +418,17 @@ microVUt(void) mVUanalyzeBranch2(mV, int Is, int It) { } } +microVUt(void) mVUanalyzeNormBranch(mV, int It, bool isBAL) { + mVUbranchCheck(mVU); + if (isBAL) { + analyzeVIreg2(It, mVUlow.VI_write, 1); + setConstReg(It, bSaveAddr); + } +} + microVUt(void) mVUanalyzeJump(mV, int Is, int It, bool isJALR) { + mVUbranchCheck(mVU); + mVUlow.branch = (isJALR) ? 10 : 9; if (mVUconstReg[Is].isValid && !CHECK_VU_CONSTHACK) { mVUlow.constJump.isValid = 1; mVUlow.constJump.regValue = mVUconstReg[Is].regValue; diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index e01f7727ca..6d8a63d375 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -158,11 +158,14 @@ microVUt(void) doSwapOp(mV) { } microVUt(void) branchWarning(mV) { - if (mVUbranch) { - Console::Error("microVU%d Warning: Branch in E-bit/Branch delay slot! [%04x]", params mVU->index, xPC); + incPC(-2); + if (mVUup.eBit && mVUbranch) { + incPC(2); + Console::Error("microVU%d Warning: Branch in E-bit delay slot! [%04x]", params mVU->index, xPC); mVUlow.isNOP = 1; } - if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay + else incPC(2); + if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay Slot Instruction if (mVUlow.VI_write.reg && mVUlow.VI_write.used && !mVUlow.readFlags) { mVUlow.backupVI = 1; mVUregs.viBackUp = mVUlow.VI_write.reg; diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 1f696e4dc3..94e5d15ad9 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -1153,21 +1153,26 @@ mVUop(mVU_XGKICK) { // Branches/Jumps //------------------------------------------------------------------ -#define setBranchA(x, _x_) { \ - pass1 { if (_Imm11_ == 1 && !_x_) { mVUlow.isNOP = 1; return; } mVUbranch = x; } \ - pass2 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } \ - pass3 { mVUbranch = x; } \ - pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } \ +void setBranchA(mP, int x, int _x_) { + pass1 { + if (_Imm11_ == 1 && !_x_) { mVUlow.isNOP = 1; return; } + mVUbranch = x; + mVUlow.branch = x; + } + pass2 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } + pass3 { mVUbranch = x; } + pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } } mVUop(mVU_B) { - setBranchA(1, 0); + setBranchA(mX, 1, 0); + pass1 { mVUanalyzeNormBranch(mVU, 0, 0); } pass3 { mVUlog("B [%04x]", branchAddr, branchAddr); } } mVUop(mVU_BAL) { - setBranchA(2, _It_); - pass1 { analyzeVIreg2(_It_, mVUlow.VI_write, 1); setConstReg(_It_, bSaveAddr); } + setBranchA(mX, 2, _It_); + pass1 { mVUanalyzeNormBranch(mVU, _It_, 1); } pass2 { MOV32ItoR(gprT1, bSaveAddr); mVUallocVIb(mVU, gprT1, _It_); @@ -1176,8 +1181,8 @@ mVUop(mVU_BAL) { } mVUop(mVU_IBEQ) { - setBranchA(3, 0); - pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); } + setBranchA(mX, 3, 0); + pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1189,8 +1194,8 @@ mVUop(mVU_IBEQ) { } mVUop(mVU_IBGEZ) { - setBranchA(4, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 4, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1200,8 +1205,8 @@ mVUop(mVU_IBGEZ) { } mVUop(mVU_IBGTZ) { - setBranchA(5, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 5, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1211,8 +1216,8 @@ mVUop(mVU_IBGTZ) { } mVUop(mVU_IBLEZ) { - setBranchA(6, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 6, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1222,8 +1227,8 @@ mVUop(mVU_IBLEZ) { } mVUop(mVU_IBLTZ) { - setBranchA(7, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 7, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1233,8 +1238,8 @@ mVUop(mVU_IBLTZ) { } mVUop(mVU_IBNE) { - setBranchA(8, 0); - pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); } + setBranchA(mX, 8, 0); + pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); From 0587cdc21085098dcfd97d80825249529dc19a4f Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Wed, 19 Aug 2009 07:48:20 +0000 Subject: [PATCH 44/50] microVU: 70% implemented Branch in Branch Delay Slots. Hopefully I'll finish tomorrow. Compare Star Ocean 3 intro with mVU vs sVU, and you can see mVU now correctly renders the title menu/new game startup screen =) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1652 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.h | 1 + pcsx2/x86/microVU_Analyze.inl | 19 +++++----- pcsx2/x86/microVU_Branch.inl | 36 ++++++++++--------- pcsx2/x86/microVU_Compile.inl | 15 ++++---- pcsx2/x86/microVU_IR.h | 3 +- pcsx2/x86/microVU_Lower.inl | 68 +++++++++++++++++++++++++---------- pcsx2/x86/microVU_Misc.h | 1 + 7 files changed, 92 insertions(+), 51 deletions(-) diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index db7063f98e..3e9066e7ac 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -159,6 +159,7 @@ struct microVU { u32 VIbackup; // Holds a backup of a VI reg if modified before a branch u32 VIxgkick; // Holds a backup of a VI reg used for xgkick-delays u32 branch; // Holds branch compare result (IBxx) OR Holds address to Jump to (JALR/JR) + u32 evilBranch; // For Branches in Branch Delay Slots, holds Address to Jump to u32 p; // Holds current P instance index u32 q; // Holds current Q instance index u32 totalCycles; // Total Cycles that mVU is expected to run for diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index 5f3a826c73..7433bb2314 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -389,30 +389,31 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { } // Branch in Branch Delay-Slots -microVUt(void) mVUbranchCheck(mV) { - if (!mVUcount) return; +microVUt(int) mVUbranchCheck(mV) { + if (!mVUcount) return 0; incPC(-2); if (mVUlow.branch) { incPC(2); - Console::Error("microVU%d Warning: Branch in Branch delay slot! [%04x]", params mVU->index, xPC); - mVUlow.isNOP = 1; + mVUlow.evilBranch = 1; + mVUregs.blockType = 2; + DevCon::Status("microVU%d Warning: Branch in Branch delay slot! [%04x]", params mVU->index, xPC); + return 1; } - else incPC(2); + incPC(2); + return 0; } microVUt(void) mVUanalyzeCondBranch1(mV, int Is) { - mVUbranchCheck(mVU); analyzeVIreg1(Is, mVUlow.VI_read[0]); - if (!mVUstall) { + if (!mVUstall && !mVUbranchCheck(mVU)) { analyzeBranchVI(mVU, Is, mVUlow.memReadIs); } } microVUt(void) mVUanalyzeCondBranch2(mV, int Is, int It) { - mVUbranchCheck(mVU); analyzeVIreg1(Is, mVUlow.VI_read[0]); analyzeVIreg1(It, mVUlow.VI_read[1]); - if (!mVUstall) { + if (!mVUstall && !mVUbranchCheck(mVU)) { analyzeBranchVI(mVU, Is, mVUlow.memReadIs); analyzeBranchVI(mVU, It, mVUlow.memReadIt); } diff --git a/pcsx2/x86/microVU_Branch.inl b/pcsx2/x86/microVU_Branch.inl index 27dc66bf37..efd66e0265 100644 --- a/pcsx2/x86/microVU_Branch.inl +++ b/pcsx2/x86/microVU_Branch.inl @@ -96,10 +96,25 @@ void normBranchCompile(microVU* mVU, u32 branchPC) { else { mVUcompile(mVU, branchPC, (uptr)&mVUregs); } } +void normJumpCompile(mV, microFlagCycles& mFC, bool isEvilJump) { + using namespace x86Emitter; + memcpy_fast(&mVUpBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); + mVUsetupBranch(mVU, mFC); + mVUbackupRegs(mVU); + + if (isEvilJump) MOV32MtoR(gprT2, (uptr)&mVU->evilBranch); + else MOV32MtoR(gprT2, (uptr)&mVU->branch); + MOV32ItoR(gprR, (u32)&mVUpBlock->pStateEnd); + + if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState) + else xCALL(mVUcompileJIT<1>); + + mVUrestoreRegs(mVU); + JMPR(gprT1); // Jump to rec-code address +} + void normBranch(mV, microFlagCycles& mFC) { - incPC(-3); // Go back to branch opcode (to get branch imm addr) - // E-bit Branch if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; } @@ -112,6 +127,7 @@ void condBranch(mV, microFlagCycles& mFC, int JMPcc) { using namespace x86Emitter; mVUsetupBranch(mVU, mFC); xCMP(ptr16[&mVU->branch], 0); + incPC(3); if (mVUup.eBit) { // Conditional Branch With E-Bit Set mVUendProgram(mVU, &mFC, 2); xForwardJump8 eJMP((JccComparisonType)JMPcc); @@ -155,8 +171,6 @@ void condBranch(mV, microFlagCycles& mFC, int JMPcc) { void normJump(mV, microFlagCycles& mFC) { using namespace x86Emitter; - mVUprint("mVUcompile JR/JALR"); - incPC(-3); // Go back to jump opcode if (mVUlow.constJump.isValid) { // Jump Address is Constant if (mVUup.eBit) { // E-bit Jump @@ -175,18 +189,6 @@ void normJump(mV, microFlagCycles& mFC) { MOV32MtoR(gprT1, (uptr)&mVU->branch); MOV32RtoM((uptr)&mVU->regs->VI[REG_TPC].UL, gprT1); xJMP(mVU->exitFunct); - return; } - - memcpy_fast(&mVUpBlock->pStateEnd, &mVUregs, sizeof(microRegInfo)); - mVUsetupBranch(mVU, mFC); - - mVUbackupRegs(mVU); - MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX 1st argument for __fastcall) - MOV32ItoR(gprR, (u32)&mVUpBlock->pStateEnd); // Get pState (EDX 2nd argument for __fastcall) - - if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState) - else xCALL(mVUcompileJIT<1>); - mVUrestoreRegs(mVU); - JMPR(gprT1); // Jump to rec-code address + else normJumpCompile(mVU, mFC, 0); } diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 6d8a63d375..c84abecf8f 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -174,14 +174,15 @@ microVUt(void) branchWarning(mV) { } microVUt(void) eBitPass1(mV, int& branch) { - if (!mVUregs.blockType) { + if (mVUregs.blockType != 1) { branch = 1; mVUup.eBit = 1; } } -microVUt(void) eBitWarning(mV, u32 endCount) { - if (endCount == 1) Console::Error("microVU%d Warning: Branch, E-bit, Branch! [%04x]", params mVU->index, xPC); +microVUt(void) eBitWarning(mV) { + if (mVUpBlock->pState.blockType == 1) Console::Error("microVU%d Warning: Branch, E-bit, Branch! [%04x]", params mVU->index, xPC); + if (mVUpBlock->pState.blockType == 2) Console::Error("microVU%d Warning: Branch, Branch, Branch! [%04x]", params mVU->index, xPC); incPC(2); if (curI & _Ebit_) { DevCon::Status("microVU%d: E-bit in Branch delay slot! [%04x]", params mVU->index, xPC); @@ -361,7 +362,7 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { mVUinfo.writeP = !mVU->p; if (branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; } else if (branch == 1) { branch = 2; } - if (mVUbranch) { mVUsetFlagInfo(mVU); eBitWarning(mVU, endCount); branch = 3; mVUbranch = 0; } + if (mVUbranch) { mVUsetFlagInfo(mVU); eBitWarning(mVU); branch = 3; mVUbranch = 0; } incPC(1); } @@ -385,11 +386,13 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { else { doSwapOp(mVU); } if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); } if (!doRegAlloc) { mVU->regAlloc->flushAll(); } - if (!mVUinfo.isBdelay) { incPC(1); } + if (_isBlock2) { mVUsetupRange(mVU, xPC, 0); normJumpCompile(mVU, mFC, 1); return thisPtr; } + else if (!mVUinfo.isBdelay) { incPC(1); } else { mVUsetupRange(mVU, xPC, 0); mVUdebugNOW(1); - switch (mVUbranch) { + incPC(-3); // Go back to branch opcode + switch (mVUlow.branch) { case 1: case 2: normBranch(mVU, mFC); return thisPtr; // B/BAL case 9: case 10: normJump (mVU, mFC); return thisPtr; // JR/JALR case 3: condBranch(mVU, mFC, Jcc_Equal); return thisPtr; // IBEQ diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index 9ace1ed3f5..8ea463ef7c 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -44,7 +44,7 @@ __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares u8 VI[16]; regInfo VF[32]; u8 flags; // clip x2 :: status x2 - u8 blockType; // 0 = Normal; 1 = Compile one instruction with E-bit termination + u8 blockType; // 0 = Normal; 1 = Compile one instruction (E-bit End); 2 = Compile one instruction (Branch End) u8 padding[5]; // 160 bytes #if defined(_MSC_VER) }; @@ -107,6 +107,7 @@ struct microLowerOp { microVIreg VI_read[2]; // VI regs read by this instruction microConstInfo constJump; // Constant Reg Info for JR/JARL instructions u32 branch; // Branch Type (0 = Not a Branch, 1 = B. 2 = BAL, 3~8 = Conditional Branches, 9 = JALR, 10 = JR) + bool evilBranch;// This instruction is a Branch in a Branch Delay Slot bool isNOP; // This instruction is a NOP bool isFSSET; // This instruction is a FSSET bool noWriteVF; // Don't write back the result of a lower op to VF reg if upper op writes to same reg (or if VF = 0) diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 94e5d15ad9..9b6d3f36c9 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -1164,9 +1164,21 @@ void setBranchA(mP, int x, int _x_) { pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } } +void condEvilBranch(mV, int JMPcc) { + using namespace x86Emitter; + xCMP(ax, 0); + xMOV(ptr32[&mVU->evilBranch], branchAddr); + xForwardJump8 cJMP((JccComparisonType)JMPcc); + incPC(-2); // Branch Not Taken + xMOV(ptr32[&mVU->evilBranch], ((branchAddr+8) & (mVU->microMemSize-8))); + incPC(2); + cJMP.SetTarget(); +} + mVUop(mVU_B) { setBranchA(mX, 1, 0); pass1 { mVUanalyzeNormBranch(mVU, 0, 0); } + pass2 { if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } } pass3 { mVUlog("B [%04x]", branchAddr, branchAddr); } } @@ -1176,76 +1188,93 @@ mVUop(mVU_BAL) { pass2 { MOV32ItoR(gprT1, bSaveAddr); mVUallocVIb(mVU, gprT1, _It_); + if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } } pass3 { mVUlog("BAL vi%02d [%04x]", _Ft_, branchAddr, branchAddr); } } mVUop(mVU_IBEQ) { + using namespace x86Emitter; setBranchA(mX, 3, 0); pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); + if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup); else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); } - MOV32RtoM((uptr)&mVU->branch, gprT1); + + if (!mVUlow.evilBranch) { MOV32RtoM((uptr)&mVU->branch, gprT1); } + else { condEvilBranch(mVU, Jcc_Equal); } } pass3 { mVUlog("IBEQ vi%02d, vi%02d [%04x]", _Ft_, _Fs_, branchAddr, branchAddr); } } mVUop(mVU_IBGEZ) { + using namespace x86Emitter; setBranchA(mX, 4, 0); pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { - if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); - else mVUallocVIa(mVU, gprT1, _Is_); - MOV32RtoM((uptr)&mVU->branch, gprT1); + if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); + else mVUallocVIa(mVU, gprT1, _Is_); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else condEvilBranch(mVU, Jcc_GreaterOrEqual); } pass3 { mVUlog("IBGEZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } } mVUop(mVU_IBGTZ) { + using namespace x86Emitter; setBranchA(mX, 5, 0); pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { - if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); - else mVUallocVIa(mVU, gprT1, _Is_); - MOV32RtoM((uptr)&mVU->branch, gprT1); + if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); + else mVUallocVIa(mVU, gprT1, _Is_); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else condEvilBranch(mVU, Jcc_Greater); } pass3 { mVUlog("IBGTZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } } mVUop(mVU_IBLEZ) { + using namespace x86Emitter; setBranchA(mX, 6, 0); pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { - if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); - else mVUallocVIa(mVU, gprT1, _Is_); - MOV32RtoM((uptr)&mVU->branch, gprT1); + if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); + else mVUallocVIa(mVU, gprT1, _Is_); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else condEvilBranch(mVU, Jcc_LessOrEqual); } pass3 { mVUlog("IBLEZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } } mVUop(mVU_IBLTZ) { + using namespace x86Emitter; setBranchA(mX, 7, 0); pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } - pass2 { - if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); - else mVUallocVIa(mVU, gprT1, _Is_); - MOV32RtoM((uptr)&mVU->branch, gprT1); + pass2 { + if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); + else mVUallocVIa(mVU, gprT1, _Is_); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else condEvilBranch(mVU, Jcc_Less); } pass3 { mVUlog("IBLTZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } } mVUop(mVU_IBNE) { + using namespace x86Emitter; setBranchA(mX, 8, 0); pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); + if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup); else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); } - MOV32RtoM((uptr)&mVU->branch, gprT1); + + if (!mVUlow.evilBranch) { MOV32RtoM((uptr)&mVU->branch, gprT1); } + else { condEvilBranch(mVU, Jcc_NotEqual); } } pass3 { mVUlog("IBNE vi%02d, vi%02d [%04x]", _Ft_, _Fs_, branchAddr, branchAddr); } } @@ -1254,11 +1283,12 @@ mVUop(mVU_JR) { mVUbranch = 9; pass1 { mVUanalyzeJump(mVU, _Is_, 0, 0); } pass2 { - if (!mVUlow.constJump.isValid) { + if (!mVUlow.constJump.isValid || mVUlow.evilBranch) { mVUallocVIa(mVU, gprT1, _Is_); SHL32ItoR(gprT1, 3); AND32ItoR(gprT1, mVU->microMemSize - 8); - MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else MOV32RtoM((uptr)&mVU->evilBranch, gprT1); } } pass3 { mVUlog("JR [vi%02d]", _Fs_); } @@ -1268,11 +1298,13 @@ mVUop(mVU_JALR) { mVUbranch = 10; pass1 { mVUanalyzeJump(mVU, _Is_, _It_, 1); } pass2 { - if (!mVUlow.constJump.isValid) { + if (!mVUlow.constJump.isValid || mVUlow.evilBranch) { mVUallocVIa(mVU, gprT1, _Is_); SHL32ItoR(gprT1, 3); AND32ItoR(gprT1, mVU->microMemSize - 8); MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else MOV32RtoM((uptr)&mVU->evilBranch, gprT1); } MOV32ItoR(gprT1, bSaveAddr); mVUallocVIb(mVU, gprT1, _It_); diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 01985cc55f..3f5ec0c28a 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -206,6 +206,7 @@ typedef u32 (__fastcall *mVUCall)(void*, void*); #define mFLAG mVUinfo.mFlag #define cFLAG mVUinfo.cFlag #define mVUrange mVUcurProg.ranges.range[mVUcurProg.ranges.total] +#define _isBlock2 (mVUpBlock->pState.blockType == 2) #define xPC ((iPC / 2) * 8) #define curI ((u32*)mVU->regs->Micro)[iPC] //mVUcurProg.data[iPC] #define setCode() { mVU->code = curI; } From 490d996abc75a02050643036d30a6d9aa6019622 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Wed, 19 Aug 2009 12:08:50 +0000 Subject: [PATCH 45/50] Tags.h meets SPR.cpp. Plus some more work on Tags.h and Misc... git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1653 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Hw.cpp | 43 +++++--- pcsx2/SPR.cpp | 258 ++++++++++++++++++++++++----------------------- pcsx2/Tags.h | 62 +++++++++++- pcsx2/VifDma.cpp | 8 +- 4 files changed, 226 insertions(+), 145 deletions(-) diff --git a/pcsx2/Hw.cpp b/pcsx2/Hw.cpp index fc3e1ccdd1..4ef9d27c8e 100644 --- a/pcsx2/Hw.cpp +++ b/pcsx2/Hw.cpp @@ -177,37 +177,52 @@ bool hwDmacSrcChainWithStack(DMACh *dma, int id) { dma->madr = dma->tadr + 16; //Set MADR to data following the tag - if ((dma->chcr & 0x30) == 0x0) { //Check if ASR0 is empty + switch(CHCR::ASP(dma)) + { + case 0: { //Check if ASR0 is empty dma->asr0 = dma->madr + (dma->qwc << 4); //If yes store Succeeding tag dma->chcr = (dma->chcr & 0xffffffcf) | 0x10; //1 Address in call stack + break; } - else if((dma->chcr & 0x30) == 0x10){ + case 1: { dma->chcr = (dma->chcr & 0xffffffcf) | 0x20; //2 Addresses in call stack dma->asr1 = dma->madr + (dma->qwc << 4); //If no store Succeeding tag in ASR1 - }else { + break; + } + default: { Console::Notice("Call Stack Overflow (report if it fixes/breaks anything)"); return true; //Return done } + } dma->tadr = temp; //Set TADR to temporarily stored ADDR return false; } case TAG_RET: // Ret - Transfer QWC following the tag, load next tag dma->madr = dma->tadr + 16; //Set MADR to data following the tag - - if ((dma->chcr & 0x30) == 0x20) { //If ASR1 is NOT equal to 0 (Contains address) + switch(CHCR::ASP(dma)) + { + case 2: { //If ASR1 is NOT equal to 0 (Contains address) dma->chcr = (dma->chcr & 0xffffffcf) | 0x10; //1 Address left in call stack dma->tadr = dma->asr1; //Read ASR1 as next tag dma->asr1 = 0; //Clear ASR1 - } - else { //If ASR1 is empty (No address held) - if((dma->chcr & 0x30) == 0x10) { //Check if ASR0 is NOT equal to 0 (Contains address) - dma->chcr = (dma->chcr & 0xffffffcf); //No addresses left in call stack - dma->tadr = dma->asr0; //Read ASR0 as next tag - dma->asr0 = 0; //Clear ASR0 - } else { //Else if ASR1 and ASR0 are empty - //dma->tadr += 16; //Clear tag address - Kills Klonoa 2 - return true; //End Transfer + break; + } + //If ASR1 is empty (No address held) + case 1:{ //Check if ASR0 is NOT equal to 0 (Contains address) + dma->chcr = (dma->chcr & 0xffffffcf); //No addresses left in call stack + dma->tadr = dma->asr0; //Read ASR0 as next tag + dma->asr0 = 0; //Clear ASR0 + break; + } + case 0: { //Else if ASR1 and ASR0 are empty + //dma->tadr += 16; //Clear tag address - Kills Klonoa 2 + return true; //End Transfer + } + default: { //Else if ASR1 and ASR0 are messed up + //Console::Error("TAG_RET: ASR 1 & 0 == 1. This shouldn't happen!"); + //dma->tadr += 16; //Clear tag address - Kills Klonoa 2 + return true; //End Transfer } } return false; diff --git a/pcsx2/SPR.cpp b/pcsx2/SPR.cpp index cb607ef85e..10b0b14b6d 100644 --- a/pcsx2/SPR.cpp +++ b/pcsx2/SPR.cpp @@ -22,6 +22,7 @@ #include "SPR.h" #include "iR5900.h" #include "VUmicro.h" +#include "Tags.h" extern void mfifoGIFtransfer(int); @@ -139,78 +140,82 @@ static __forceinline void _dmaSPR0() } // Transfer Dn_QWC from SPR to Dn_MADR - if ((spr0->chcr & 0xc) == 0x0) // Normal Mode + switch(CHCR::MOD(spr0)) { - SPR0chain(); - spr0finished = 1; - return; - } - else if ((spr0->chcr & 0xc) == 0x4) - { - u32 *ptag; - int id; - bool done = FALSE; - - if (spr0->qwc > 0) + case NORMAL_MODE: { SPR0chain(); spr0finished = 1; return; } - // Destination Chain Mode - ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; - spr0->sadr += 16; - - // Transfer dma tag if tte is set - spr0->chcr = (spr0->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - - id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag - spr0->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag - spr0->madr = ptag[1]; //MADR = ADDR field - - SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", - ptag[1], ptag[0], spr0->qwc, id, spr0->madr, spr0->sadr); - - if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) // STS == fromSPR + case CHAIN_MODE: { - Console::WriteLn("SPR stall control"); - } + u32 *ptag; + int id; + bool done = FALSE; - switch (id) - { - case 0: // CNTS - Transfer QWC following the tag (Stall Control) - if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) psHu32(DMAC_STADR) = spr0->madr + (spr0->qwc * 16); //Copy MADR to DMAC_STADR stall addr register - break; - - case 1: // CNT - Transfer QWC following the tag. - done = FALSE; - break; - - case 7: // End - Transfer QWC following the tag - done = TRUE; - break; - } - SPR0chain(); - if (spr0->chcr & 0x80 && ptag[0] >> 31) //Check TIE bit of CHCR and IRQ bit of tag - { - //Console::WriteLn("SPR0 TIE"); - done = TRUE; - } + if (spr0->qwc > 0) + { + SPR0chain(); + spr0finished = 1; + return; + } + // Destination Chain Mode + ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; + spr0->sadr += 16; - spr0finished = (done) ? 1 : 0; - - if (!done) - { - ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR - CPU_INT(8, ((u16)ptag[0]) / BIAS); // the lower 16bits of the tag / BIAS); - return; + Tag::UnsafeTransfer(spr0, ptag); + id = Tag::Id(ptag); + + spr0->madr = ptag[1]; //MADR = ADDR field + + SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", + ptag[1], ptag[0], spr0->qwc, id, spr0->madr, spr0->sadr); + + if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) // STS == fromSPR + { + Console::WriteLn("SPR stall control"); + } + + switch (id) + { + case TAG_CNTS: // CNTS - Transfer QWC following the tag (Stall Control) + if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) psHu32(DMAC_STADR) = spr0->madr + (spr0->qwc * 16); //Copy MADR to DMAC_STADR stall addr register + break; + + case TAG_CNT: // CNT - Transfer QWC following the tag. + done = FALSE; + break; + + case TAG_END: // End - Transfer QWC following the tag + done = TRUE; + break; + } + SPR0chain(); + if (CHCR::TIE(spr0) && Tag::IRQ(ptag)) //Check TIE bit of CHCR and IRQ bit of tag + { + //Console::WriteLn("SPR0 TIE"); + done = TRUE; + } + + spr0finished = (done) ? 1 : 0; + + if (!done) + { + ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR + CPU_INT(8, ((u16)ptag[0]) / BIAS); // the lower 16bits of the tag / BIAS); + return; + } + SPR_LOG("spr0 dmaChain complete %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", + ptag[1], ptag[0], spr0->qwc, id, spr0->madr); + break; + } + //case INTERLEAVE_MODE: + default: + { + _SPR0interleave(); + break; } - SPR_LOG("spr0 dmaChain complete %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", - ptag[1], ptag[0], spr0->qwc, id, spr0->madr); - } - else // Interleave Mode - { - _SPR0interleave(); } } @@ -227,7 +232,7 @@ void SPRFROMinterrupt() //Console::WriteLn("mfifoGIFtransfer %x madr %x, tadr %x", params gif->chcr, gif->madr, gif->tadr); mfifoGIFtransfer(mfifotransferred); mfifotransferred = 0; - if(gif->chcr & 0x100)return; + if (CHCR::STR(gif)) return; } else if ((psHu32(DMAC_CTRL) & 0xC) == 0x8) // VIF1 MFIFO { @@ -236,11 +241,11 @@ void SPRFROMinterrupt() //Console::WriteLn("mfifoVIF1transfer %x madr %x, tadr %x", params vif1ch->chcr, vif1ch->madr, vif1ch->tadr); mfifoVIF1transfer(mfifotransferred); mfifotransferred = 0; - if(vif1ch->chcr & 0x100)return; + if (CHCR::STR(vif1ch)) return; } } if (spr0finished == 0) return; - spr0->chcr &= ~0x100; + CHCR::clearSTR(spr0); hwDmacIrq(DMAC_FROM_SPR); } @@ -250,7 +255,7 @@ void dmaSPR0() // fromSPR SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx", spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr); - if ((spr0->chcr & 0xc) == 0x4 && spr0->qwc == 0) + if ((CHCR::MOD(spr0) == CHAIN_MODE) && spr0->qwc == 0) { u32 *ptag; ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR @@ -319,76 +324,77 @@ void _SPR1interleave() void _dmaSPR1() // toSPR work function { - if ((spr1->chcr & 0xc) == 0) // Normal Mode + switch(CHCR::MOD(spr1)) { - //int cycles = 0; - // Transfer Dn_QWC from Dn_MADR to SPR1 - SPR1chain(); - spr1finished = 1; - return; - } - else if ((spr1->chcr & 0xc) == 0x4) - { - u32 *ptag; - int id; - bool done = FALSE; - - if (spr1->qwc > 0) + case NORMAL_MODE: { + //int cycles = 0; // Transfer Dn_QWC from Dn_MADR to SPR1 SPR1chain(); spr1finished = 1; return; } - // Chain Mode - - ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR - if (ptag == NULL) //Is ptag empty? + case CHAIN_MODE: { - Console::WriteLn("SPR1 Tag BUSERR"); - spr1->chcr = (spr1->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT) |= DMAC_STAT_BEIS; //If yes, set BEIS (BUSERR) in DMAC_STAT register - done = TRUE; - spr1finished = (done) ? 1: 0; - return; - } - spr1->chcr = (spr1->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + u32 *ptag; + int id; + bool done = FALSE; - id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag - spr1->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag until SPR1chain is called in a few lines. - spr1->madr = ptag[1]; //MADR = ADDR field + if (spr1->qwc > 0) + { + // Transfer Dn_QWC from Dn_MADR to SPR1 + SPR1chain(); + spr1finished = 1; + return; + } + // Chain Mode - // Transfer dma tag if tte is set - if (spr1->chcr & 0x40) - { - SPR_LOG("SPR TTE: %x_%x\n", ptag[3], ptag[2]); - SPR1transfer(ptag, 4); //Transfer Tag - } - - SPR_LOG("spr1 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", - ptag[1], ptag[0], spr1->qwc, id, spr1->madr); - - done = (hwDmacSrcChain(spr1, id) == 1); - SPR1chain(); //Transfers the data set by the switch - - if (spr1->chcr & 0x80 && ptag[0] >> 31) //Check TIE bit of CHCR and IRQ bit of tag - { - SPR_LOG("dmaIrq Set"); - - //Console::WriteLn("SPR1 TIE"); - done = TRUE; - } - - spr1finished = done; - if (!done) - { ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR - CPU_INT(9, (((u16)ptag[0]) / BIAS));// the lower 16 bits of the tag / BIAS); + + if (!(Tag::Transfer("SPR1 Tag", spr1, ptag))) + { + done = TRUE; + spr1finished = (done) ? 1: 0; + } + + id = Tag::Id(ptag); + spr1->madr = ptag[1]; //MADR = ADDR field + + // Transfer dma tag if tte is set + if (CHCR::TTE(spr1)) + { + SPR_LOG("SPR TTE: %x_%x\n", ptag[3], ptag[2]); + SPR1transfer(ptag, 4); //Transfer Tag + } + + SPR_LOG("spr1 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", + ptag[1], ptag[0], spr1->qwc, id, spr1->madr); + + done = (hwDmacSrcChain(spr1, id) == 1); + SPR1chain(); //Transfers the data set by the switch + + if (CHCR::TIE(spr1) && Tag::IRQ(ptag)) //Check TIE bit of CHCR and IRQ bit of tag + { + SPR_LOG("dmaIrq Set"); + + //Console::WriteLn("SPR1 TIE"); + done = TRUE; + } + + spr1finished = done; + if (!done) + { + ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR + CPU_INT(9, (((u16)ptag[0]) / BIAS));// the lower 16 bits of the tag / BIAS); + } + break; + } + //case INTERLEAVE_MODE: + default: + { + _SPR1interleave(); + break; } - } - else // Interleave Mode - { - _SPR1interleave(); } } @@ -400,7 +406,7 @@ void dmaSPR1() // toSPR spr1->chcr, spr1->madr, spr1->qwc, spr1->tadr, spr1->sadr); - if (((spr1->chcr & 0xc) == 0x4) && (spr1->qwc == 0)) + if ((CHCR::MOD(spr1) == CHAIN_MODE) && (spr1->qwc == 0)) { u32 *ptag; ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR @@ -417,7 +423,7 @@ void SPRTOinterrupt() { _dmaSPR1(); if (spr1finished == 0) return; - spr1->chcr &= ~0x100; + CHCR::clearSTR(spr1); hwDmacIrq(DMAC_TO_SPR); } diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 74a8f8d3f4..0de3f9ff3f 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -22,6 +22,42 @@ // Actually, looks like I didn't need templates after all... :) +enum mfd_type +{ + NO_MFD, + MFD_RESERVED, + MFD_VIF1, + MFD_GIF +}; + +enum sts_type +{ + NO_STS, + STS_SIF0, + STS_fromSPR, + STS_fromIPU +}; + +enum std_type +{ + NO_STD, + STD_VIF1, + STD_GIF, + STD_SIF1 +}; + +enum d_ctrl_flags +{ + CTRL_DMAE = 0x1, // 0/1 - disables/enables all DMAs + CTRL_RELE = 0x2, // 0/1 - cycle stealing off/on + CTRL_MFD = 0xC, // Memory FIFO drain channel (mfd_type) + CTRL_STS = 0x30, // Stall Control source channel (sts type) + CTRL_STD = 0xC0, // Stall Controll drain channel (std_type) + CTRL_RCYC = 0x100 // Release cycle (8/16/32/64/128/256) + // When cycle stealing is on, the release cycle sets the period to release + // the bus to EE. +}; + enum pce_values { PCE_NOTHING = 0, @@ -32,6 +68,7 @@ enum pce_values enum tag_id { + TAG_CNTS = 0, TAG_REFE = 0, // Transfer Packet According to ADDR field, clear STR, and end TAG_CNT, // Transfer QWC following the tag. TAG_NEXT, // Transfer QWC following tag. TADR = ADDR @@ -171,7 +208,8 @@ namespace CHCR static __forceinline u8 ASP(DMACh *tag) { - return (TransferMode)((tag->chcr & CHCR_ASP) >> 2); + + return (TransferMode)((tag->chcr & CHCR_ASP) >> 4); } // Clear the individual flags. @@ -250,3 +288,25 @@ namespace QWC tag->qwc = 0; } } + +namespace D_CTRL +{ + static __forceinline bool DMAE() { return !!(psHu32(DMAC_CTRL) & CTRL_DMAE); } + static __forceinline bool RELE() { return !!(psHu32(DMAC_CTRL) & CTRL_RELE); } + static __forceinline bool MFD() + { + return (mfd_type)((psHu32(DMAC_CTRL) & CTRL_MFD) >> 2); + } + static __forceinline bool STS() + { + return (sts_type)((psHu32(DMAC_CTRL) & CTRL_STS) >> 2); + } + static __forceinline bool STD() + { + return (std_type)((psHu32(DMAC_CTRL) & CTRL_STD) >> 2); + } + static __forceinline bool RCLC() + { + return ((((psHu32(DMAC_CTRL) & CTRL_RCYC) >> 3) + 1) * 8); + } +} diff --git a/pcsx2/VifDma.cpp b/pcsx2/VifDma.cpp index a068d00f7b..bfa39930a2 100644 --- a/pcsx2/VifDma.cpp +++ b/pcsx2/VifDma.cpp @@ -1426,7 +1426,7 @@ void vif0Interrupt() if (vif0Regs->stat & (VIF0_STAT_VSS | VIF0_STAT_VIS | VIF0_STAT_VFS)) { vif0Regs->stat &= ~0xF000000; // FQC=0 - vif0ch->chcr &= ~0x100; + CHCR::clearSTR(vif0ch); return; } @@ -1608,7 +1608,7 @@ void vif0Write32(u32 mem, u32 value) else _VIF0chain(); - vif0ch->chcr |= 0x100; + CHCR::setSTR(vif0ch); CPU_INT(0, g_vifCycles); // Gets the timing right - Flatout } } @@ -2535,7 +2535,7 @@ __forceinline void vif1Interrupt() vif1Regs->stat &= ~0x1F000000; // FQC=0 // One game doesnt like vif stalling at end, cant remember what. Spiderman isnt keen on it tho - vif1ch->chcr &= ~0x100; + CHCR::clearSTR(vif1ch); return; } else if ((vif1ch->qwc > 0) || (vif1.irqoffset > 0)) @@ -2580,7 +2580,7 @@ __forceinline void vif1Interrupt() #endif vif1Regs->stat &= ~VIF1_STAT_VPS; //Vif goes idle as the stall happened between commands; - vif1ch->chcr &= ~0x100; + CHCR::clearSTR(vif1ch); g_vifCycles = 0; hwDmacIrq(DMAC_VIF1); From 3c458affadc0545a1d4ac07787ee752d0f63371e Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Thu, 20 Aug 2009 00:49:13 +0000 Subject: [PATCH 46/50] microVU: Finished properly supporting branch in branch delay slots. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1654 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.h | 1 + pcsx2/x86/microVU_Analyze.inl | 1 + pcsx2/x86/microVU_Compile.inl | 2 +- pcsx2/x86/microVU_IR.h | 5 ++- pcsx2/x86/microVU_Lower.inl | 77 +++++++++++++++++++++-------------- pcsx2/x86/microVU_Misc.h | 6 ++- 6 files changed, 56 insertions(+), 36 deletions(-) diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index 3e9066e7ac..49ae3feef6 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -159,6 +159,7 @@ struct microVU { u32 VIbackup; // Holds a backup of a VI reg if modified before a branch u32 VIxgkick; // Holds a backup of a VI reg used for xgkick-delays u32 branch; // Holds branch compare result (IBxx) OR Holds address to Jump to (JALR/JR) + u32 badBranch; // For Branches in Branch Delay Slots, holds Address the first Branch went to + 8 u32 evilBranch; // For Branches in Branch Delay Slots, holds Address to Jump to u32 p; // Holds current P instance index u32 q; // Holds current Q instance index diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index 7433bb2314..b415d738c0 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -393,6 +393,7 @@ microVUt(int) mVUbranchCheck(mV) { if (!mVUcount) return 0; incPC(-2); if (mVUlow.branch) { + mVUlow.badBranch = 1; incPC(2); mVUlow.evilBranch = 1; mVUregs.blockType = 2; diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index c84abecf8f..9113ffbf9d 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -386,7 +386,7 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) { else { doSwapOp(mVU); } if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); } if (!doRegAlloc) { mVU->regAlloc->flushAll(); } - if (_isBlock2) { mVUsetupRange(mVU, xPC, 0); normJumpCompile(mVU, mFC, 1); return thisPtr; } + if (isEvilBlock) { mVUsetupRange(mVU, xPC, 0); normJumpCompile(mVU, mFC, 1); return thisPtr; } else if (!mVUinfo.isBdelay) { incPC(1); } else { mVUsetupRange(mVU, xPC, 0); diff --git a/pcsx2/x86/microVU_IR.h b/pcsx2/x86/microVU_IR.h index 8ea463ef7c..366bd19d53 100644 --- a/pcsx2/x86/microVU_IR.h +++ b/pcsx2/x86/microVU_IR.h @@ -44,7 +44,7 @@ __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares u8 VI[16]; regInfo VF[32]; u8 flags; // clip x2 :: status x2 - u8 blockType; // 0 = Normal; 1 = Compile one instruction (E-bit End); 2 = Compile one instruction (Branch End) + u8 blockType; // 0 = Normal; 1,2 = Compile one instruction (E-bit/Branch Ending) u8 padding[5]; // 160 bytes #if defined(_MSC_VER) }; @@ -107,7 +107,8 @@ struct microLowerOp { microVIreg VI_read[2]; // VI regs read by this instruction microConstInfo constJump; // Constant Reg Info for JR/JARL instructions u32 branch; // Branch Type (0 = Not a Branch, 1 = B. 2 = BAL, 3~8 = Conditional Branches, 9 = JALR, 10 = JR) - bool evilBranch;// This instruction is a Branch in a Branch Delay Slot + bool badBranch; // This instruction is a Branch who has another branch in its Delay Slot + bool evilBranch;// This instruction is a Branch in a Branch Delay Slot (Instruction after badBranch) bool isNOP; // This instruction is a NOP bool isFSSET; // This instruction is a FSSET bool noWriteVF; // Don't write back the result of a lower op to VF reg if upper op writes to same reg (or if VF = 0) diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 9b6d3f36c9..03df227c96 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -1166,19 +1166,32 @@ void setBranchA(mP, int x, int _x_) { void condEvilBranch(mV, int JMPcc) { using namespace x86Emitter; - xCMP(ax, 0); + if (mVUlow.badBranch) { + xMOV(ptr32[&mVU->branch], eax); + xMOV(ptr32[&mVU->badBranch], branchAddrN); + xCMP(ax, 0); + xForwardJump8 cJMP((JccComparisonType)JMPcc); + incPC(4); // Branch Not Taken + xMOV(ptr32[&mVU->badBranch], xPC); + incPC(-4); + cJMP.SetTarget(); + return; + } xMOV(ptr32[&mVU->evilBranch], branchAddr); + xCMP(ax, 0); xForwardJump8 cJMP((JccComparisonType)JMPcc); - incPC(-2); // Branch Not Taken - xMOV(ptr32[&mVU->evilBranch], ((branchAddr+8) & (mVU->microMemSize-8))); - incPC(2); + xMOV(eax, ptr32[&mVU->badBranch]); // Branch Not Taken + xMOV(ptr32[&mVU->evilBranch], eax); cJMP.SetTarget(); } mVUop(mVU_B) { setBranchA(mX, 1, 0); pass1 { mVUanalyzeNormBranch(mVU, 0, 0); } - pass2 { if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } } + pass2 { + if (mVUlow.badBranch) { MOV32ItoM((uptr)&mVU->badBranch, branchAddrN); } + if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } + } pass3 { mVUlog("B [%04x]", branchAddr, branchAddr); } } @@ -1188,7 +1201,8 @@ mVUop(mVU_BAL) { pass2 { MOV32ItoR(gprT1, bSaveAddr); mVUallocVIb(mVU, gprT1, _It_); - if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } + if (mVUlow.badBranch) { MOV32ItoM((uptr)&mVU->badBranch, branchAddrN); } + if (mVUlow.evilBranch) { MOV32ItoM((uptr)&mVU->evilBranch, branchAddr); } } pass3 { mVUlog("BAL vi%02d [%04x]", _Ft_, branchAddr, branchAddr); } } @@ -1204,8 +1218,8 @@ mVUop(mVU_IBEQ) { if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup); else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); } - if (!mVUlow.evilBranch) { MOV32RtoM((uptr)&mVU->branch, gprT1); } - else { condEvilBranch(mVU, Jcc_Equal); } + if (!(isBadOrEvil)) MOV32RtoM((uptr)&mVU->branch, gprT1); + else condEvilBranch(mVU, Jcc_Equal); } pass3 { mVUlog("IBEQ vi%02d, vi%02d [%04x]", _Ft_, _Fs_, branchAddr, branchAddr); } } @@ -1217,7 +1231,7 @@ mVUop(mVU_IBGEZ) { pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); - if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!(isBadOrEvil)) MOV32RtoM((uptr)&mVU->branch, gprT1); else condEvilBranch(mVU, Jcc_GreaterOrEqual); } pass3 { mVUlog("IBGEZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } @@ -1230,7 +1244,7 @@ mVUop(mVU_IBGTZ) { pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); - if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!(isBadOrEvil)) MOV32RtoM((uptr)&mVU->branch, gprT1); else condEvilBranch(mVU, Jcc_Greater); } pass3 { mVUlog("IBGTZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } @@ -1243,7 +1257,7 @@ mVUop(mVU_IBLEZ) { pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); - if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!(isBadOrEvil)) MOV32RtoM((uptr)&mVU->branch, gprT1); else condEvilBranch(mVU, Jcc_LessOrEqual); } pass3 { mVUlog("IBLEZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } @@ -1256,7 +1270,7 @@ mVUop(mVU_IBLTZ) { pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); - if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!(isBadOrEvil)) MOV32RtoM((uptr)&mVU->branch, gprT1); else condEvilBranch(mVU, Jcc_Less); } pass3 { mVUlog("IBLTZ vi%02d [%04x]", _Fs_, branchAddr, branchAddr); } @@ -1273,24 +1287,32 @@ mVUop(mVU_IBNE) { if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup); else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); } - if (!mVUlow.evilBranch) { MOV32RtoM((uptr)&mVU->branch, gprT1); } - else { condEvilBranch(mVU, Jcc_NotEqual); } + if (!(isBadOrEvil)) MOV32RtoM((uptr)&mVU->branch, gprT1); + else condEvilBranch(mVU, Jcc_NotEqual); } pass3 { mVUlog("IBNE vi%02d, vi%02d [%04x]", _Ft_, _Fs_, branchAddr, branchAddr); } } +void normJumpPass2(mV) { + if (!mVUlow.constJump.isValid || mVUlow.evilBranch) { + mVUallocVIa(mVU, gprT1, _Is_); + SHL32ItoR(gprT1, 3); + AND32ItoR(gprT1, mVU->microMemSize - 8); + MOV32RtoM((uptr)&mVU->branch, gprT1); + if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); + else MOV32RtoM((uptr)&mVU->evilBranch, gprT1); + if (mVUlow.badBranch) { + ADD32ItoR(gprT1, 8); + AND32ItoR(gprT1, mVU->microMemSize - 8); + MOV32RtoM((uptr)&mVU->badBranch, gprT1); + } + } +} + mVUop(mVU_JR) { mVUbranch = 9; pass1 { mVUanalyzeJump(mVU, _Is_, 0, 0); } - pass2 { - if (!mVUlow.constJump.isValid || mVUlow.evilBranch) { - mVUallocVIa(mVU, gprT1, _Is_); - SHL32ItoR(gprT1, 3); - AND32ItoR(gprT1, mVU->microMemSize - 8); - if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); - else MOV32RtoM((uptr)&mVU->evilBranch, gprT1); - } - } + pass2 { normJumpPass2(mVU); } pass3 { mVUlog("JR [vi%02d]", _Fs_); } } @@ -1298,14 +1320,7 @@ mVUop(mVU_JALR) { mVUbranch = 10; pass1 { mVUanalyzeJump(mVU, _Is_, _It_, 1); } pass2 { - if (!mVUlow.constJump.isValid || mVUlow.evilBranch) { - mVUallocVIa(mVU, gprT1, _Is_); - SHL32ItoR(gprT1, 3); - AND32ItoR(gprT1, mVU->microMemSize - 8); - MOV32RtoM((uptr)&mVU->branch, gprT1); - if (!mVUlow.evilBranch) MOV32RtoM((uptr)&mVU->branch, gprT1); - else MOV32RtoM((uptr)&mVU->evilBranch, gprT1); - } + normJumpPass2(mVU); MOV32ItoR(gprT1, bSaveAddr); mVUallocVIb(mVU, gprT1, _It_); } diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 3f5ec0c28a..943954a4ed 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -206,14 +206,16 @@ typedef u32 (__fastcall *mVUCall)(void*, void*); #define mFLAG mVUinfo.mFlag #define cFLAG mVUinfo.cFlag #define mVUrange mVUcurProg.ranges.range[mVUcurProg.ranges.total] -#define _isBlock2 (mVUpBlock->pState.blockType == 2) +#define isEvilBlock (mVUpBlock->pState.blockType == 2) +#define isBadOrEvil (mVUlow.badBranch || mVUlow.evilBranch) #define xPC ((iPC / 2) * 8) #define curI ((u32*)mVU->regs->Micro)[iPC] //mVUcurProg.data[iPC] #define setCode() { mVU->code = curI; } #define incPC(x) { iPC = ((iPC + x) & (mVU->progSize-1)); setCode(); } #define incPC2(x) { iPC = ((iPC + x) & (mVU->progSize-1)); } #define bSaveAddr (((xPC + 16) & (mVU->microMemSize-8)) / 8) -#define branchAddr ((xPC + 8 + (_Imm11_ * 8)) & (mVU->microMemSize-8)) +#define branchAddr ((xPC + 8 + (_Imm11_ * 8)) & (mVU->microMemSize-8)) +#define branchAddrN ((xPC + 16 + (_Imm11_ * 8)) & (mVU->microMemSize-8)) #define shufflePQ (((mVU->p) ? 0xb0 : 0xe0) | ((mVU->q) ? 0x01 : 0x04)) #define cmpOffset(x) ((u8*)&(((u8*)x)[mVUprogI.ranges.range[i][0]])) #define Rmem (uptr)&mVU->regs->VI[REG_R].UL From 90b89dfc2da5f3a23d17e554f7b02ebb29f63d39 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Thu, 20 Aug 2009 01:13:42 +0000 Subject: [PATCH 47/50] pcsx2: removed some warnings from the new dma tag code. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1655 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Tags.h | 12 ++++++------ pcsx2/Vif.cpp | 6 +++--- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 0de3f9ff3f..11d664a566 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -293,19 +293,19 @@ namespace D_CTRL { static __forceinline bool DMAE() { return !!(psHu32(DMAC_CTRL) & CTRL_DMAE); } static __forceinline bool RELE() { return !!(psHu32(DMAC_CTRL) & CTRL_RELE); } - static __forceinline bool MFD() + static __forceinline mfd_type MFD() { return (mfd_type)((psHu32(DMAC_CTRL) & CTRL_MFD) >> 2); } - static __forceinline bool STS() + static __forceinline sts_type STS() { - return (sts_type)((psHu32(DMAC_CTRL) & CTRL_STS) >> 2); + return (sts_type)((psHu32(DMAC_CTRL) & CTRL_STS) >> 4); } - static __forceinline bool STD() + static __forceinline std_type STD() { - return (std_type)((psHu32(DMAC_CTRL) & CTRL_STD) >> 2); + return (std_type)((psHu32(DMAC_CTRL) & CTRL_STD) >> 6); } - static __forceinline bool RCLC() + static __forceinline int RCLC() { return ((((psHu32(DMAC_CTRL) & CTRL_RCYC) >> 3) + 1) * 8); } diff --git a/pcsx2/Vif.cpp b/pcsx2/Vif.cpp index 2cf78d4192..99409a647f 100644 --- a/pcsx2/Vif.cpp +++ b/pcsx2/Vif.cpp @@ -469,14 +469,14 @@ void mfifoVIF1transfer(int qwc) } Tag::UnsafeTransfer(vif1ch, ptag); - - SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", - ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr); vif1ch->madr = ptag[1]; id =Tag::Id(ptag); vifqwc--; + SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", + ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr); + switch (id) { case TAG_REFE: // Refe - Transfer Packet According to ADDR field From 685ceb245c7e9aa055b2ce6bd9a0abe0ab9e1053 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Thu, 20 Aug 2009 04:02:39 +0000 Subject: [PATCH 48/50] Disabled precompiled headers for release builds. This fixes the random crash introduced 2 revisions ago (caused by some crappy IPU code we need to eventually get rid of) Since the IPU code randomly works/breaks with different changes to pcsx2, eventually we'll be able to re-enable PCH. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1656 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/windows/VCprojects/pcsx2_2008.vcproj | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj index aa560711a1..d81c52aefe 100644 --- a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj +++ b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj @@ -215,7 +215,7 @@ PreprocessorDefinitions="NDEBUG" ExceptionHandling="2" EnableEnhancedInstructionSet="0" - UsePrecompiledHeader="2" + UsePrecompiledHeader="0" PrecompiledHeaderThrough="PrecompiledHeader.h" PrecompiledHeaderFile="$(IntDir)\$(TargetName).pch" CompileAs="2" From 4ce901c47b7160592fc3defe4babd01ce4143748 Mon Sep 17 00:00:00 2001 From: arcum42 Date: Thu, 20 Aug 2009 12:27:32 +0000 Subject: [PATCH 49/50] Tags.h: 0x8000000 != 0x80000000. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1657 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/Tags.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/pcsx2/Tags.h b/pcsx2/Tags.h index 11d664a566..12f8614aaf 100644 --- a/pcsx2/Tags.h +++ b/pcsx2/Tags.h @@ -184,12 +184,12 @@ namespace Tag static __forceinline bool IRQ(u32 *tag) { - return !!(tag[0] & 0x8000000); + return !!(tag[0] >> 31); } static __forceinline bool IRQ(u32 tag) { - return !!(tag & 0x8000000); + return !!(tag >> 31); } } From cd5934fb57ae6a729f57de73e00cc42470add1f0 Mon Sep 17 00:00:00 2001 From: "Jake.Stine" Date: Thu, 20 Aug 2009 15:53:17 +0000 Subject: [PATCH 50/50] Correct fix for thread affinity in CpuDetect, and fixed commenting in clean_msvc.cmd git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1659 96395faa-99c1-11dd-bbfe-3dabce05a288 --- clean_msvc.cmd | 20 ++++++++++---------- pcsx2/x86/ix86/ix86_cpudetect.cpp | 19 +------------------ 2 files changed, 11 insertions(+), 28 deletions(-) diff --git a/clean_msvc.cmd b/clean_msvc.cmd index a438137585..e00b106ace 100644 --- a/clean_msvc.cmd +++ b/clean_msvc.cmd @@ -1,12 +1,12 @@ --- clean_msvc.cmd --- --- This batch file cleans up some files that MSVC's Clean/Rebuild commands tend to miss. --- In particular the .ilk and .pdb files are known to get corrupted and cause all sorts of odd --- linker errors, and the .ncb files can also get corrupted and cause intellisense breakges. --- --- Safety: This tool should be pretty safe. None of the files it deletes are important. That --- is, they're all files MSVC just rebuilds automatically next time you run/recompile. But even --- so, don't go running this batch file in your root c:\ folder. It's probably not a wise action. --- Enjoy. :) +:: clean_msvc.cmd +:: +:: This batch file cleans up some files that MSVC's Clean/Rebuild commands tend to miss. +:: In particular the .ilk and .pdb files are known to get corrupted and cause all sorts of odd +:: linker errors, and the .ncb files can also get corrupted and cause intellisense breakges. +:: +:: Safety: This tool should be pretty safe. None of the files it deletes are important. That +:: is, they're all files MSVC just rebuilds automatically next time you run/recompile. But even +:: so, don't go running this batch file in your root c:\ folder. It's probably not a wise action. +:: Enjoy. :) del /s *.ncb;*.ilk;*.pdb;*.bsc;*.sbr \ No newline at end of file diff --git a/pcsx2/x86/ix86/ix86_cpudetect.cpp b/pcsx2/x86/ix86/ix86_cpudetect.cpp index 70bad69230..da44c98da3 100644 --- a/pcsx2/x86/ix86/ix86_cpudetect.cpp +++ b/pcsx2/x86/ix86/ix86_cpudetect.cpp @@ -200,7 +200,7 @@ static void SetSingleAffinity() if( availProcCpus & (1<