mirror of https://github.com/PCSX2/pcsx2.git
GIF: Fix MFIFO DMAStalls. Fix InstantDMA with PSE bit set
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ebfd656c54
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@ -423,8 +423,9 @@ void GIFdma()
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if (gifRegs.ctrl.PSE)
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{ // Temporarily stop
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Console.WriteLn("Gif dma temp paused? (non MFIFO GIF)");
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DevCon.WriteLn("Gif dma paused by PSE bit.");
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GifDMAInt(16);
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CPU_SET_DMASTALL(DMAC_GIF, true);
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return;
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}
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@ -434,6 +435,7 @@ void GIFdma()
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if ((gifch.madr + (gifch.qwc * 16)) > dmacRegs.stadr.ADDR)
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{
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GifDMAInt(4);
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CPU_SET_DMASTALL(DMAC_GIF, true);
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gif.gscycles = 0;
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return;
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}
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@ -668,8 +670,9 @@ void mfifoGIFtransfer()
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if (gifRegs.ctrl.PSE)
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{ // Temporarily stop
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Console.WriteLn("Gif dma temp paused?");
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DevCon.WriteLn("Gif MFIFO dma paused by PSE bit.");
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CPU_INT(DMAC_MFIFO_GIF, 16);
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, true);
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return;
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}
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@ -682,6 +685,7 @@ void mfifoGIFtransfer()
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SPR_LOG("GIF FIFO EMPTY before tag read");
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gif.gifstate = GIF_STATE_EMPTY;
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GifDMAInt(4);
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, true);
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return;
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}
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@ -730,7 +734,7 @@ void gifMFIFOInterrupt()
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{ // GIF not in MFIFO anymore, come out.
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DevCon.WriteLn("GIF Leaving MFIFO - Report if any errors");
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gifInterrupt();
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CPU_SET_DMASTALL(DMAC_GIF, true);
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, true);
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return;
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}
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@ -751,7 +755,7 @@ void gifMFIFOInterrupt()
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{
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GifDMAInt(16);
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}
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CPU_SET_DMASTALL(DMAC_GIF, gifUnit.Path3Masked() || !gifUnit.CanDoPath3());
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, gifUnit.Path3Masked() || !gifUnit.CanDoPath3());
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return;
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}
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}
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@ -759,7 +763,7 @@ void gifMFIFOInterrupt()
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if (gifUnit.gsSIGNAL.queued)
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{
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GifDMAInt(128);
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CPU_SET_DMASTALL(DMAC_GIF, true);
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, true);
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return;
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}
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@ -777,7 +781,7 @@ void gifMFIFOInterrupt()
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// If there is no DMA data waiting and the DMA is active, let the DMA progress until there is
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if ((!CheckPaths() && gif_fifo.fifoSize == 16) || readSize)
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{
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CPU_SET_DMASTALL(DMAC_GIF, gifUnit.Path3Masked() || !gifUnit.CanDoPath3());
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, gifUnit.Path3Masked() || !gifUnit.CanDoPath3());
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return;
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}
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}
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@ -792,7 +796,7 @@ void gifMFIFOInterrupt()
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if (gifch.qwc > 0 || !gif.gspath3done)
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{
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CPU_SET_DMASTALL(DMAC_GIF, true);
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, true);
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return;
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}
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}
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@ -800,7 +804,7 @@ void gifMFIFOInterrupt()
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if (gifch.qwc > 0 || !gif.gspath3done)
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{
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mfifoGIFtransfer();
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CPU_SET_DMASTALL(DMAC_GIF, gifUnit.Path3Masked() || !gifUnit.CanDoPath3());
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, gifUnit.Path3Masked() || !gifUnit.CanDoPath3());
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return;
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}
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@ -811,7 +815,7 @@ void gifMFIFOInterrupt()
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gifRegs.stat.FQC = gif_fifo.fifoSize;
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CalculateFIFOCSR();
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hwDmacIrq(DMAC_GIF);
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CPU_SET_DMASTALL(DMAC_GIF, false);
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CPU_SET_DMASTALL(DMAC_MFIFO_GIF, false);
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if (gif_fifo.fifoSize)
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GifDMAInt(8 * BIAS);
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DMA_LOG("GIF MFIFO DMA End");
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