EE/COP2: Increase likely clear sync

This commit is contained in:
refractionpcsx2 2023-04-09 15:37:33 +01:00
parent bf9d087e74
commit e0cfa2dff3
1 changed files with 2 additions and 2 deletions

View File

@ -276,8 +276,8 @@ void COP2MicroFinishPass::Run(u32 start, u32 end, EEINST* inst_cache)
const bool is_lqc_sqc = (_Opcode_ == 066 || _Opcode_ == 076);
const bool is_non_interlocked_move = (_Opcode_ == 022 && _Rs_ < 020 && ((cpuRegs.code & 1) == 0));
// Moving zero to the VU registers, so likely removing a loop/lock.
const bool likely_clear = _Opcode_ == 022 && _Rs_ > 004 && _Rt_ == 000;
if (needs_vu0_sync && (is_lqc_sqc || is_non_interlocked_move))
const bool likely_clear = _Opcode_ == 022 && _Rs_ < 020 && _Rs_ > 004 && _Rt_ == 000;
if ((needs_vu0_sync && (is_lqc_sqc || is_non_interlocked_move)) || likely_clear)
{
bool following_needs_finish = false;
ForEachInstruction(apc + 4, end, inst_cache + 1, [&following_needs_finish](u32 apc2, EEINST* inst2) {