mirror of https://github.com/PCSX2/pcsx2.git
EE/COP2: Increase likely clear sync
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bf9d087e74
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e0cfa2dff3
pcsx2/x86
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@ -276,8 +276,8 @@ void COP2MicroFinishPass::Run(u32 start, u32 end, EEINST* inst_cache)
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const bool is_lqc_sqc = (_Opcode_ == 066 || _Opcode_ == 076);
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const bool is_non_interlocked_move = (_Opcode_ == 022 && _Rs_ < 020 && ((cpuRegs.code & 1) == 0));
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// Moving zero to the VU registers, so likely removing a loop/lock.
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const bool likely_clear = _Opcode_ == 022 && _Rs_ > 004 && _Rt_ == 000;
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if (needs_vu0_sync && (is_lqc_sqc || is_non_interlocked_move))
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const bool likely_clear = _Opcode_ == 022 && _Rs_ < 020 && _Rs_ > 004 && _Rt_ == 000;
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if ((needs_vu0_sync && (is_lqc_sqc || is_non_interlocked_move)) || likely_clear)
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{
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bool following_needs_finish = false;
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ForEachInstruction(apc + 4, end, inst_cache + 1, [&following_needs_finish](u32 apc2, EEINST* inst2) {
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