mirror of https://github.com/PCSX2/pcsx2.git
microVU: minor cleanups
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1631 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -79,18 +79,35 @@ microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
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// Recompiles Code for Proper Flags and Q/P regs on Block Linkings
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// Recompiles Code for Proper Flags and Q/P regs on Block Linkings
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microVUt(void) mVUsetupBranch(mV, microFlagCycles& mFC) {
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microVUt(void) mVUsetupBranch(mV, microFlagCycles& mFC) {
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mVUprint("mVUsetupBranch");
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// Flush Allocated Regs
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mVU->regAlloc->flushAll(); // Flush Allocated Regs
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mVU->regAlloc->flushAll();
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mVUsetupFlags(mVU, mFC); // Shuffle Flag Instances
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// Shuffle Flag Instances
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mVUsetupFlags(mVU, mFC);
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// Shuffle P/Q regs since every block starts at instance #0
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// Shuffle P/Q regs since every block starts at instance #0
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if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); }
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if (mVU->p || mVU->q) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, shufflePQ); }
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}
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}
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void normBranchCompile(microVU* mVU, u32 branchPC) {
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using namespace x86Emitter;
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microBlock* pBlock;
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blockCreate(branchPC/8);
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pBlock = mVUblocks[branchPC/8]->search((microRegInfo*)&mVUregs);
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if (pBlock) { xJMP(pBlock->x86ptrStart); }
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else { mVUcompile(mVU, branchPC, (uptr)&mVUregs); }
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}
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void normBranch(mV, microFlagCycles& mFC) {
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incPC(-3); // Go back to branch opcode (to get branch imm addr)
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// E-bit Branch
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if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; }
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// Normal Branch
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mVUsetupBranch(mVU, mFC);
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normBranchCompile(mVU, branchAddr);
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}
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void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) {
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void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) {
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using namespace x86Emitter;
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using namespace x86Emitter;
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mVUsetupBranch(mVU, mFC);
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mVUsetupBranch(mVU, mFC);
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@ -115,14 +132,9 @@ void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) {
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bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs);
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bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs);
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incPC2(-1);
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incPC2(-1);
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if (bBlock) { // Branch non-taken has already been compiled
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if (bBlock) { // Branch non-taken has already been compiled
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xJcc( xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart );
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xJcc(xInvertCond((JccComparisonType)JMPcc), bBlock->x86ptrStart);
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// Check if branch-block has already been compiled
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incPC(-3); // Go back to branch opcode (to get branch imm addr)
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incPC(-3); // Go back to branch opcode (to get branch imm addr)
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blockCreate(branchAddr/8);
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normBranchCompile(mVU, branchAddr);
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pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs);
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if (pBlock) { xJMP( pBlock->x86ptrStart ); }
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else { mVUblockFetch(mVU, branchAddr, (uptr)&mVUregs); }
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}
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}
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else {
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else {
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s32* ajmp = xJcc32((JccComparisonType)JMPcc);
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s32* ajmp = xJcc32((JccComparisonType)JMPcc);
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@ -141,41 +153,20 @@ void condBranch(mV, microFlagCycles& mFC, microBlock* &pBlock, int JMPcc) {
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}
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}
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}
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}
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void normBranch(mV, microFlagCycles& mFC) {
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using namespace x86Emitter;
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microBlock* pBlock;
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incPC(-3); // Go back to branch opcode (to get branch imm addr)
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// E-bit Branch
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if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, &mFC, 1); return; }
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mVUsetupBranch(mVU, mFC);
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// Check if branch-block has already been compiled
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blockCreate(branchAddr/8);
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pBlock = mVUblocks[branchAddr/8]->search((microRegInfo*)&mVUregs);
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if (pBlock) { xJMP(pBlock->x86ptrStart); }
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else { mVUcompile(mVU, branchAddr, (uptr)&mVUregs); }
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}
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void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) {
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void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) {
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using namespace x86Emitter;
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using namespace x86Emitter;
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mVUprint("mVUcompile JR/JALR");
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mVUprint("mVUcompile JR/JALR");
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incPC(-3); // Go back to jump opcode
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incPC(-3); // Go back to jump opcode
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if (mVUlow.constJump.isValid) {
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if (mVUlow.constJump.isValid) { // Jump Address is Constant
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if (mVUup.eBit) { // E-bit Jump
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if (mVUup.eBit) { // E-bit Jump
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iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1);
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iPC = (mVUlow.constJump.regValue*2)&(mVU->progSize-1);
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mVUendProgram(mVU, &mFC, 1);
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mVUendProgram(mVU, &mFC, 1);
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return;
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}
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}
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else {
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int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8);
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int jumpAddr = (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8);
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mVUsetupBranch(mVU, mFC);
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mVUsetupBranch(mVU, mFC);
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// Check if jump-to-block has already been compiled
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normBranchCompile(mVU, jumpAddr);
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blockCreate(jumpAddr/8);
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pBlock = mVUblocks[jumpAddr/8]->search((microRegInfo*)&mVUregs);
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if (pBlock) { xJMP(pBlock->x86ptrStart); }
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else { mVUcompile(mVU, jumpAddr, (uptr)&mVUregs); }
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}
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return;
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return;
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}
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}
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@ -191,8 +182,8 @@ void normJump(mV, microFlagCycles& mFC, microBlock* &pBlock) {
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mVUsetupBranch(mVU, mFC);
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mVUsetupBranch(mVU, mFC);
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mVUbackupRegs(mVU);
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mVUbackupRegs(mVU);
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MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX first argument for __fastcall)
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MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX 1st argument for __fastcall)
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MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX second argument for __fastcall)
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MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX 2nd argument for __fastcall)
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if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState)
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if (!mVU->index) xCALL(mVUcompileJIT<0>); //(u32 startPC, uptr pState)
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else xCALL(mVUcompileJIT<1>);
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else xCALL(mVUcompileJIT<1>);
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