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Killed the R5900 register sign extension flag (upper 32 bits of the lower 64) as it's checked in literally one instruction and probably isn't exactly well tested. Tracking this is important to liveness optimisations (and the fact that it's never checked may be why liveness isn't really helping), but I noticed it was being set erroneously in some places and decided it's best just to scrap it. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2689 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1 2010-03-10 12:05:35 +00:00
parent d3716fd295
commit d8ef7a4171
9 changed files with 1 additions and 116 deletions
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5
pcsx2/x86/iCore.h
View File

@ -248,13 +248,8 @@ static __forceinline bool FPUINST_LASTUSE(u32 reg) { return !!(g_pCurInstInfo->f
#define EEINST_RESETHASLIVE1(reg) { if( (reg) < 32 ) g_cpuRegHasLive1 &= ~(1<<(reg)); }
#define EEINST_HASLIVE1(reg) (g_cpuPrevRegHasLive1&(1<<(reg)))
#define EEINST_SETSIGNEXT(reg) { if( (reg) < 32 ) g_cpuRegHasSignExt |= (1<<(reg)); }
#define EEINST_RESETSIGNEXT(reg) { if( (reg) < 32 ) g_cpuRegHasSignExt &= ~(1<<(reg)); }
#define EEINST_ISSIGNEXT(reg) (g_cpuPrevRegHasSignExt&(1<<(reg)))
extern u32 g_recWriteback; // used for jumps (VUrec mess!)
extern u32 g_cpuRegHasLive1, g_cpuPrevRegHasLive1;
extern u32 g_cpuRegHasSignExt, g_cpuPrevRegHasSignExt;
extern _xmmregs xmmregs[iREGCNT_XMM], s_saveXMMregs[iREGCNT_XMM];

24
pcsx2/x86/iMMI.cpp
View File

@ -203,7 +203,6 @@ void recPMFHL()
case 0x02: // SLW
// fall to interp
EEINST_SETSIGNEXT(_Rd_);
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
_flushCachedRegs();
@ -1726,9 +1725,6 @@ REC_FUNC_DEL( PROT3W, _Rd_ );
////////////////////////////////////////////////////
void recPMADDW()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
if( !x86caps.hasStreamingSIMD4Extensions ) {
recCall( Interp::PMADDW, _Rd_ );
return;
@ -1777,7 +1773,6 @@ void recPSLLVW()
{
if ( ! _Rd_ ) return;
EEINST_SETSIGNEXT(_Rd_);
int info = eeRecompileCodeXMM( (_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED );
if( _Rs_ == 0 ) {
if( _Rt_ == 0 ) {
@ -1844,7 +1839,6 @@ void recPSRLVW()
{
if ( ! _Rd_ ) return;
EEINST_SETSIGNEXT(_Rd_);
int info = eeRecompileCodeXMM( (_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED );
if( _Rs_ == 0 ) {
if( _Rt_ == 0 ) {
@ -1909,9 +1903,6 @@ void recPSRLVW()
////////////////////////////////////////////////////
void recPMSUBW()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
if( !x86caps.hasStreamingSIMD4Extensions ) {
recCall( Interp::PMSUBW, _Rd_ );
return;
@ -1963,9 +1954,6 @@ void recPMSUBW()
////////////////////////////////////////////////////
void recPMULTW()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
if( !x86caps.hasStreamingSIMD4Extensions ) {
recCall( Interp::PMULTW, _Rd_ );
return;
@ -2007,8 +1995,6 @@ void recPMULTW()
////////////////////////////////////////////////////
void recPDIVW()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
recCall( Interp::PDIVW, _Rd_ );
}
@ -2422,7 +2408,6 @@ void recPSRAVW()
{
if ( ! _Rd_ ) return;
EEINST_SETSIGNEXT(_Rd_);
int info = eeRecompileCodeXMM( (_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED );
if( _Rs_ == 0 ) {
if( _Rt_ == 0 ) {
@ -2542,9 +2527,6 @@ void recPINTEH()
////////////////////////////////////////////////////
void recPMULTUW()
{
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI );
if( !_Rs_ || !_Rt_ ) {
if( _Rd_ ) SSE2_PXOR_XMM_to_XMM(EEREC_D, EEREC_D);
@ -2591,9 +2573,6 @@ void recPMULTUW()
////////////////////////////////////////////////////
void recPMADDUW()
{
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI|XMMINFO_READLO|XMMINFO_READHI );
SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88);
SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]}
@ -2643,11 +2622,8 @@ void recPMADDUW()
}
////////////////////////////////////////////////////
//do EEINST_SETSIGNEXT
void recPDIVUW()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
recCall( Interp::PDIVUW, _Rd_ );
}

5
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -77,7 +77,7 @@ static bool s_nBlockFF;
// save states for branches
GPR_reg64 s_saveConstRegs[32];
static u16 s_savex86FpuState;
static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0, s_saveRegHasLive1 = 0, s_saveRegHasSignExt = 0;
static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0, s_saveRegHasLive1 = 0;
static EEINST* s_psaveInstInfo = NULL;
static u32 s_savenBlockCycles = 0;
@ -962,7 +962,6 @@ void SaveBranchState()
s_saveFlushedConstReg = g_cpuFlushedConstReg;
s_psaveInstInfo = g_pCurInstInfo;
s_saveRegHasLive1 = g_cpuRegHasLive1;
s_saveRegHasSignExt = g_cpuRegHasSignExt;
// save all mmx regs
memcpy_const(s_saveMMXregs, mmxregs, sizeof(mmxregs));
@ -979,7 +978,6 @@ void LoadBranchState()
g_cpuFlushedConstReg = s_saveFlushedConstReg;
g_pCurInstInfo = s_psaveInstInfo;
g_cpuRegHasLive1 = g_cpuPrevRegHasLive1 = s_saveRegHasLive1;
g_cpuRegHasSignExt = g_cpuPrevRegHasSignExt = s_saveRegHasSignExt;
// restore all mmx regs
memcpy_const(mmxregs, s_saveMMXregs, sizeof(mmxregs));
@ -1366,7 +1364,6 @@ static void __fastcall recRecompile( const u32 startpc )
x86FpuState = FPU_STATE;
g_cpuHasConstReg = g_cpuFlushedConstReg = 1;
g_cpuPrevRegHasLive1 = g_cpuRegHasLive1 = 0xffffffff;
g_cpuPrevRegHasSignExt = g_cpuRegHasSignExt = 0;
pxAssume( g_cpuConstRegs[0].UD[0] == 0 );
_initX86regs();

17
pcsx2/x86/ix86-32/iR5900Arit.cpp
View File

@ -126,25 +126,18 @@ void recADD_constv(int info, int creg, int vreg)
void recADD_consts(int info)
{
recADD_constv(info, _Rs_, _Rt_);
EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rt_);
}
// t is constant
void recADD_constt(int info)
{
recADD_constv(info, _Rt_, _Rs_);
EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rs_);
}
// nothing is constant
void recADD_(int info)
{
pxAssert( !(info&PROCESS_EE_XMM) );
EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( _Rd_ == _Rs_ ) {
if( _Rd_ == _Rt_ ) SHL32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 1); // mult by 2
@ -306,8 +299,6 @@ void recSUB_const()
void recSUB_consts(int info)
{
pxAssert( !(info&PROCESS_EE_XMM) );
EEINST_SETSIGNEXT(_Rt_);
EEINST_SETSIGNEXT(_Rd_);
if( _Rd_ == _Rt_ ) {
if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ) SUB32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[ _Rs_ ].UL[ 0 ]);
@ -341,8 +332,6 @@ void recSUB_consts(int info)
void recSUB_constt(int info)
{
pxAssert( !(info&PROCESS_EE_XMM) );
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rd_);
// Fixme: MMX problem
if(0/*!g_cpuConstRegs[_Rt_].UL[0]*/) {
@ -398,9 +387,6 @@ void recSUB_constt(int info)
void recSUB_(int info)
{
pxAssert( !(info&PROCESS_EE_XMM) );
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
EEINST_SETSIGNEXT(_Rd_);
if( !EEINST_ISLIVE1(_Rd_) ) {
if( _Rd_ == _Rs_) {
@ -1054,19 +1040,16 @@ void recSLTU_const()
void recSLTU_consts(int info)
{
recSLTs_consts(info, 0);
EEINST_SETSIGNEXT(_Rd_);
}
void recSLTU_constt(int info)
{
recSLTs_constt(info, 0);
EEINST_SETSIGNEXT(_Rd_);
}
void recSLTU_(int info)
{
pxAssert( !(info & PROCESS_EE_XMM) );
EEINST_SETSIGNEXT(_Rd_);
recSLTs_(info, 0);
}

6
pcsx2/x86/ix86-32/iR5900AritImm.cpp
View File

@ -56,8 +56,6 @@ void recADDI_const( void )
void recADDI_(int info)
{
pxAssert( !(info&PROCESS_EE_XMM) );
EEINST_SETSIGNEXT(_Rt_);
EEINST_SETSIGNEXT(_Rs_);
if ( _Rt_ == _Rs_ ) {
if ( EEINST_ISLIVE1(_Rt_) )
@ -172,8 +170,6 @@ void recSLTIU_(int info)
MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX );
if( EEINST_ISLIVE1(_Rt_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
else EEINST_RESETHASLIVE1(_Rt_);
EEINST_SETSIGNEXT(_Rt_);
}
EERECOMPILE_CODEX(eeRecompileCode1, SLTIU);
@ -205,8 +201,6 @@ void recSLTI_(int info)
MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX );
if( EEINST_ISLIVE1(_Rt_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
else EEINST_RESETHASLIVE1(_Rt_);
EEINST_SETSIGNEXT(_Rt_);
}
EERECOMPILE_CODEX(eeRecompileCode1, SLTI);

4
pcsx2/x86/ix86-32/iR5900LoadStore.cpp
View File

@ -116,7 +116,6 @@ void recLoad64( u32 bits, bool sign )
if( GPR_IS_CONST1( _Rs_ ) )
{
_eeOnLoadWrite(_Rt_);
EEINST_RESETSIGNEXT(_Rt_); // remove the sign extension
_deleteEEreg(_Rt_, 0);
u32 srcadr = g_cpuConstRegs[_Rs_].UL[0] + _Imm_;
if( bits == 128 ) srcadr &= ~0x0f;
@ -132,7 +131,6 @@ void recLoad64( u32 bits, bool sign )
AND32ItoR(ECX,~0x0F); // emitter automatically encodes this as an 8-bit sign-extended imm8
_eeOnLoadWrite(_Rt_);
EEINST_RESETSIGNEXT(_Rt_); // remove the sign extension
_deleteEEreg(_Rt_, 0);
vtlb_DynGenRead64(bits);
@ -337,7 +335,6 @@ void recLDL( void )
{
_deleteEEreg(_Rs_, 1);
_eeOnLoadWrite(_Rt_);
EEINST_RESETSIGNEXT(_Rt_); // remove the sign extension
_deleteEEreg(_Rt_, 1);
MOV32ItoM( (int)&cpuRegs.code, cpuRegs.code );
//MOV32ItoM( (int)&cpuRegs.pc, pc );
@ -349,7 +346,6 @@ void recLDR( void )
{
_deleteEEreg(_Rs_, 1);
_eeOnLoadWrite(_Rt_);
EEINST_RESETSIGNEXT(_Rt_); // remove the sign extension
_deleteEEreg(_Rt_, 1);
MOV32ItoM( (int)&cpuRegs.code, cpuRegs.code );
//MOV32ItoM( (int)&cpuRegs.pc, pc );

23
pcsx2/x86/ix86-32/iR5900MultDiv.cpp
View File

@ -310,10 +310,6 @@ void recMULT_const()
void recMULTUsuper(int info, int upper, int process);
void recMULTsuper(int info, int upper, int process)
{
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( process & PROCESS_CONSTS ) {
MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] );
IMUL32M( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
@ -403,10 +399,6 @@ void recMULTU_const()
void recMULTUsuper(int info, int upper, int process)
{
if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_);
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( process & PROCESS_CONSTS ) {
MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] );
MUL32M( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
@ -521,9 +513,6 @@ void recDIV_const()
void recDIVsuper(int info, int sign, int upper, int process)
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( process & PROCESS_CONSTT )
MOV32ItoR( ECX, g_cpuConstRegs[_Rt_].UL[0] );
else
@ -682,9 +671,6 @@ EERECOMPILE_CODE0(DIVU1, XMMINFO_READS|XMMINFO_READT);
void recMADD()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( GPR_IS_CONST2(_Rs_, _Rt_) ) {
u64 result = ((s64)g_cpuConstRegs[_Rs_].SL[0] * (s64)g_cpuConstRegs[_Rt_].SL[0]);
_deleteEEreg(XMMGPR_LO, 1);
@ -757,9 +743,6 @@ void recMADD()
void recMADDU()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( GPR_IS_CONST2(_Rs_, _Rt_) ) {
u64 result = ((u64)g_cpuConstRegs[_Rs_].UL[0] * (u64)g_cpuConstRegs[_Rt_].UL[0]);
_deleteEEreg(XMMGPR_LO, 1);
@ -830,9 +813,6 @@ void recMADDU()
void recMADD1()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( GPR_IS_CONST2(_Rs_, _Rt_) ) {
u64 result = ((s64)g_cpuConstRegs[_Rs_].SL[0] * (s64)g_cpuConstRegs[_Rt_].SL[0]);
_deleteEEreg(XMMGPR_LO, 1);
@ -905,9 +885,6 @@ void recMADD1()
void recMADDU1()
{
EEINST_SETSIGNEXT(_Rs_);
EEINST_SETSIGNEXT(_Rt_);
if( GPR_IS_CONST2(_Rs_, _Rt_) ) {
u64 result = ((u64)g_cpuConstRegs[_Rs_].UL[0] * (u64)g_cpuConstRegs[_Rt_].UL[0]);
_deleteEEreg(XMMGPR_LO, 1);

20
pcsx2/x86/ix86-32/iR5900Shift.cpp
View File

@ -83,7 +83,6 @@ void recSLLs_(int info, int sa)
void recSLL_(int info)
{
recSLLs_(info, _Sa_);
EEINST_SETSIGNEXT(_Rd_);
}
EERECOMPILE_CODEX(eeRecompileCode2, SLL);
@ -115,7 +114,6 @@ void recSRLs_(int info, int sa)
void recSRL_(int info)
{
recSRLs_(info, _Sa_);
EEINST_SETSIGNEXT(_Rd_);
}
EERECOMPILE_CODEX(eeRecompileCode2, SRL);
@ -147,7 +145,6 @@ void recSRAs_(int info, int sa)
void recSRA_(int info)
{
recSRAs_(info, _Sa_);
EEINST_SETSIGNEXT(_Rd_);
}
EERECOMPILE_CODEX(eeRecompileCode2, SRA);
@ -227,11 +224,6 @@ void recDSRAs_(int info, int sa)
if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg);
if( EEINST_ISSIGNEXT(_Rt_) && EEINST_HASLIVE1(_Rt_) ) {
PSRADItoR(rdreg, sa);
return;
}
if( !EEINST_ISLIVE1(_Rd_) ) {
EEINST_RESETHASLIVE1(_Rd_);
PSRLQItoR(rdreg, sa);
@ -404,7 +396,6 @@ void recSLLV_const()
void recSLLV_consts(int info)
{
recSLLs_(info, g_cpuConstRegs[_Rs_].UL[0]&0x1f);
EEINST_SETSIGNEXT(_Rd_);
}
void recSLLV_constt(int info)
@ -416,13 +407,10 @@ void recSLLV_constt(int info)
SHL32CLtoR( EAX );
recMoveSignToRd(info);
EEINST_SETSIGNEXT(_Rd_);
}
void recSLLV_(int info)
{
EEINST_SETSIGNEXT(_Rd_);
MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
if ( _Rs_ != 0 )
{
@ -446,7 +434,6 @@ void recSRLV_const()
void recSRLV_consts(int info)
{
recSRLs_(info, g_cpuConstRegs[_Rs_].UL[0]&0x1f);
EEINST_SETSIGNEXT(_Rd_);
}
void recSRLV_constt(int info)
@ -458,13 +445,10 @@ void recSRLV_constt(int info)
SHR32CLtoR( EAX );
recMoveSignToRd(info);
EEINST_SETSIGNEXT(_Rd_);
}
void recSRLV_(int info)
{
EEINST_SETSIGNEXT(_Rd_);
MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
if ( _Rs_ != 0 )
{
@ -488,7 +472,6 @@ void recSRAV_const()
void recSRAV_consts(int info)
{
recSRAs_(info, g_cpuConstRegs[_Rs_].UL[0]&0x1f);
EEINST_SETSIGNEXT(_Rd_);
}
void recSRAV_constt(int info)
@ -500,13 +483,10 @@ void recSRAV_constt(int info)
SAR32CLtoR( EAX );
recMoveSignToRd(info);
EEINST_SETSIGNEXT(_Rd_);
}
void recSRAV_(int info)
{
EEINST_SETSIGNEXT(_Rd_);
MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
if ( _Rs_ != 0 )
{

13
pcsx2/x86/ix86-32/iR5900Templates.cpp
View File

@ -38,15 +38,6 @@ void _eeProcessHasLive(int reg, int signext)
{
g_cpuPrevRegHasLive1 = g_cpuRegHasLive1;
g_cpuRegHasLive1 |= 1<<reg;
g_cpuPrevRegHasSignExt = g_cpuRegHasSignExt;
if( signext ) {
EEINST_SETSIGNEXT(reg);
}
else {
EEINST_RESETSIGNEXT(reg);
}
}
void _eeOnWriteReg(int reg, int signext)
@ -93,7 +84,6 @@ void eeRecompileCode0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R5900FNP
if( xmminfo&XMMINFO_WRITED) {
_eeProcessHasLive(_Rd_, 0);
EEINST_RESETSIGNEXT(_Rd_);
}
if( GPR_IS_CONST2(_Rs_, _Rt_) ) {
@ -274,7 +264,6 @@ void eeRecompileCode1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
if ( ! _Rt_ ) return;
_eeProcessHasLive(_Rt_, 0);
EEINST_RESETSIGNEXT(_Rt_);
if( GPR_IS_CONST1(_Rs_) ) {
_deleteMMXreg(MMX_GPR+_Rt_, 2);
@ -336,7 +325,6 @@ void eeRecompileCode2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
if ( ! _Rd_ ) return;
_eeProcessHasLive(_Rd_, 0);
EEINST_RESETSIGNEXT(_Rd_);
if( GPR_IS_CONST1(_Rt_) ) {
_deleteMMXreg(MMX_GPR+_Rd_, 2);
@ -540,7 +528,6 @@ int eeRecompileCodeXMM(int xmminfo)
// save state
if( xmminfo & XMMINFO_WRITED ) {
_eeProcessHasLive(_Rd_, 0);
EEINST_RESETSIGNEXT(_Rd_);
}
// flush consts