mirror of https://github.com/PCSX2/pcsx2.git
minor fixes
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@55 a6443dda-0b58-4228-96e9-037be469359c
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8e9c52a688
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d307bd6275
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@ -316,12 +316,10 @@ void LoadCW( void ) {
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void recCOP1_S( void )
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{
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#ifndef __x86_64__
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#ifndef EE_FPU_REGCACHING
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if( !cpucaps.hasStreamingSIMD2Extensions) {
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if( !EE_FPU_REGCACHING || !cpucaps.hasStreamingSIMD2Extensions ) {
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_freeMMXreg(6);
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_freeMMXreg(7);
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}
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#endif
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#endif
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recCP1S[ _Funct_ ]( );
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}
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@ -330,10 +328,10 @@ void recCOP1_S( void )
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void recCOP1_W( void )
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{
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#ifndef __x86_64__
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#ifndef EE_FPU_REGCACHING
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if( !EE_FPU_REGCACHING ) {
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_freeMMXreg(6);
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_freeMMXreg(7);
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#endif
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}
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#endif
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recCP1W[ _Funct_ ]( );
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}
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@ -41,7 +41,7 @@
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#define CP2_RECOMPILE
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#define EE_CONST_PROP // rec2 - enables constant propagation (faster)
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#define EE_FPU_REGCACHING
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#define EE_FPU_REGCACHING 1
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#define PC_GETBLOCK(x) PC_GETBLOCK_(x, recLUT)
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@ -2857,13 +2857,11 @@ void VuBaseBlock::Recompile()
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MOV32RtoM((uptr)&VU->VI[REG_CLIP_FLAG], EAX);
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}
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if( s_PrevStatusWrite != (uptr)&VU->VI[REG_STATUS_FLAG] ) {
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// only lower 8 bits valid!
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MOVZX32M8toR(EAX, s_PrevStatusWrite);
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MOV32MtoR(EAX, s_PrevStatusWrite);
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MOV32RtoM((uptr)&VU->VI[REG_STATUS_FLAG], EAX);
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}
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if( s_PrevMACWrite != (uptr)&VU->VI[REG_MAC_FLAG] ) {
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// only lower 8 bits valid!
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MOVZX32M8toR(EAX, s_PrevMACWrite);
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MOV32MtoR(EAX, s_PrevMACWrite);
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MOV32RtoM((uptr)&VU->VI[REG_MAC_FLAG], EAX);
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}
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// if( s_StatusRead != (uptr)&VU->VI[REG_STATUS_FLAG] ) {
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@ -3213,6 +3211,7 @@ void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
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s_ClipRead = (uptr)&VU->VI[REG_CLIP_FLAG];
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else {
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s_ClipRead = s_pCurBlock->GetInstIterAtPc(nParentPc)->pClipWrite;
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if (s_ClipRead == NULL) SysPrintf("super ClipRead allocation error! \n");
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}
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}
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@ -3274,6 +3273,7 @@ void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
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}
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else {
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s_StatusRead = s_pCurBlock->GetInstIterAtPc(nParentPc)->pStatusWrite;
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if (s_StatusRead == NULL) SysPrintf("super StatusRead allocation error! \n");
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// if( pc >= (u32)s_pCurBlock->endpc-8 ) {
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// // towards the end, so variable might be leaded to another block (silent hill 4)
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// uptr tempstatus = (uptr)SuperVUStaticAlloc(4);
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@ -3409,7 +3409,7 @@ void VuInstruction::Recompile(list<VuInstruction>::iterator& itinst, u32 vuxyz)
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}
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}
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if( pClipWrite == 0 && ((regs[0].VIwrite|regs[1].VIwrite) & (1<<REG_CLIP_FLAG)) ) {
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if( pClipWrite == NULL && ((regs[0].VIwrite|regs[1].VIwrite) & (1<<REG_CLIP_FLAG)) ) {
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pClipWrite = (uptr)SuperVUStaticAlloc(4);
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//MOV32ItoM(pClipWrite, 0);
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}
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@ -1294,8 +1294,7 @@ void eeFPURecompileCode(R5900FNPTR_INFO xmmcode, R5900FNPTR_INFO fpucode, int xm
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{
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int mmregs=-1, mmregt=-1, mmregd=-1, mmregacc=-1;
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#ifdef EE_FPU_REGCACHING
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if( cpucaps.hasStreamingSIMDExtensions ) {
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if( EE_FPU_REGCACHING && cpucaps.hasStreamingSIMDExtensions ) {
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int info = PROCESS_EE_XMM;
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if( xmminfo & XMMINFO_READS ) _addNeededFPtoXMMreg(_Fs_);
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@ -1435,7 +1434,6 @@ void eeFPURecompileCode(R5900FNPTR_INFO xmmcode, R5900FNPTR_INFO fpucode, int xm
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_clearNeededXMMregs();
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return;
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}
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#endif //EE_FPU_REGCACHING
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if( xmminfo & XMMINFO_READS ) _deleteFPtoXMMreg(_Fs_, 0);
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if( xmminfo & XMMINFO_READT ) _deleteFPtoXMMreg(_Ft_, 0);
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