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some odd code on ir5900-32, and small cleanup 

git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@54 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
ramapcsx2 2008-08-20 14:56:23 +00:00 committed by Gregory Hainaut
parent 6e6026e71e
commit 8e9c52a688
4 changed files with 12 additions and 9 deletions
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8
pcsx2/x86/iFPU.c
View File

@ -316,10 +316,12 @@ void LoadCW( void ) {
void recCOP1_S( void )
{
#ifndef __x86_64__
if( !EE_FPU_REGCACHING || !cpucaps.hasStreamingSIMD2Extensions) {
#ifndef EE_FPU_REGCACHING
if( !cpucaps.hasStreamingSIMD2Extensions) {
_freeMMXreg(6);
_freeMMXreg(7);
}
#endif
#endif
recCP1S[ _Funct_ ]( );
}
@ -328,10 +330,10 @@ void recCOP1_S( void )
void recCOP1_W( void )
{
#ifndef __x86_64__
if( !EE_FPU_REGCACHING ) {
#ifndef EE_FPU_REGCACHING
_freeMMXreg(6);
_freeMMXreg(7);
}
#endif
#endif
recCP1W[ _Funct_ ]( );
}

2
pcsx2/x86/iR5900.h
View File

@ -41,7 +41,7 @@
#define CP2_RECOMPILE
#define EE_CONST_PROP // rec2 - enables constant propagation (faster)
#define EE_FPU_REGCACHING 1
#define EE_FPU_REGCACHING
#define PC_GETBLOCK(x) PC_GETBLOCK_(x, recLUT)

2
pcsx2/x86/iR5900LoadStore.h
View File

@ -81,7 +81,7 @@ void recSQC2_co( void );
void recLD_coX(int num);
void recLQ_coX(int num);
void recLWC1_coX(int num);
void recSD_coX(int num);
void recSD_coX(int num, int align);
void recSQ_coX(int num);
void recSWC1_coX(int num);

9
pcsx2/x86/ix86-32/iR5900-32.c
View File

@ -518,7 +518,6 @@ void _deleteEEreg(int reg, int flush)
// if not mmx, then xmm
int eeProcessHILO(int reg, int mode, int mmx)
{
int info = 0;
int usemmx = mmx && _hasFreeMMXreg();
if( (usemmx || _hasFreeXMMreg()) || !(g_pCurInstInfo->regs[reg]&EEINST_LASTUSE) ) {
if( usemmx ) return _allocMMXreg(-1, MMX_GPR+reg, mode);
@ -1295,7 +1294,8 @@ void eeFPURecompileCode(R5900FNPTR_INFO xmmcode, R5900FNPTR_INFO fpucode, int xm
{
int mmregs=-1, mmregt=-1, mmregd=-1, mmregacc=-1;
if( EE_FPU_REGCACHING && cpucaps.hasStreamingSIMDExtensions ) {
#ifdef EE_FPU_REGCACHING
if( cpucaps.hasStreamingSIMDExtensions ) {
int info = PROCESS_EE_XMM;
if( xmminfo & XMMINFO_READS ) _addNeededFPtoXMMreg(_Fs_);
@ -1435,6 +1435,7 @@ void eeFPURecompileCode(R5900FNPTR_INFO xmmcode, R5900FNPTR_INFO fpucode, int xm
_clearNeededXMMregs();
return;
}
#endif //EE_FPU_REGCACHING
if( xmminfo & XMMINFO_READS ) _deleteFPtoXMMreg(_Fs_, 0);
if( xmminfo & XMMINFO_READT ) _deleteFPtoXMMreg(_Ft_, 0);
@ -2608,7 +2609,7 @@ void recompileNextInstruction(int delayslot)
case 49: recLWC1_coX(g_pCurInstInfo->numpeeps); break;
case 57: recSWC1_coX(g_pCurInstInfo->numpeeps); break;
case 55: recLD_coX(g_pCurInstInfo->numpeeps); break;
case 63: recSD_coX(g_pCurInstInfo->numpeeps); break;
case 63: recSD_coX(g_pCurInstInfo->numpeeps, 0); break; //the 0 is just temporary, find out what should go there
default:
assert(0);
}
@ -2957,7 +2958,7 @@ void recRecompile( u32 startpc )
if( _Rt_ < 4 || (_Rt_ >= 16 && _Rt_ < 20) ) {
// branches
if( _Rt_ == 2 && _Rt_ == 3 && _Rt_ == 18 && _Rt_ == 19 ) s_nHasDelay = 1;
if( _Rt_ == 2 || _Rt_ == 3 || _Rt_ == 18 || _Rt_ == 19 ) s_nHasDelay = 1;
else s_nHasDelay = 2;
branchTo = _Imm_ * 4 + i + 4;