microVU:

- Further optimized status flag updating...

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1316 96395faa-99c1-11dd-bbfe-3dabce05a288

pcsx2/x86/microVU_Analyze.inl

@@ -296,6 +296,15 @@ microVUt(void) mVUanalyzeR2(mV, int Ft, bool canBeNOP) {
 //------------------------------------------------------------------
 // Sflag - Status Flag Opcodes
 //------------------------------------------------------------------
+#define flagSet(xFLAG) {											\
+	int curPC = iPC;												\
+	for (int i = mVUcount, j = 0; i > 0; i--, j++) {				\
+		incPC2(-2);													\
+		if (sFLAG.doFlag) { xFLAG = 1; if (j >= 3) { break; } }		\
+	}																\
+	iPC = curPC;													\
+}
+
 
 microVUt(void) mVUanalyzeSflag(mV, int It) {
 	if (!It) { mVUlow.isNOP = 1; }
@@ -310,6 +319,7 @@ microVUt(void) mVUanalyzeSflag(mV, int It) {
 	}
 	mVUlow.readFlags = 1;
 	analyzeVIreg2(It, mVUlow.VI_write, 1);
+	flagSet(sFLAG.doNonSticky);
 }
 
 microVUt(void) mVUanalyzeFSSET(mV) {
@@ -326,16 +336,12 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
 	else { // Need set _doMac for 4 previous Ops (need to do all 4 because stalls could change the result needed)
 		mVUinfo.swapOps = 1;
 		if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << (/*mVUcount +*/ 4); }
-		int curPC = iPC;
+
-		for (int i = mVUcount, j = 0; i > 0; i--, j++) {
-			incPC2(-2);
-			if (sFLAG.doFlag) { mFLAG.doFlag = 1; if (j >= 3) { break; } }
-		}
-		iPC = curPC;
 	}
 	mVUlow.readFlags = 1;
 	analyzeVIreg1(Is, mVUlow.VI_read[0]);
 	analyzeVIreg2(It, mVUlow.VI_write, 1);
+	flagSet(mFLAG.doFlag);
 }
 
 //------------------------------------------------------------------

pcsx2/x86/microVU_Flags.inl

@@ -77,9 +77,13 @@ microVUt(int) mVUsetFlags(mV, int* xStatus, int* xMac, int* xClip) {
 	int endPC  = iPC;
 	u32 aCount = 1; // Amount of instructions needed to get valid mac flag instances for block linking
 
-	// Ensure last ~4+ instructions update mac flags (if next block's first 4 instructions will read them)
+	// Ensure last ~4+ instructions update mac/status flags (if next block's first 4 instructions will read them)
 	for (int i = mVUcount; i > 0; i--, aCount++) {
-		if (sFLAG.doFlag) { if (__Mac) { mFLAG.doFlag = 1; } if (aCount >= 4) { break; } }
+		if (sFLAG.doFlag) { 
+			if (__Mac)	  { mFLAG.doFlag = 1; } 
+			if (__Status) { sFLAG.doNonSticky = 1; } 		
+			if (aCount >= 4) { break; } 
+		}
 		incPC2(-2);
 	}
 

pcsx2/x86/microVU_IR.h

@@ -102,10 +102,11 @@ struct microLowerOp {
 };
 
 struct microFlagInst {
-	bool doFlag;	// Update Flag on this Instruction
+	bool doFlag;	  // Update Flag on this Instruction
-	u8	 write;		// Points to the instance that should be written to (s-stage write)
+	bool doNonSticky; // Update O,U,S,Z (non-sticky) bits on this Instruction (status flag only)
-	u8	 lastWrite;	// Points to the instance that was last written to (most up-to-date flag)
+	u8	 write;		  // Points to the instance that should be written to (s-stage write)
-	u8	 read;		// Points to the instance that should be read by a lower instruction (t-stage read)
+	u8	 lastWrite;	  // Points to the instance that was last written to (most up-to-date flag)
+	u8	 read;		  // Points to the instance that should be read by a lower instruction (t-stage read)
 };
 
 struct microOp {

pcsx2/x86/microVU_Upper.inl

@@ -39,7 +39,7 @@ microVUt(void) mVUupdateFlags(mV, int reg, int regT1, int regT2, int xyzw, bool
 	if (sFLAG.doFlag) {
 		getFlagReg(sReg, sFLAG.write); // Set sReg to valid GPR by Cur Flag Instance
 		mVUallocSFLAGa(sReg, sFLAG.lastWrite); // Get Prev Status Flag
-		AND32ItoR(sReg, 0xffffff00); // Keep Sticky and D/I flags
+		if (sFLAG.doNonSticky) AND32ItoR(sReg, 0xfffcff00); // Clear O,U,S,Z flags
 	}
 
 	//-------------------------Check for Signed flags------------------------------
@@ -66,8 +66,10 @@ microVUt(void) mVUupdateFlags(mV, int reg, int regT1, int regT2, int xyzw, bool
 	if (mFLAG.doFlag) mVUallocMFLAGb(mVU, mReg, mFLAG.write); // Set Mac Flag
 	if (sFLAG.doFlag) {
 		OR32RtoR (sReg, mReg);
-		SHL32ItoR(mReg, 8);
+		if (sFLAG.doNonSticky) {
-		OR32RtoR (sReg, mReg);
+			SHL32ItoR(mReg, 8);
+			OR32RtoR (sReg, mReg);
+		}
 	}
 }