ShuriZma
/
pcsx2
mirror of https://github.com/PCSX2/pcsx2.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

microVU: 

Saw that SSE4.1 has ptest, and I wanted to try it out xD
untested though cuz I don't have an SSE4.1 cpu :)


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1585 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-07-30 01:35:25 +00:00
parent a0828bc8f9
commit b470a9ae31
3 changed files with 19 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
pcsx2/x86/ix86/ix86_legacy_instructions.h
View File

@ -1364,6 +1364,7 @@ extern void SSE4_PMINSD_M128_to_XMM(x86SSERegType to, uptr from);
extern void SSE4_PMAXUD_M128_to_XMM(x86SSERegType to, uptr from);
extern void SSE4_PMINUD_M128_to_XMM(x86SSERegType to, uptr from);
extern void SSE4_PMULDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
extern void SSE4_PTEST_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
//*********************
// 3DNOW instructions *

1
pcsx2/x86/ix86/ix86_legacy_sse.cpp
View File

@ -374,6 +374,7 @@ emitterT void SSE4_BLENDVPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) {
emitterT void SSE4_BLENDVPS_M128_to_XMM(x86SSERegType to, uptr from) { xBLEND.VPS( xRegisterSSE(to), (void*)from ); }
emitterT void SSE4_PMOVSXDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPMOVSX.DQ( xRegisterSSE(to), xRegisterSSE(from) ); }
emitterT void SSE4_PTEST_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPTEST(xRegisterSSE(to), xRegisterSSE(from)); }
emitterT void SSE_LDMXCSR( uptr from ) { xLDMXCSR( (u32*)from ); }

29
pcsx2/x86/microVU_Lower.inl
View File

@ -26,20 +26,25 @@
// DIV/SQRT/RSQRT
//------------------------------------------------------------------
#define testZero(xmmReg, xmmTemp, gprTemp) { \
SSE_XORPS_XMM_to_XMM(xmmTemp, xmmTemp); /* Clear xmmTemp (make it 0) */ \
SSE_CMPEQPS_XMM_to_XMM(xmmTemp, xmmReg); /* Set all F's if zero */ \
SSE_MOVMSKPS_XMM_to_R32(gprTemp, xmmTemp); /* Move the sign bits */ \
TEST32ItoR(gprTemp, 1); /* Test "Is Zero" bit */ \
// Test if Vector is +/- Zero
#define testZero(xmmReg, xmmTemp, gprTemp) { \
SSE_XORPS_XMM_to_XMM(xmmTemp, xmmTemp); \
SSE_CMPEQSS_XMM_to_XMM(xmmTemp, xmmReg); \
if (!cpucaps.hasStreamingSIMD4Extensions) { \
SSE_MOVMSKPS_XMM_to_R32(gprTemp, xmmTemp); \
TEST32ItoR(gprTemp, 1); \
} \
else SSE4_PTEST_XMM_to_XMM(xmmTemp, xmmTemp); \
}
#define testNeg(xmmReg, gprTemp, aJump) { \
SSE_MOVMSKPS_XMM_to_R32(gprTemp, xmmReg); \
TEST32ItoR(gprTemp, 1); /* Check sign bit */ \
aJump = JZ8(0); /* Skip if positive */ \
MOV32ItoM((uptr)&mVU->divFlag, divI); /* Set Invalid Flags */ \
SSE_ANDPS_M128_to_XMM(xmmReg, (uptr)mVU_absclip); /* Abs(xmmReg) */ \
x86SetJ8(aJump); \
// Test if Vector is Negative (Set Flags and Makes Positive)
#define testNeg(xmmReg, gprTemp, aJump) { \
SSE_MOVMSKPS_XMM_to_R32(gprTemp, xmmReg); \
TEST32ItoR(gprTemp, 1); \
aJump = JZ8(0); \
MOV32ItoM((uptr)&mVU->divFlag, divI); \
SSE_ANDPS_M128_to_XMM(xmmReg, (uptr)mVU_absclip); \
x86SetJ8(aJump); \
}
mVUop(mVU_DIV) {