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Fix a few typos, as well as Linux. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@653 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
arcum42 2009-03-01 21:42:09 +00:00
parent 2cf4bc3920
commit b0c3151aca
3 changed files with 25 additions and 6 deletions
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3
pcsx2/x86/ix86/Makefile.am
View File

@ -1,5 +1,4 @@
INCLUDES = -I@srcdir@/.. -I@srcdir@/../../ -I@srcdir@/../../../common/include -I@srcdir@/../../../3rdparty
noinst_LIBRARIES = libix86.a
libix86_a_SOURCES = ix86_tools.cpp ix86_3dnow.cpp ix86.cpp ix86_cpudetect.cpp ix86_fpu.cpp ix86.h ix86_sse.cpp ix86_mmx.cpp
libix86_a_SOURCES = ix86.cpp ix86.inl ix86_3dnow.inl ix86.h ix86_fpu.inl ix86_mmx.inl ix86_sse.inl ix86_tools.cpp ix86_cpudetect.cpp ix86_macros.h

20
pcsx2/x86/ix86/ix86.h
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@ -75,7 +75,7 @@ emitterT void write64( u64 val ){
x86Ptr[I] += 8;
}
//------------------------------------------------------------------
/*
//------------------------------------------------------------------
// jump/align functions
//------------------------------------------------------------------
@ -104,7 +104,23 @@ emitterT u8* J8Rel( int cc, int to );
emitterT u32* J32Rel( int cc, u32 to );
emitterT u64 GetCPUTick( void );
//------------------------------------------------------------------
*/
emitterT void eMOV32RtoR( x86IntRegType to, x86IntRegType from );
emitterT u32* eJMP32( uptr to );
emitterT u8* eJMP8( u8 to );
emitterT void eCALL32( u32 to );
emitterT void eLEA32RtoR(x86IntRegType to, x86IntRegType from, u32 offset);
emitterT void eLEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale);
emitterT void eNOP( void );
emitterT void eAND32I8toR( x86IntRegType to, u8 from );
emitterT void eAND32ItoM( uptr to, u32 from );
emitterT void eLEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1);
emitterT void eAND32I8toM( uptr to, u8 from );
emitterT void eLEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale);
#define MMXONLY(code) code
#define _MM_MK_INSERTPS_NDX(srcField, dstField, zeroMask) (((srcField)<<6) | ((dstField)<<4) | (zeroMask))

8
pcsx2/x86/ix86/ix86.inl
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@ -30,6 +30,10 @@
// ix86 instructions
//------------------------------------------------------------------
#include "PrecompiledHeader.h"
#include "System.h"
#include "ix86.h"
emitterT void WriteRmOffset(x86IntRegType to, s32 offset)
{
if( (to&7) == ESP ) {
@ -244,7 +248,7 @@ emitterT void ex86AlignExecutable( int align )
{
case 0: break;
case 1: eeNOP<I>(); break;
case 1: eNOP<I>(); break;
case 2: eMOV32RtoR<I>( ESI, ESI ); break;
case 3: write8<I>(0x08D); write8<I>(0x024); write8<I>(0x024); break;
case 5: eNOP<I>(); // falls through to 4...
@ -256,7 +260,7 @@ emitterT void ex86AlignExecutable( int align )
default:
{
// for larger alignments, just use a JMP...
u8* aligned_target = eJMP8(0);
u8* aligned_target = eJMP8<I>(0);
x86Ptr[I] = (u8*)newx86;
ex86SetJ8<I>( aligned_target );
}