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pcsx2
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Added the second part of emitter macro functionality, by making the emitter instance configurable. We can't actually use it yet tho, since everything shares iCore, and thus everything needs to share the same emitter instance (for now!). 

Fixed new emitter so it compiles in Debug builds, cleaned up the header files a bit.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@652 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2009-03-01 20:44:48 +00:00
parent b6f3f8e415
commit 2cf4bc3920
46 changed files with 1348 additions and 1228 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
pcsx2/PrecompiledHeader.h
View File

@ -99,4 +99,25 @@ static __forceinline u32 timeGetTime()
# define __unused
#endif
//////////////////////////////////////////////////////////////////////////////////////////
// Emitter Instance Identifiers. If you add a new emitter, do it here also.
// Note: Currently most of the instances map back to 0, since existing dynarec code all
// shares iCore and must therefore all share the same emitter instance.
enum
{
EmitterId_R5900 = 0,
EmitterId_R3000a = EmitterId_R5900,
EmitterId_VU0micro = EmitterId_R5900,
EmitterId_VU1micro = EmitterId_R5900,
// Cotton's new microVU, which is iCore-free
EmitterId_microVU0,
EmitterId_microVU1,
// Air's eventual IopRec, which will also be iCore-free
EmitterId_R3000air,
EmitterId_Count // must always be last!
};
#endif

4
pcsx2/System.cpp
View File

@ -23,13 +23,11 @@
#include "Threading.h"
#include "iR5900.h"
#include "iR3000A.h"
#include "R3000A.h"
#include "IopMem.h"
#include "iVUzerorec.h" // for SuperVUReset
#include "x86/ix86/ix86.h"
using namespace std;
using namespace Console;

1
pcsx2/Vif.cpp
View File

@ -20,7 +20,6 @@
#include <cmath>
#include "Common.h"
#include "ix86/ix86.h"
#include "VUmicro.h"
#include "Vif.h"

89
pcsx2/windows/VCprojects/pcsx2_2008.vcproj
View File

@ -2137,6 +2137,30 @@
<File
RelativePath="..\..\x86\iPsxMem.cpp"
>
<FileConfiguration
Name="Debug|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
<FileConfiguration
Name="Devel|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
</File>
<File
RelativePath="..\..\x86\iR3000A.cpp"
@ -2313,6 +2337,30 @@
<File
RelativePath="..\..\x86\iGS.cpp"
>
<FileConfiguration
Name="Debug|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
<FileConfiguration
Name="Devel|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
</File>
</Filter>
</Filter>
@ -2557,6 +2605,30 @@
<File
RelativePath="..\..\x86\iPsxHw.cpp"
>
<FileConfiguration
Name="Debug|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
<FileConfiguration
Name="Devel|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|Win32"
ExcludedFromBuild="true"
>
<Tool
Name="VCCLCompilerTool"
/>
</FileConfiguration>
</File>
</Filter>
</Filter>
@ -2896,8 +2968,7 @@
Name="Debug|Win32"
>
<Tool
Name="VCCLCompilerTool"
UsePrecompiledHeader="2"
Name="VCCustomBuildTool"
/>
</FileConfiguration>
<FileConfiguration
@ -2936,8 +3007,7 @@
Name="Debug|Win32"
>
<Tool
Name="VCCLCompilerTool"
UsePrecompiledHeader="2"
Name="VCCustomBuildTool"
/>
</FileConfiguration>
<FileConfiguration
@ -2972,8 +3042,7 @@
Name="Debug|Win32"
>
<Tool
Name="VCCLCompilerTool"
UsePrecompiledHeader="2"
Name="VCCustomBuildTool"
/>
</FileConfiguration>
<FileConfiguration
@ -3001,10 +3070,18 @@
/>
</FileConfiguration>
</File>
<File
RelativePath="..\..\x86\ix86\ix86_sse_helpers.h"
>
</File>
<File
RelativePath="..\..\x86\ix86\ix86_tools.cpp"
>
</File>
<File
RelativePath="..\..\x86\ix86\ix86_types.h"
>
</File>
</Filter>
<File
RelativePath="..\..\Common.h"

2
pcsx2/windows/WinThreads.cpp
View File

@ -21,7 +21,7 @@
#include "System.h"
#include "Threading.h"
#include "ix86/ix86.h"
#include "ix86/ix86_types.h"
#ifdef _WIN32
#include "implement.h" // win32 pthreads implementations.

1
pcsx2/x86/iCOP0.cpp
View File

@ -26,7 +26,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iCOP0.h"

1
pcsx2/x86/iCOP2.cpp
View File

@ -20,7 +20,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "Common.h"

1
pcsx2/x86/iCore.cpp
View File

@ -22,7 +22,6 @@
#include "iR5900.h"
#include "Vif.h"
#include "VU.h"
#include "ix86/ix86.h"
#include "R3000A.h"
u16 g_x86AllocCounter = 0;

1
pcsx2/x86/iFPU.cpp
View File

@ -20,7 +20,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iFPU.h"

1
pcsx2/x86/iGS.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "VU.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "GS.h"

1
pcsx2/x86/iMMI.cpp
View File

@ -25,7 +25,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iMMI.h"

2
pcsx2/x86/iR3000A.cpp
View File

@ -32,8 +32,6 @@
#include "PsxCommon.h"
#include "VU.h"
#include "ix86/ix86.h"
#include "iCore.h"
#include "SamplProf.h"

3
pcsx2/x86/iR3000A.h
View File

@ -18,6 +18,9 @@
#ifndef _R3000A_SUPERREC_
#define _R3000A_SUPERREC_
#define _EmitterId_ EmitterId_R3000a
#include "ix86/ix86.h"
#include "R3000A.h"
#include "iCore.h"
#include "BaseblockEx.h"

1
pcsx2/x86/iR3000Atables.cpp
View File

@ -20,7 +20,6 @@
#include <time.h>
#include "PsxCommon.h"
#include "ix86/ix86.h"
#include "iR3000A.h"
#include "IopMem.h"
#include "IopDma.h"

6
pcsx2/x86/iR5900.h
View File

@ -19,12 +19,16 @@
#ifndef __IR5900_H__
#define __IR5900_H__
#define _EmitterId_ EmitterId_R5900
#include "ix86/ix86.h"
#include "ix86/ix86_sse_helpers.h"
#include "R5900.h"
#include "VU.h"
#include "iCore.h"
#include "BaseblockEx.h" // needed for recClear and stuff
// Yay! These work now! (air)
// Yay! These work now! (air) ... almost (air)
#define ARITHMETICIMM_RECOMPILE
#define ARITHMETIC_RECOMPILE
#define MULTDIV_RECOMPILE

1
pcsx2/x86/iR5900CoissuedLoadStore.cpp
View File

@ -23,7 +23,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "iR5900LoadStore.h"
#include "ix86/ix86.h"
#include "iR5900.h"
namespace R5900 {

1
pcsx2/x86/iVU0micro.cpp
View File

@ -19,7 +19,6 @@
#include "PrecompiledHeader.h"
#include "Common.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "VUmicro.h"
#include "iVUzerorec.h"

1
pcsx2/x86/iVU1micro.cpp
View File

@ -22,7 +22,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "VUmicro.h"
#include "iVUzerorec.h"

1
pcsx2/x86/iVUmicro.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "GS.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iMMI.h"
#include "iFPU.h"

1
pcsx2/x86/iVUmicroLower.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "GS.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iMMI.h"
#include "iFPU.h"

1
pcsx2/x86/iVUmicroUpper.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "GS.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iMMI.h"
#include "iFPU.h"

1
pcsx2/x86/iVUzerorec.cpp
View File

@ -35,7 +35,6 @@
#include "GS.h"
#include "R5900.h"
#include "VU.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iVUzerorec.h"

1
pcsx2/x86/iVif.cpp
View File

@ -19,7 +19,6 @@
#include "PrecompiledHeader.h"
#include "Common.h"
#include "ix86/ix86.h"
#include "Vif.h"
#include "VUmicro.h"

1
pcsx2/x86/ir5900tables.cpp
View File

@ -23,7 +23,6 @@
#include "Common.h"
#include "Memory.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iR5900AritImm.h"
#include "iR5900Arit.h"

7
pcsx2/x86/ix86-32/iCore-32.cpp
View File

@ -22,12 +22,17 @@
#include "Vif.h"
#include "VU.h"
#include "ix86/ix86.h"
#include "iR3000A.h"
#include "R3000A.h"
#include <vector>
using namespace std;
// yay sloppy crap needed until we can remove dependency on this hippopotamic
// landmass of shared code. (air)
extern u32 g_psxConstRegs[32];
u16 x86FpuState, iCWstate;
u16 g_mmxAllocCounter = 0;

1
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "Memory.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iR5900AritImm.h"
#include "iR5900Arit.h"

1
pcsx2/x86/ix86-32/iR5900Arit.cpp
View File

@ -20,7 +20,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"

1
pcsx2/x86/ix86-32/iR5900AritImm.cpp
View File

@ -20,7 +20,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
namespace R5900 {

1
pcsx2/x86/ix86-32/iR5900Branch.cpp
View File

@ -22,7 +22,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
namespace Interp = R5900::Interpreter::OpcodeImpl;

1
pcsx2/x86/ix86-32/iR5900Jump.cpp
View File

@ -22,7 +22,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
namespace R5900 {

1
pcsx2/x86/ix86-32/iR5900LoadStore.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "iR5900LoadStore.h"
#include "ix86/ix86.h"
#include "iR5900.h"
// Implemented at the bottom of the module:

5
pcsx2/x86/ix86-32/iR5900Move.cpp
View File

@ -20,13 +20,12 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#ifdef _WIN32
#pragma warning(disable:4244)
#pragma warning(disable:4761)
//#pragma warning(disable:4244)
//#pragma warning(disable:4761)
#endif
namespace R5900 {

1
pcsx2/x86/ix86-32/iR5900MultDiv.cpp
View File

@ -20,7 +20,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
namespace Interp = R5900::Interpreter::OpcodeImpl;

1
pcsx2/x86/ix86-32/iR5900Shift.cpp
View File

@ -20,7 +20,6 @@
#include "Common.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"

1
pcsx2/x86/ix86-32/iR5900Templates.cpp
View File

@ -22,7 +22,6 @@
#include "Common.h"
#include "Memory.h"
#include "R5900OpcodeTables.h"
#include "ix86/ix86.h"
#include "iR5900.h"
#include "iMMI.h"
#include "iFPU.h"

1
pcsx2/x86/ix86-32/recVTLB.cpp
View File

@ -21,7 +21,6 @@
#include "Common.h"
#include "vtlb.h"
#include "x86/ix86/ix86.h"
#include "iCore.h"
#include "iR5900.h"

10
pcsx2/x86/ix86/ix86.cpp
View File

@ -24,18 +24,18 @@
* cottonvibes(@gmail.com)
*/
#pragma once
#include "PrecompiledHeader.h"
#include "System.h"
#include "ix86.h"
u8 *x86Ptr[3]; // 3 rec instances (can be increased if needed)
// <0> = Main Instance, <1> = VU0 Instance, <2> = VU1 Instance
u8 *x86Ptr[EmitterId_Count];
u8 *j8Ptr[32];
u32 *j32Ptr[32];
PCSX2_ALIGNED16(unsigned int p[4]);
PCSX2_ALIGNED16(unsigned int p2[4]);
PCSX2_ALIGNED16(u32 p[4]);
PCSX2_ALIGNED16(u32 p2[4]);
PCSX2_ALIGNED16(float f[4]);
XMMSSEType g_xmmtypes[XMMREGS] = { XMMT_INT };

159
pcsx2/x86/ix86/ix86.h
View File

@ -25,13 +25,14 @@
*/
#pragma once
#include "PrecompiledHeader.h"
#include "PS2Etypes.h" // Basic types header
#define _ix86_included_ // used for sanity checks by headers dependent on this one.
#include "ix86_types.h"
//------------------------------------------------------------------
// Helper Macros
//------------------------------------------------------------------
#define emitterT template<int I/*Emitter Index*/> inline /*__forceinline*/
#define emitterT template<int I/*Emitter Index*/>
#define MEMADDR(addr, oplen) (addr)
@ -41,165 +42,30 @@
#define RexRB(w, reg, base) if( w||(reg) >= 8 || (base)>=8 ) assert(0);
#define RexRXB(w, reg, index, base) if( w||(reg) >= 8 || (index) >= 8 || (base) >= 8 ) assert(0);
#define XMMREGS 8
#define X86REGS 8
#define MMXREGS 8
#define SIB 4
#define SIBDISP 5
#define DISP32 5
// general types
typedef int x86IntRegType;
#define EAX 0
#define EBX 3
#define ECX 1
#define EDX 2
#define ESI 6
#define EDI 7
#define EBP 5
#define ESP 4
#define X86ARG1 EAX
#define X86ARG2 ECX
#define X86ARG3 EDX
#define X86ARG4 EBX
#define MM0 0
#define MM1 1
#define MM2 2
#define MM3 3
#define MM4 4
#define MM5 5
#define MM6 6
#define MM7 7
typedef int x86MMXRegType;
#define XMM0 0
#define XMM1 1
#define XMM2 2
#define XMM3 3
#define XMM4 4
#define XMM5 5
#define XMM6 6
#define XMM7 7
#define XMM8 8
#define XMM9 9
#define XMM10 10
#define XMM11 11
#define XMM12 12
#define XMM13 13
#define XMM14 14
#define XMM15 15
typedef int x86SSERegType;
enum XMMSSEType
{
XMMT_INT = 0, // integer (sse2 only)
XMMT_FPS = 1, // floating point
//XMMT_FPD = 3, // double
};
extern XMMSSEType g_xmmtypes[XMMREGS];
extern void cpudetectInit( void );//this is all that needs to be called and will fill up the below structs
typedef struct CAPABILITIES CAPABILITIES;
//cpu capabilities structure
struct CAPABILITIES {
u32 hasFloatingPointUnit;
u32 hasVirtual8086ModeEnhancements;
u32 hasDebuggingExtensions;
u32 hasPageSizeExtensions;
u32 hasTimeStampCounter;
u32 hasModelSpecificRegisters;
u32 hasPhysicalAddressExtension;
u32 hasCOMPXCHG8BInstruction;
u32 hasAdvancedProgrammableInterruptController;
u32 hasSEPFastSystemCall;
u32 hasMemoryTypeRangeRegisters;
u32 hasPTEGlobalFlag;
u32 hasMachineCheckArchitecture;
u32 hasConditionalMoveAndCompareInstructions;
u32 hasFGPageAttributeTable;
u32 has36bitPageSizeExtension;
u32 hasProcessorSerialNumber;
u32 hasCFLUSHInstruction;
u32 hasDebugStore;
u32 hasACPIThermalMonitorAndClockControl;
u32 hasMultimediaExtensions;
u32 hasFastStreamingSIMDExtensionsSaveRestore;
u32 hasStreamingSIMDExtensions;
u32 hasStreamingSIMD2Extensions;
u32 hasSelfSnoop;
u32 hasMultiThreading; // is TRUE for both mutli-core and Hyperthreaded CPUs.
u32 hasThermalMonitor;
u32 hasIntel64BitArchitecture;
u32 hasStreamingSIMD3Extensions;
u32 hasSupplementalStreamingSIMD3Extensions;
u32 hasStreamingSIMD4Extensions;
// AMD-specific CPU Features
u32 hasMultimediaExtensionsExt;
u32 hasAMD64BitArchitecture;
u32 has3DNOWInstructionExtensionsExt;
u32 has3DNOWInstructionExtensions;
};
extern CAPABILITIES cpucaps;
struct CPUINFO{
u32 x86Family; // Processor Family
u32 x86Model; // Processor Model
u32 x86PType; // Processor Type
u32 x86StepID; // Stepping ID
u32 x86Flags; // Feature Flags
u32 x86Flags2; // More Feature Flags
u32 x86EFlags; // Extended Feature Flags
u32 PhysicalCores;
u32 LogicalCores;
char x86ID[16]; // Vendor ID //the vendor creator (in %s)
char x86Type[20]; //cpu type in char format //the cpu type (in %s)
char x86Fam[50]; // family in char format //the original cpu name string (in %s)
u32 cpuspeed; // speed of cpu //this will give cpu speed (in %d)
};
extern CPUINFO cpuinfo;
//------------------------------------------------------------------
//------------------------------------------------------------------
// write functions
//------------------------------------------------------------------
extern u8 *x86Ptr[3];
extern u8 *x86Ptr[EmitterId_Count];
extern u8 *j8Ptr[32];
extern u32 *j32Ptr[32];
emitterT void write8(u8 val ) {
emitterT void write8( u8 val ) {
*x86Ptr[I] = (u8)val;
x86Ptr[I]++;
}
emitterT void write16(u16 val ) {
emitterT void write16( u16 val ) {
*(u16*)x86Ptr[I] = (u16)val;
x86Ptr[I] += 2;
}
emitterT void write24(u32 val ) {
*(u8*)x86Ptr[I] = (u8)(val & 0xff);
x86Ptr[I]++;
*(u8*)x86Ptr[I] = (u8)((val >> 8) & 0xff);
x86Ptr[I]++;
*(u8*)x86Ptr[I] = (u8)((val >> 16) & 0xff);
x86Ptr[I]++;
emitterT void write24( u32 val ) {
*x86Ptr[I]++ = (u8)(val & 0xff);
*x86Ptr[I]++ = (u8)((val >> 8) & 0xff);
*x86Ptr[I]++ = (u8)((val >> 16) & 0xff);
}
emitterT void write32(u32 val ) {
emitterT void write32( u32 val ) {
*(u32*)x86Ptr[I] = val;
x86Ptr[I] += 4;
}
@ -241,7 +107,6 @@ emitterT u64 GetCPUTick( void );
*/
#define MMXONLY(code) code
#define _MM_MK_INSERTPS_NDX(srcField, dstField, zeroMask) (((srcField)<<6) | ((dstField)<<4) | (zeroMask))
extern void SysPrintf(const char *fmt, ...);
#include "ix86_macros.h"
#include "ix86.inl"

2
pcsx2/x86/ix86/ix86_cpudetect.cpp
View File

@ -18,6 +18,8 @@
#include "PrecompiledHeader.h"
#define _EmitterId_ 0
#include "ix86.h"
#include "Misc.h"
#include "Threading.h"

1672
pcsx2/x86/ix86/ix86_macros.h
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File diff suppressed because it is too large Load Diff

1
pcsx2/x86/ix86/ix86_mmx.inl
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@ -17,7 +17,6 @@
*/
#pragma once
//#include "PrecompiledHeader.h"
//------------------------------------------------------------------
// MMX instructions

163
pcsx2/x86/ix86/ix86_sse.inl
View File

@ -17,7 +17,6 @@
*/
#pragma once
//#include "PrecompiledHeader.h"
//------------------------------------------------------------------
// SSE instructions
@ -1243,165 +1242,3 @@ emitterT void eSSE4_PMULDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
write24<I>(0x28380F);
ModRM<I>(3, to, from);
}
// SSE-X
__forceinline void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQA_M128_to_XMM(to, from);
else SSE_MOVAPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_M128(to, from);
else SSE_MOVAPS_XMM_to_M128(to, from);
}
__forceinline void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_XMM(to, from);
else SSE_MOVAPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQARmtoROffset(to, from, offset);
else SSE_MOVAPSRmtoROffset(to, from, offset);
}
__forceinline void SSEX_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQARtoRmOffset(to, from, offset);
else SSE_MOVAPSRtoRmOffset(to, from, offset);
}
__forceinline void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQU_M128_to_XMM(to, from);
else SSE_MOVAPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_M128(to, from);
else SSE_MOVAPS_XMM_to_M128(to, from);
}
__forceinline void SSEX_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_XMM(to, from);
else SSE_MOVAPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_M32_to_XMM(to, from);
else SSE_MOVSS_M32_to_XMM(to, from);
}
__forceinline void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_M32(to, from);
else SSE_MOVSS_XMM_to_M32(to, from);
}
__forceinline void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_Rm(to, from);
else SSE_MOVSS_XMM_to_Rm(to, from);
}
__forceinline void SSEX_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_RmOffset_to_XMM(to, from, offset);
else SSE_MOVSS_RmOffset_to_XMM(to, from, offset);
}
__forceinline void SSEX_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_RmOffset(to, from, offset);
else SSE_MOVSS_XMM_to_RmOffset(to, from, offset);
}
__forceinline void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_POR_M128_to_XMM(to, from);
else SSE_ORPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_POR_XMM_to_XMM(to, from);
else SSE_ORPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PXOR_M128_to_XMM(to, from);
else SSE_XORPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PXOR_XMM_to_XMM(to, from);
else SSE_XORPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PAND_M128_to_XMM(to, from);
else SSE_ANDPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PAND_XMM_to_XMM(to, from);
else SSE_ANDPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PANDN_M128_to_XMM(to, from);
else SSE_ANDNPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PANDN_XMM_to_XMM(to, from);
else SSE_ANDNPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from)
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKLDQ_M128_to_XMM(to, from);
else SSE_UNPCKLPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKLDQ_XMM_to_XMM(to, from);
else SSE_UNPCKLPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from)
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKHDQ_M128_to_XMM(to, from);
else SSE_UNPCKHPS_M128_to_XMM(to, from);
}
__forceinline void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKHDQ_XMM_to_XMM(to, from);
else SSE_UNPCKHPS_XMM_to_XMM(to, from);
}
__forceinline void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) {
SSE2_PUNPCKHQDQ_XMM_to_XMM(to, from);
if( to != from ) SSE2_PSHUFD_XMM_to_XMM(to, to, 0x4e);
}
else {
SSE_MOVHLPS_XMM_to_XMM(to, from);
}
}

188
pcsx2/x86/ix86/ix86_sse_helpers.h Normal file
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/* Pcsx2 - Pc Ps2 Emulator
* Copyright (C) 2002-2009 Pcsx2 Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#pragma once
//////////////////////////////////////////////////////////////////////////////////////////
// SSE-X Helpers (generates either INT or FLOAT versions of certain SSE instructions)
// This header should always be included *after* ix86.h.
#ifndef _ix86_included_
#error Dependency fail: Please define _EmitterId_ and include ix86.h first.
#endif
static __forceinline void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQA_M128_to_XMM(to, from);
else SSE_MOVAPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_M128(to, from);
else SSE_MOVAPS_XMM_to_M128(to, from);
}
static __forceinline void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_XMM(to, from);
else SSE_MOVAPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQARmtoROffset(to, from, offset);
else SSE_MOVAPSRmtoROffset(to, from, offset);
}
static __forceinline void SSEX_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQARtoRmOffset(to, from, offset);
else SSE_MOVAPSRtoRmOffset(to, from, offset);
}
static __forceinline void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQU_M128_to_XMM(to, from);
else SSE_MOVAPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_M128(to, from);
else SSE_MOVAPS_XMM_to_M128(to, from);
}
static __forceinline void SSEX_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_XMM(to, from);
else SSE_MOVAPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_M32_to_XMM(to, from);
else SSE_MOVSS_M32_to_XMM(to, from);
}
static __forceinline void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_M32(to, from);
else SSE_MOVSS_XMM_to_M32(to, from);
}
static __forceinline void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_Rm(to, from);
else SSE_MOVSS_XMM_to_Rm(to, from);
}
static __forceinline void SSEX_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_RmOffset_to_XMM(to, from, offset);
else SSE_MOVSS_RmOffset_to_XMM(to, from, offset);
}
static __forceinline void SSEX_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_RmOffset(to, from, offset);
else SSE_MOVSS_XMM_to_RmOffset(to, from, offset);
}
static __forceinline void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_POR_M128_to_XMM(to, from);
else SSE_ORPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_POR_XMM_to_XMM(to, from);
else SSE_ORPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PXOR_M128_to_XMM(to, from);
else SSE_XORPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PXOR_XMM_to_XMM(to, from);
else SSE_XORPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PAND_M128_to_XMM(to, from);
else SSE_ANDPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PAND_XMM_to_XMM(to, from);
else SSE_ANDPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from )
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PANDN_M128_to_XMM(to, from);
else SSE_ANDNPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PANDN_XMM_to_XMM(to, from);
else SSE_ANDNPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from)
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKLDQ_M128_to_XMM(to, from);
else SSE_UNPCKLPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKLDQ_XMM_to_XMM(to, from);
else SSE_UNPCKLPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from)
{
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKHDQ_M128_to_XMM(to, from);
else SSE_UNPCKHPS_M128_to_XMM(to, from);
}
static __forceinline void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
{
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKHDQ_XMM_to_XMM(to, from);
else SSE_UNPCKHPS_XMM_to_XMM(to, from);
}
static __forceinline void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
{
if( g_xmmtypes[from] == XMMT_INT ) {
SSE2_PUNPCKHQDQ_XMM_to_XMM(to, from);
if( to != from ) SSE2_PSHUFD_XMM_to_XMM(to, to, 0x4e);
}
else {
SSE_MOVHLPS_XMM_to_XMM(to, from);
}
}

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pcsx2/x86/ix86/ix86_types.h Normal file
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/* Pcsx2 - Pc Ps2 Emulator
* Copyright (C) 2002-2009 Pcsx2 Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#pragma once
// x86 opcode descriptors
#define XMMREGS 8
#define X86REGS 8
#define MMXREGS 8
#define SIB 4
#define SIBDISP 5
#define DISP32 5
// general types
typedef int x86IntRegType;
#define EAX 0
#define EBX 3
#define ECX 1
#define EDX 2
#define ESI 6
#define EDI 7
#define EBP 5
#define ESP 4
#define X86ARG1 EAX
#define X86ARG2 ECX
#define X86ARG3 EDX
#define X86ARG4 EBX
#define MM0 0
#define MM1 1
#define MM2 2
#define MM3 3
#define MM4 4
#define MM5 5
#define MM6 6
#define MM7 7
typedef int x86MMXRegType;
#define XMM0 0
#define XMM1 1
#define XMM2 2
#define XMM3 3
#define XMM4 4
#define XMM5 5
#define XMM6 6
#define XMM7 7
#define XMM8 8
#define XMM9 9
#define XMM10 10
#define XMM11 11
#define XMM12 12
#define XMM13 13
#define XMM14 14
#define XMM15 15
typedef int x86SSERegType;
enum XMMSSEType
{
XMMT_INT = 0, // integer (sse2 only)
XMMT_FPS = 1, // floating point
//XMMT_FPD = 3, // double
};
extern XMMSSEType g_xmmtypes[XMMREGS];
extern void cpudetectInit( void );//this is all that needs to be called and will fill up the below structs
typedef struct CAPABILITIES CAPABILITIES;
//cpu capabilities structure
struct CAPABILITIES {
u32 hasFloatingPointUnit;
u32 hasVirtual8086ModeEnhancements;
u32 hasDebuggingExtensions;
u32 hasPageSizeExtensions;
u32 hasTimeStampCounter;
u32 hasModelSpecificRegisters;
u32 hasPhysicalAddressExtension;
u32 hasCOMPXCHG8BInstruction;
u32 hasAdvancedProgrammableInterruptController;
u32 hasSEPFastSystemCall;
u32 hasMemoryTypeRangeRegisters;
u32 hasPTEGlobalFlag;
u32 hasMachineCheckArchitecture;
u32 hasConditionalMoveAndCompareInstructions;
u32 hasFGPageAttributeTable;
u32 has36bitPageSizeExtension;
u32 hasProcessorSerialNumber;
u32 hasCFLUSHInstruction;
u32 hasDebugStore;
u32 hasACPIThermalMonitorAndClockControl;
u32 hasMultimediaExtensions;
u32 hasFastStreamingSIMDExtensionsSaveRestore;
u32 hasStreamingSIMDExtensions;
u32 hasStreamingSIMD2Extensions;
u32 hasSelfSnoop;
u32 hasMultiThreading; // is TRUE for both mutli-core and Hyperthreaded CPUs.
u32 hasThermalMonitor;
u32 hasIntel64BitArchitecture;
u32 hasStreamingSIMD3Extensions;
u32 hasSupplementalStreamingSIMD3Extensions;
u32 hasStreamingSIMD4Extensions;
// AMD-specific CPU Features
u32 hasMultimediaExtensionsExt;
u32 hasAMD64BitArchitecture;
u32 has3DNOWInstructionExtensionsExt;
u32 has3DNOWInstructionExtensions;
};
extern CAPABILITIES cpucaps;
struct CPUINFO{
u32 x86Family; // Processor Family
u32 x86Model; // Processor Model
u32 x86PType; // Processor Type
u32 x86StepID; // Stepping ID
u32 x86Flags; // Feature Flags
u32 x86Flags2; // More Feature Flags
u32 x86EFlags; // Extended Feature Flags
u32 PhysicalCores;
u32 LogicalCores;
char x86ID[16]; // Vendor ID //the vendor creator (in %s)
char x86Type[20]; //cpu type in char format //the cpu type (in %s)
char x86Fam[50]; // family in char format //the original cpu name string (in %s)
u32 cpuspeed; // speed of cpu //this will give cpu speed (in %d)
};
extern CPUINFO cpuinfo;
//------------------------------------------------------------------

32
pcsx2/x86/microVU.h
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/* Pcsx2 - Pc Ps2 Emulator
* Copyright (C) 2009 Pcsx2-Playground Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
* Copyright (C) 2009 Pcsx2-Playground Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#pragma once
#include "Common.h"

32
pcsx2/x86/microVU_Misc.h
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@ -1,20 +1,20 @@
/* Pcsx2 - Pc Ps2 Emulator
* Copyright (C) 2009 Pcsx2-Playground Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
* Copyright (C) 2009 Pcsx2-Playground Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#pragma once