mirror of https://github.com/PCSX2/pcsx2.git
Emitter rewrite, Part 2 of 5: Converted SSE comparisons and SSE conversions to constructor-less structs.
(also includes some header file prepwork for my next wxWidgets windows.h commit fix) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2069 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine
parent
beed14bfee
commit
ada3d9ed8a
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@ -332,10 +332,6 @@
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<Filter
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Name="Implement_Simd"
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>
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<File
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RelativePath="..\..\include\x86emitter\implement\xmm\comparisons.h"
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>
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</File>
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<File
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RelativePath="..\..\include\x86emitter\implement\xmm\moremovs.h"
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>
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@ -348,6 +344,10 @@
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RelativePath="..\..\include\x86emitter\implement\simd_arithmetic.h"
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>
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</File>
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<File
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RelativePath="..\..\include\x86emitter\implement\simd_comparisons.h"
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>
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</File>
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<File
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RelativePath="..\..\include\x86emitter\implement\simd_helpers.h"
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>
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@ -15,128 +15,111 @@
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#pragma once
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namespace x86Emitter {
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//////////////////////////////////////////////////////////////////////////////////////////
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//
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template< u16 OpcodeSSE >
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class SimdImpl_MinMax
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struct xImplSimd_MinMax
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{
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public:
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const SimdImpl_DestRegSSE<0x00,OpcodeSSE> PS; // packed single precision
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const SimdImpl_DestRegSSE<0x66,OpcodeSSE> PD; // packed double precision
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const SimdImpl_DestRegSSE<0xf3,OpcodeSSE> SS; // scalar single precision
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const SimdImpl_DestRegSSE<0xf2,OpcodeSSE> SD; // scalar double precision
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SimdImpl_MinMax() {} //GChow?
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const xImplSimd_DestRegSSE PS; // packed single precision
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const xImplSimd_DestRegSSE PD; // packed double precision
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const xImplSimd_DestRegSSE SS; // scalar single precision
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const xImplSimd_DestRegSSE SD; // scalar double precision
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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//
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template< SSE2_ComparisonType CType >
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class SimdImpl_Compare
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//
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struct xImplSimd_Compare
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{
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protected:
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template< u8 Prefix > struct Woot
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{
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__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( Prefix, 0xc2, to, from ); xWrite8( CType ); }
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__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( Prefix, 0xc2, to, from ); xWrite8( CType ); }
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Woot() {}
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};
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SSE2_ComparisonType CType;
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public:
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const Woot<0x00> PS;
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const Woot<0x66> PD;
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const Woot<0xf3> SS;
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const Woot<0xf2> SD;
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SimdImpl_Compare() {} //GCWhat?
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void PS( const xRegisterSSE& to, const xRegisterSSE& from ) const;
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void PS( const xRegisterSSE& to, const ModSibBase& from ) const;
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void PD( const xRegisterSSE& to, const xRegisterSSE& from ) const;
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void PD( const xRegisterSSE& to, const ModSibBase& from ) const;
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void SS( const xRegisterSSE& to, const xRegisterSSE& from ) const;
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void SS( const xRegisterSSE& to, const ModSibBase& from ) const;
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void SD( const xRegisterSSE& to, const xRegisterSSE& from ) const;
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void SD( const xRegisterSSE& to, const ModSibBase& from ) const;
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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// Compare scalar floating point values and set EFLAGS (Ordered or Unordered)
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//
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template< bool Ordered >
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class SimdImpl_COMI
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struct xImplSimd_COMI
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{
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protected:
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static const u16 OpcodeSSE = Ordered ? 0x2f : 0x2e;
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public:
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const SimdImpl_DestRegSSE<0x00,OpcodeSSE> SS;
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const SimdImpl_DestRegSSE<0x66,OpcodeSSE> SD;
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SimdImpl_COMI() {}
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const xImplSimd_DestRegSSE SS;
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const xImplSimd_DestRegSSE SD;
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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//
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class SimdImpl_PCompare
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struct xImplSimd_PCompare
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{
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public:
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SimdImpl_PCompare() {}
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// Compare packed bytes for equality.
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// If a data element in dest is equal to the corresponding date element src, the
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// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
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const SimdImpl_DestRegEither<0x66,0x74> EQB;
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const xImplSimd_DestRegEither EQB;
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// Compare packed words for equality.
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// If a data element in dest is equal to the corresponding date element src, the
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// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
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const SimdImpl_DestRegEither<0x66,0x75> EQW;
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const xImplSimd_DestRegEither EQW;
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// Compare packed doublewords [32-bits] for equality.
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// If a data element in dest is equal to the corresponding date element src, the
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// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
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const SimdImpl_DestRegEither<0x66,0x76> EQD;
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const xImplSimd_DestRegEither EQD;
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// Compare packed signed bytes for greater than.
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// If a data element in dest is greater than the corresponding date element src, the
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// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
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const SimdImpl_DestRegEither<0x66,0x64> GTB;
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const xImplSimd_DestRegEither GTB;
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// Compare packed signed words for greater than.
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// If a data element in dest is greater than the corresponding date element src, the
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// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
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const SimdImpl_DestRegEither<0x66,0x65> GTW;
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const xImplSimd_DestRegEither GTW;
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// Compare packed signed doublewords [32-bits] for greater than.
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// If a data element in dest is greater than the corresponding date element src, the
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// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
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const SimdImpl_DestRegEither<0x66,0x66> GTD;
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const xImplSimd_DestRegEither GTD;
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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//
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template< u8 Opcode1, u16 Opcode2 >
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class SimdImpl_PMinMax
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struct xImplSimd_PMinMax
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{
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public:
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SimdImpl_PMinMax() {}
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// Compare packed unsigned byte integers in dest to src and store packed min/max
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// values in dest.
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// Operation can be performed on either MMX or SSE operands.
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const SimdImpl_DestRegEither<0x66,Opcode1> UB;
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const xImplSimd_DestRegEither UB;
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// Compare packed signed word integers in dest to src and store packed min/max
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// values in dest.
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// Operation can be performed on either MMX or SSE operands.
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const SimdImpl_DestRegEither<0x66,Opcode1+0x10> SW;
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const xImplSimd_DestRegEither SW;
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// [SSE-4.1] Compare packed signed byte integers in dest to src and store
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// packed min/max values in dest. (SSE operands only)
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const SimdImpl_DestRegSSE<0x66,(Opcode2<<8)|0x38> SB;
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const xImplSimd_DestRegSSE SB;
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// [SSE-4.1] Compare packed signed doubleword integers in dest to src and store
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// packed min/max values in dest. (SSE operands only)
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const SimdImpl_DestRegSSE<0x66,((Opcode2+1)<<8)|0x38> SD;
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const xImplSimd_DestRegSSE SD;
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// [SSE-4.1] Compare packed unsigned word integers in dest to src and store
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// packed min/max values in dest. (SSE operands only)
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const SimdImpl_DestRegSSE<0x66,((Opcode2+2)<<8)|0x38> UW;
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const xImplSimd_DestRegSSE UW;
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// [SSE-4.1] Compare packed unsigned doubleword integers in dest to src and store
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// packed min/max values in dest. (SSE operands only)
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const SimdImpl_DestRegSSE<0x66,((Opcode2+3)<<8)|0x38> UD;
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const xImplSimd_DestRegSSE UD;
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};
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} // end namespace x86Emitter
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@ -428,59 +428,81 @@ namespace x86Emitter
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extern const Internal::SimdImpl_DestRegEither<0x66,0xeb> xPOR;
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extern const Internal::SimdImpl_DestRegEither<0x66,0xef> xPXOR;
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extern const Internal::SimdImpl_COMI<true> xCOMI;
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extern const Internal::SimdImpl_COMI<false> xUCOMI;
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extern const Internal::SimdImpl_MinMax<0x5f> xMAX;
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extern const Internal::SimdImpl_MinMax<0x5d> xMIN;
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extern const Internal::SimdImpl_Shuffle<0xc6> xSHUF;
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// ------------------------------------------------------------------------
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extern const Internal::SimdImpl_DestRegSSE<0x66,0x1738> xPTEST;
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extern const Internal::SimdImpl_Compare<SSE2_Equal> xCMPEQ;
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extern const Internal::SimdImpl_Compare<SSE2_Less> xCMPLT;
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extern const Internal::SimdImpl_Compare<SSE2_LessOrEqual> xCMPLE;
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extern const Internal::SimdImpl_Compare<SSE2_Unordered> xCMPUNORD;
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extern const Internal::SimdImpl_Compare<SSE2_NotEqual> xCMPNE;
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extern const Internal::SimdImpl_Compare<SSE2_NotLess> xCMPNLT;
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extern const Internal::SimdImpl_Compare<SSE2_NotLessOrEqual> xCMPNLE;
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extern const Internal::SimdImpl_Compare<SSE2_Ordered> xCMPORD;
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extern const xImplSimd_MinMax xMIN;
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extern const xImplSimd_MinMax xMAX;
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extern const xImplSimd_Compare xCMPEQ, xCMPLT,
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xCMPLE, xCMPUNORD,
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xCMPNE, xCMPNLT,
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xCMPNLE,xCMPORD;
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extern const xImplSimd_COMI xCOMI;
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extern const xImplSimd_COMI xUCOMI;
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extern const xImplSimd_PCompare xPCMP;
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extern const xImplSimd_PMinMax xPMIN;
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extern const xImplSimd_PMinMax xPMAX;
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// ------------------------------------------------------------------------
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// OMG Evil. I went cross-eyed an hour ago doing this.
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//
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//
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extern const Internal::SimdImpl_DestRegStrict<0xf3,0xe6,xRegisterSSE,xRegisterSSE,u64> xCVTDQ2PD;
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extern const Internal::SimdImpl_DestRegStrict<0x00,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTDQ2PS;
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extern void xCVTDQ2PD( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTDQ2PD( const xRegisterSSE& to, const ModSib64& from );
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extern void xCVTDQ2PS( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTDQ2PS( const xRegisterSSE& to, const ModSib128& from );
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extern const Internal::SimdImpl_DestRegStrict<0xf2,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTPD2DQ;
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extern const Internal::SimdImpl_DestRegStrict<0x66,0x2d,xRegisterMMX,xRegisterSSE,u128> xCVTPD2PI;
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extern const Internal::SimdImpl_DestRegStrict<0x66,0x5a,xRegisterSSE,xRegisterSSE,u128> xCVTPD2PS;
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extern void xCVTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTPD2DQ( const xRegisterSSE& to, const ModSib128& from );
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extern void xCVTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from );
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extern void xCVTPD2PI( const xRegisterMMX& to, const ModSib128& from );
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extern void xCVTPD2PS( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTPD2PS( const xRegisterSSE& to, const ModSib128& from );
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extern const Internal::SimdImpl_DestRegStrict<0x66,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PD;
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extern const Internal::SimdImpl_DestRegStrict<0x00,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PS;
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extern void xCVTPI2PD( const xRegisterSSE& to, const xRegisterMMX& from );
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extern void xCVTPI2PD( const xRegisterSSE& to, const ModSib64& from );
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extern void xCVTPI2PS( const xRegisterSSE& to, const xRegisterMMX& from );
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extern void xCVTPI2PS( const xRegisterSSE& to, const ModSib64& from );
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extern const Internal::SimdImpl_DestRegStrict<0x66,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTPS2DQ;
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extern const Internal::SimdImpl_DestRegStrict<0x00,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTPS2PD;
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extern const Internal::SimdImpl_DestRegStrict<0x00,0x2d,xRegisterMMX,xRegisterSSE,u64> xCVTPS2PI;
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extern void xCVTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTPS2DQ( const xRegisterSSE& to, const ModSib128& from );
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extern void xCVTPS2PD( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTPS2PD( const xRegisterSSE& to, const ModSib64& from );
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extern void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from );
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extern void xCVTPS2PI( const xRegisterMMX& to, const ModSib64& from );
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extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2d,xRegister32, xRegisterSSE,u64> xCVTSD2SI;
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extern const Internal::SimdImpl_DestRegStrict<0xf2,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTSD2SS;
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extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2a,xRegisterMMX,xRegister32, u32> xCVTSI2SD;
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extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2a,xRegisterSSE,xRegister32, u32> xCVTSI2SS;
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extern void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTSD2SI( const xRegister32& to, const ModSib64& from );
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extern void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTSD2SS( const xRegisterSSE& to, const ModSib64& from );
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extern void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from );
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extern void xCVTSI2SD( const xRegisterMMX& to, const ModSib32& from );
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extern void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from );
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extern void xCVTSI2SS( const xRegisterSSE& to, const ModSib32& from );
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extern const Internal::SimdImpl_DestRegStrict<0xf3,0x5a,xRegisterSSE,xRegisterSSE,u32> xCVTSS2SD;
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extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2d,xRegister32, xRegisterSSE,u32> xCVTSS2SI;
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extern void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTSS2SD( const xRegisterSSE& to, const ModSib32& from );
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extern void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTSS2SI( const xRegister32& to, const ModSib32& from );
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extern const Internal::SimdImpl_DestRegStrict<0x66,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTTPD2DQ;
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extern const Internal::SimdImpl_DestRegStrict<0x66,0x2c,xRegisterMMX,xRegisterSSE,u128> xCVTTPD2PI;
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extern const Internal::SimdImpl_DestRegStrict<0xf3,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTTPS2DQ;
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extern const Internal::SimdImpl_DestRegStrict<0x00,0x2c,xRegisterMMX,xRegisterSSE,u64> xCVTTPS2PI;
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extern void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTTPD2DQ( const xRegisterSSE& to, const ModSib128& from );
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extern void xCVTTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from );
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extern void xCVTTPD2PI( const xRegisterMMX& to, const ModSib128& from );
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extern void xCVTTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTTPS2DQ( const xRegisterSSE& to, const ModSib128& from );
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extern void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from );
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extern void xCVTTPS2PI( const xRegisterMMX& to, const ModSib64& from );
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extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2c,xRegister32, xRegisterSSE,u64> xCVTTSD2SI;
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extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2c,xRegister32, xRegisterSSE,u32> xCVTTSS2SI;
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extern void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTTSD2SI( const xRegister32& to, const ModSib64& from );
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extern void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTTSS2SI( const xRegister32& to, const ModSib32& from );
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// ------------------------------------------------------------------------
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@ -502,11 +524,6 @@ namespace x86Emitter
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extern const xImplSimd_DotProduct xDP;
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extern const xImplSimd_Round xROUND;
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extern const Internal::SimdImpl_PMinMax<0xde,0x3c> xPMAX;
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extern const Internal::SimdImpl_PMinMax<0xda,0x38> xPMIN;
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extern const Internal::SimdImpl_PCompare xPCMP;
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extern const Internal::SimdImpl_PShuffle xPSHUF;
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extern const Internal::SimdImpl_PUnpack xPUNPCK;
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extern const Internal::SimdImpl_Unpack xUNPCK;
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@ -422,6 +422,12 @@ __forceinline void xWrite( T val )
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return !operator==( src );
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}
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};
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typedef ModSibStrict<u8> ModSib8;
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typedef ModSibStrict<u16> ModSib16;
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typedef ModSibStrict<u32> ModSib32;
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typedef ModSibStrict<u64> ModSib64;
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typedef ModSibStrict<u128> ModSib128;
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//////////////////////////////////////////////////////////////////////////////////////////
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// xAddressIndexerBase - This is a static class which provisions our ptr[] syntax.
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@ -696,7 +702,6 @@ __forceinline void xWrite( T val )
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#include "implement/helpers.h"
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#include "implement/simd_templated_helpers.h"
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#include "implement/xmm/moremovs.h"
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#include "implement/xmm/comparisons.h"
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#include "implement/xmm/shufflepack.h"
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#include "implement/group1.h"
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#include "implement/group2.h"
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@ -731,5 +736,6 @@ __forceinline void xWrite( T val )
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#include "implement/simd_helpers.h"
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#include "implement/simd_arithmetic.h"
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#include "implement/simd_comparisons.h"
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|
||||
#include "inlines.inl"
|
||||
|
|
|
|||
|
|
@ -90,11 +90,6 @@ const MovhlImplAll<0x12> xMOVL;
|
|||
const MovhlImpl_RtoR<0x16> xMOVLH;
|
||||
const MovhlImpl_RtoR<0x12> xMOVHL;
|
||||
|
||||
const SimdImpl_COMI<true> xCOMI;
|
||||
const SimdImpl_COMI<false> xUCOMI;
|
||||
|
||||
const SimdImpl_MinMax<0x5f> xMAX;
|
||||
const SimdImpl_MinMax<0x5d> xMIN;
|
||||
const SimdImpl_Shuffle<0xc6> xSHUF;
|
||||
|
||||
const SimdImpl_DestRegEither<0x66,0xdb> xPAND;
|
||||
|
|
@ -109,50 +104,65 @@ const SimdImpl_DestRegEither<0x66,0xef> xPXOR;
|
|||
// to the following condition: (xmm2/m128 AND NOT xmm1) == 0;
|
||||
const SimdImpl_DestRegSSE<0x66,0x1738> xPTEST;
|
||||
|
||||
const SimdImpl_Compare<SSE2_Equal> xCMPEQ;
|
||||
const SimdImpl_Compare<SSE2_Less> xCMPLT;
|
||||
const SimdImpl_Compare<SSE2_LessOrEqual> xCMPLE;
|
||||
const SimdImpl_Compare<SSE2_Unordered> xCMPUNORD;
|
||||
const SimdImpl_Compare<SSE2_NotEqual> xCMPNE;
|
||||
const SimdImpl_Compare<SSE2_NotLess> xCMPNLT;
|
||||
const SimdImpl_Compare<SSE2_NotLessOrEqual> xCMPNLE;
|
||||
const SimdImpl_Compare<SSE2_Ordered> xCMPORD;
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// SSE Conversion Operations, as looney as they are.
|
||||
//
|
||||
// These enforce pointer strictness for Indirect forms, due to the otherwise completely confusing
|
||||
// nature of the functions. (so if a function expects an m32, you must use (u32*) or ptr32[]).
|
||||
//
|
||||
const SimdImpl_DestRegStrict<0xf3,0xe6,xRegisterSSE,xRegisterSSE,u64> xCVTDQ2PD;
|
||||
const SimdImpl_DestRegStrict<0x00,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTDQ2PS;
|
||||
|
||||
const SimdImpl_DestRegStrict<0xf2,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTPD2DQ;
|
||||
const SimdImpl_DestRegStrict<0x66,0x2d,xRegisterMMX,xRegisterSSE,u128> xCVTPD2PI;
|
||||
const SimdImpl_DestRegStrict<0x66,0x5a,xRegisterSSE,xRegisterSSE,u128> xCVTPD2PS;
|
||||
__forceinline void xCVTDQ2PD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0xe6 ); }
|
||||
__forceinline void xCVTDQ2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0xf3, 0xe6 ); }
|
||||
__forceinline void xCVTDQ2PS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x5b ); }
|
||||
__forceinline void xCVTDQ2PS( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x00, 0x5b ); }
|
||||
|
||||
const SimdImpl_DestRegStrict<0x66,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PD;
|
||||
const SimdImpl_DestRegStrict<0x00,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PS;
|
||||
__forceinline void xCVTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0xe6 ); }
|
||||
__forceinline void xCVTPD2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0xf2, 0xe6 ); }
|
||||
__forceinline void xCVTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x2d ); }
|
||||
__forceinline void xCVTPD2PI( const xRegisterMMX& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x2d ); }
|
||||
__forceinline void xCVTPD2PS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x5a ); }
|
||||
__forceinline void xCVTPD2PS( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x5a ); }
|
||||
|
||||
const SimdImpl_DestRegStrict<0x66,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTPS2DQ;
|
||||
const SimdImpl_DestRegStrict<0x00,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTPS2PD;
|
||||
const SimdImpl_DestRegStrict<0x00,0x2d,xRegisterMMX,xRegisterSSE,u64> xCVTPS2PI;
|
||||
__forceinline void xCVTPI2PD( const xRegisterSSE& to, const xRegisterMMX& from ) { OpWriteSSE( 0x66, 0x2a ); }
|
||||
__forceinline void xCVTPI2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x66, 0x2a ); }
|
||||
__forceinline void xCVTPI2PS( const xRegisterSSE& to, const xRegisterMMX& from ) { OpWriteSSE( 0x00, 0x2a ); }
|
||||
__forceinline void xCVTPI2PS( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2a ); }
|
||||
|
||||
const SimdImpl_DestRegStrict<0xf2,0x2d,xRegister32, xRegisterSSE,u64> xCVTSD2SI;
|
||||
const SimdImpl_DestRegStrict<0xf2,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTSD2SS;
|
||||
const SimdImpl_DestRegStrict<0xf2,0x2a,xRegisterMMX,xRegister32, u32> xCVTSI2SD;
|
||||
const SimdImpl_DestRegStrict<0xf3,0x2a,xRegisterSSE,xRegister32, u32> xCVTSI2SS;
|
||||
__forceinline void xCVTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x5b ); }
|
||||
__forceinline void xCVTPS2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x5b ); }
|
||||
__forceinline void xCVTPS2PD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x5a ); }
|
||||
__forceinline void xCVTPS2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x5a ); }
|
||||
__forceinline void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2d ); }
|
||||
__forceinline void xCVTPS2PI( const xRegisterMMX& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2d ); }
|
||||
|
||||
const SimdImpl_DestRegStrict<0xf3,0x5a,xRegisterSSE,xRegisterSSE,u32> xCVTSS2SD;
|
||||
const SimdImpl_DestRegStrict<0xf3,0x2d,xRegister32, xRegisterSSE,u32> xCVTSS2SI;
|
||||
__forceinline void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2d ); }
|
||||
__forceinline void xCVTSD2SI( const xRegister32& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x2d ); }
|
||||
__forceinline void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x5a ); }
|
||||
__forceinline void xCVTSD2SS( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x5a ); }
|
||||
__forceinline void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from ) { OpWriteSSE( 0xf2, 0x2a ); }
|
||||
__forceinline void xCVTSI2SD( const xRegisterMMX& to, const ModSib32& from ) { OpWriteSSE( 0xf2, 0x2a ); }
|
||||
__forceinline void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from ) { OpWriteSSE( 0xf3, 0x2a ); }
|
||||
__forceinline void xCVTSI2SS( const xRegisterSSE& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2a ); }
|
||||
|
||||
const SimdImpl_DestRegStrict<0x66,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTTPD2DQ;
|
||||
const SimdImpl_DestRegStrict<0x66,0x2c,xRegisterMMX,xRegisterSSE,u128> xCVTTPD2PI;
|
||||
const SimdImpl_DestRegStrict<0xf3,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTTPS2DQ;
|
||||
const SimdImpl_DestRegStrict<0x00,0x2c,xRegisterMMX,xRegisterSSE,u64> xCVTTPS2PI;
|
||||
__forceinline void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5a ); }
|
||||
__forceinline void xCVTSS2SD( const xRegisterSSE& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x5a ); }
|
||||
__forceinline void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2d ); }
|
||||
__forceinline void xCVTSS2SI( const xRegister32& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2d ); }
|
||||
|
||||
__forceinline void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0xe6 ); }
|
||||
__forceinline void xCVTTPD2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0xe6 ); }
|
||||
__forceinline void xCVTTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x2c ); }
|
||||
__forceinline void xCVTTPD2PI( const xRegisterMMX& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x2c ); }
|
||||
__forceinline void xCVTTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5b ); }
|
||||
__forceinline void xCVTTPS2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0xf3, 0x5b ); }
|
||||
__forceinline void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2c ); }
|
||||
__forceinline void xCVTTPS2PI( const xRegisterMMX& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2c ); }
|
||||
|
||||
__forceinline void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2c ); }
|
||||
__forceinline void xCVTTSD2SI( const xRegister32& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x2c ); }
|
||||
__forceinline void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2c ); }
|
||||
__forceinline void xCVTTSS2SI( const xRegister32& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2c ); }
|
||||
|
||||
const SimdImpl_DestRegStrict<0xf2,0x2c,xRegister32, xRegisterSSE,u64> xCVTTSD2SI;
|
||||
const SimdImpl_DestRegStrict<0xf3,0x2c,xRegister32, xRegisterSSE,u32> xCVTTSS2SI;
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
|
|
@ -221,7 +231,6 @@ const xImplSimd_Shift xPSLL =
|
|||
{ 0x66, 0xf3, 0x73, 6 }, // Q
|
||||
};
|
||||
|
||||
|
||||
const xImplSimd_AddSub xPADD =
|
||||
{
|
||||
{ 0x66, 0xdc+0x20 }, // B
|
||||
|
|
@ -248,7 +257,6 @@ const xImplSimd_AddSub xPSUB =
|
|||
{ 0x66, 0xd8+1 }, // USW
|
||||
};
|
||||
|
||||
|
||||
const xImplSimd_PMul xPMUL =
|
||||
{
|
||||
{ 0x66, 0xd5 }, // LW
|
||||
|
|
@ -326,9 +334,94 @@ const xImplSimd_Round xROUND =
|
|||
{ 0x66,0x0b3a }, // SD
|
||||
};
|
||||
|
||||
const SimdImpl_PMinMax<0xde,0x3c> xPMAX;
|
||||
const SimdImpl_PMinMax<0xda,0x38> xPMIN;
|
||||
const SimdImpl_PCompare xPCMP;
|
||||
// =====================================================================================================
|
||||
// SIMD Comparison Instructions
|
||||
// =====================================================================================================
|
||||
|
||||
void xImplSimd_Compare::PS( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0x00, 0xc2, to, from, (u8)CType ); }
|
||||
void xImplSimd_Compare::PS( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0x00, 0xc2, to, from, (u8)CType ); }
|
||||
|
||||
void xImplSimd_Compare::PD( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0x66, 0xc2, to, from, (u8)CType ); }
|
||||
void xImplSimd_Compare::PD( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0x66, 0xc2, to, from, (u8)CType ); }
|
||||
|
||||
void xImplSimd_Compare::SS( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0xf3, 0xc2, to, from, (u8)CType ); }
|
||||
void xImplSimd_Compare::SS( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0xf3, 0xc2, to, from, (u8)CType ); }
|
||||
|
||||
void xImplSimd_Compare::SD( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0xf2, 0xc2, to, from, (u8)CType ); }
|
||||
void xImplSimd_Compare::SD( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0xf2, 0xc2, to, from, (u8)CType ); }
|
||||
|
||||
const xImplSimd_MinMax xMIN =
|
||||
{
|
||||
{ 0x00, 0x5d }, // PS
|
||||
{ 0x66, 0x5d }, // PD
|
||||
{ 0xf3, 0x5d }, // SS
|
||||
{ 0xf2, 0x5d }, // SD
|
||||
};
|
||||
|
||||
const xImplSimd_MinMax xMAX =
|
||||
{
|
||||
{ 0x00, 0x5f }, // PS
|
||||
{ 0x66, 0x5f }, // PD
|
||||
{ 0xf3, 0x5f }, // SS
|
||||
{ 0xf2, 0x5f }, // SD
|
||||
};
|
||||
|
||||
// [TODO] : Merge this into the xCMP class, so that they are notation as: xCMP.EQ
|
||||
|
||||
const xImplSimd_Compare xCMPEQ = { SSE2_Equal };
|
||||
const xImplSimd_Compare xCMPLT = { SSE2_Less };
|
||||
const xImplSimd_Compare xCMPLE = { SSE2_LessOrEqual };
|
||||
const xImplSimd_Compare xCMPUNORD = { SSE2_LessOrEqual };
|
||||
const xImplSimd_Compare xCMPNE = { SSE2_NotEqual };
|
||||
const xImplSimd_Compare xCMPNLT = { SSE2_NotLess };
|
||||
const xImplSimd_Compare xCMPNLE = { SSE2_NotLessOrEqual };
|
||||
const xImplSimd_Compare xCMPORD = { SSE2_Ordered };
|
||||
|
||||
const xImplSimd_COMI xCOMI =
|
||||
{
|
||||
{ 0x00, 0x2f }, // SS
|
||||
{ 0x66, 0x2f }, // SD
|
||||
};
|
||||
|
||||
const xImplSimd_COMI xUCOMI =
|
||||
{
|
||||
{ 0x00, 0x2e }, // SS
|
||||
{ 0x66, 0x2e }, // SD
|
||||
};
|
||||
|
||||
const xImplSimd_PCompare xPCMP =
|
||||
{
|
||||
{ 0x66, 0x74 }, // EQB
|
||||
{ 0x66, 0x75 }, // EQW
|
||||
{ 0x66, 0x76 }, // EQD
|
||||
|
||||
{ 0x66, 0x64 }, // GTB
|
||||
{ 0x66, 0x65 }, // GTW
|
||||
{ 0x66, 0x66 }, // GTD
|
||||
};
|
||||
|
||||
const xImplSimd_PMinMax xPMIN =
|
||||
{
|
||||
{ 0x66, 0xda }, // UB
|
||||
{ 0x66, 0xea }, // SW
|
||||
{ 0x66, 0x3838 }, // SB
|
||||
{ 0x66, 0x3938 }, // SD
|
||||
|
||||
{ 0x66, 0x3a38 }, // UW
|
||||
{ 0x66, 0x3b38 }, // UD
|
||||
};
|
||||
|
||||
const xImplSimd_PMinMax xPMAX =
|
||||
{
|
||||
{ 0x66, 0xde }, // UB
|
||||
{ 0x66, 0xee }, // SW
|
||||
{ 0x66, 0x3c38 }, // SB
|
||||
{ 0x66, 0x3d38 }, // SD
|
||||
|
||||
{ 0x66, 0x3e38 }, // UW
|
||||
{ 0x66, 0x3f38 }, // UD
|
||||
};
|
||||
|
||||
const SimdImpl_PShuffle xPSHUF;
|
||||
const SimdImpl_PUnpack xPUNPCK;
|
||||
const SimdImpl_Unpack xUNPCK;
|
||||
|
|
|
|||
|
|
@ -65,7 +65,8 @@ extern void InstallSignalHandler();
|
|||
|
||||
#elif defined( _WIN32 )
|
||||
|
||||
extern int SysPageFaultExceptionFilter(EXCEPTION_POINTERS* eps);
|
||||
struct _EXCEPTION_POINTERS;
|
||||
extern int SysPageFaultExceptionFilter(struct _EXCEPTION_POINTERS* eps);
|
||||
|
||||
# define PCSX2_PAGEFAULT_PROTECT __try
|
||||
# define PCSX2_PAGEFAULT_EXCEPT __except(SysPageFaultExceptionFilter(GetExceptionInformation())) {}
|
||||
|
|
|
|||
|
|
@ -29,6 +29,10 @@
|
|||
|
||||
#include "GS.h"
|
||||
|
||||
#ifdef __WXMSW__
|
||||
# include <wx/msw/wrapwin.h>
|
||||
#endif
|
||||
|
||||
static __threadlocal SysCoreThread* tls_coreThread = NULL;
|
||||
|
||||
// --------------------------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -25,6 +25,10 @@
|
|||
|
||||
#include "Utilities/HashMap.h"
|
||||
|
||||
#ifdef __WXMSW__
|
||||
# include <wx/msw/wrapwin.h>
|
||||
#endif
|
||||
|
||||
IMPLEMENT_APP(Pcsx2App)
|
||||
|
||||
DEFINE_EVENT_TYPE( pxEVT_SemaphorePing );
|
||||
|
|
|
|||
|
|
@ -23,6 +23,10 @@
|
|||
#include <wx/file.h>
|
||||
#include <wx/textfile.h>
|
||||
|
||||
#ifdef __WXMSW__
|
||||
# include <wx/msw/wrapwin.h> // needed for OutputDebugStirng
|
||||
#endif
|
||||
|
||||
BEGIN_DECLARE_EVENT_TYPES()
|
||||
DECLARE_EVENT_TYPE(wxEVT_LOG_Write, -1)
|
||||
DECLARE_EVENT_TYPE(wxEVT_LOG_Newline, -1)
|
||||
|
|
|
|||
|
|
@ -25,7 +25,8 @@
|
|||
#include <wx/listctrl.h>
|
||||
|
||||
#ifdef __WXMSW__
|
||||
# include <commctrl.h> // needed for Vista icon spacing fix.
|
||||
# include <wx/msw/wrapwin.h> // needed for Vista icon spacing fix.
|
||||
# include <commctrl.h>
|
||||
#endif
|
||||
|
||||
using namespace wxHelpers;
|
||||
|
|
|
|||
Loading…
Reference in New Issue