diff --git a/common/build/x86emitter/x86emitter.vcproj b/common/build/x86emitter/x86emitter.vcproj index c2bd569781..15f3e0440d 100644 --- a/common/build/x86emitter/x86emitter.vcproj +++ b/common/build/x86emitter/x86emitter.vcproj @@ -332,10 +332,6 @@ - - @@ -348,6 +344,10 @@ RelativePath="..\..\include\x86emitter\implement\simd_arithmetic.h" > + + diff --git a/common/include/x86emitter/implement/xmm/comparisons.h b/common/include/x86emitter/implement/simd_comparisons.h similarity index 62% rename from common/include/x86emitter/implement/xmm/comparisons.h rename to common/include/x86emitter/implement/simd_comparisons.h index 8fe88368cb..7abda32600 100644 --- a/common/include/x86emitter/implement/xmm/comparisons.h +++ b/common/include/x86emitter/implement/simd_comparisons.h @@ -15,128 +15,111 @@ #pragma once +namespace x86Emitter { -////////////////////////////////////////////////////////////////////////////////////////// -// -template< u16 OpcodeSSE > -class SimdImpl_MinMax +struct xImplSimd_MinMax { -public: - const SimdImpl_DestRegSSE<0x00,OpcodeSSE> PS; // packed single precision - const SimdImpl_DestRegSSE<0x66,OpcodeSSE> PD; // packed double precision - const SimdImpl_DestRegSSE<0xf3,OpcodeSSE> SS; // scalar single precision - const SimdImpl_DestRegSSE<0xf2,OpcodeSSE> SD; // scalar double precision - - SimdImpl_MinMax() {} //GChow? + const xImplSimd_DestRegSSE PS; // packed single precision + const xImplSimd_DestRegSSE PD; // packed double precision + const xImplSimd_DestRegSSE SS; // scalar single precision + const xImplSimd_DestRegSSE SD; // scalar double precision }; ////////////////////////////////////////////////////////////////////////////////////////// -// -template< SSE2_ComparisonType CType > -class SimdImpl_Compare +// +struct xImplSimd_Compare { -protected: - template< u8 Prefix > struct Woot - { - __forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( Prefix, 0xc2, to, from ); xWrite8( CType ); } - __forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( Prefix, 0xc2, to, from ); xWrite8( CType ); } - Woot() {} - }; + SSE2_ComparisonType CType; -public: - const Woot<0x00> PS; - const Woot<0x66> PD; - const Woot<0xf3> SS; - const Woot<0xf2> SD; - SimdImpl_Compare() {} //GCWhat? + void PS( const xRegisterSSE& to, const xRegisterSSE& from ) const; + void PS( const xRegisterSSE& to, const ModSibBase& from ) const; + + void PD( const xRegisterSSE& to, const xRegisterSSE& from ) const; + void PD( const xRegisterSSE& to, const ModSibBase& from ) const; + + void SS( const xRegisterSSE& to, const xRegisterSSE& from ) const; + void SS( const xRegisterSSE& to, const ModSibBase& from ) const; + + void SD( const xRegisterSSE& to, const xRegisterSSE& from ) const; + void SD( const xRegisterSSE& to, const ModSibBase& from ) const; }; ////////////////////////////////////////////////////////////////////////////////////////// // Compare scalar floating point values and set EFLAGS (Ordered or Unordered) // -template< bool Ordered > -class SimdImpl_COMI +struct xImplSimd_COMI { -protected: - static const u16 OpcodeSSE = Ordered ? 0x2f : 0x2e; - -public: - const SimdImpl_DestRegSSE<0x00,OpcodeSSE> SS; - const SimdImpl_DestRegSSE<0x66,OpcodeSSE> SD; - - SimdImpl_COMI() {} + const xImplSimd_DestRegSSE SS; + const xImplSimd_DestRegSSE SD; }; ////////////////////////////////////////////////////////////////////////////////////////// // -class SimdImpl_PCompare +struct xImplSimd_PCompare { public: - SimdImpl_PCompare() {} - // Compare packed bytes for equality. // If a data element in dest is equal to the corresponding date element src, the // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. - const SimdImpl_DestRegEither<0x66,0x74> EQB; + const xImplSimd_DestRegEither EQB; // Compare packed words for equality. // If a data element in dest is equal to the corresponding date element src, the // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. - const SimdImpl_DestRegEither<0x66,0x75> EQW; + const xImplSimd_DestRegEither EQW; // Compare packed doublewords [32-bits] for equality. // If a data element in dest is equal to the corresponding date element src, the // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. - const SimdImpl_DestRegEither<0x66,0x76> EQD; + const xImplSimd_DestRegEither EQD; // Compare packed signed bytes for greater than. // If a data element in dest is greater than the corresponding date element src, the // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. - const SimdImpl_DestRegEither<0x66,0x64> GTB; + const xImplSimd_DestRegEither GTB; // Compare packed signed words for greater than. // If a data element in dest is greater than the corresponding date element src, the // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. - const SimdImpl_DestRegEither<0x66,0x65> GTW; + const xImplSimd_DestRegEither GTW; // Compare packed signed doublewords [32-bits] for greater than. // If a data element in dest is greater than the corresponding date element src, the // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. - const SimdImpl_DestRegEither<0x66,0x66> GTD; + const xImplSimd_DestRegEither GTD; }; ////////////////////////////////////////////////////////////////////////////////////////// // -template< u8 Opcode1, u16 Opcode2 > -class SimdImpl_PMinMax +struct xImplSimd_PMinMax { -public: - SimdImpl_PMinMax() {} - // Compare packed unsigned byte integers in dest to src and store packed min/max // values in dest. // Operation can be performed on either MMX or SSE operands. - const SimdImpl_DestRegEither<0x66,Opcode1> UB; + const xImplSimd_DestRegEither UB; // Compare packed signed word integers in dest to src and store packed min/max // values in dest. // Operation can be performed on either MMX or SSE operands. - const SimdImpl_DestRegEither<0x66,Opcode1+0x10> SW; + const xImplSimd_DestRegEither SW; // [SSE-4.1] Compare packed signed byte integers in dest to src and store // packed min/max values in dest. (SSE operands only) - const SimdImpl_DestRegSSE<0x66,(Opcode2<<8)|0x38> SB; + const xImplSimd_DestRegSSE SB; // [SSE-4.1] Compare packed signed doubleword integers in dest to src and store // packed min/max values in dest. (SSE operands only) - const SimdImpl_DestRegSSE<0x66,((Opcode2+1)<<8)|0x38> SD; + const xImplSimd_DestRegSSE SD; // [SSE-4.1] Compare packed unsigned word integers in dest to src and store // packed min/max values in dest. (SSE operands only) - const SimdImpl_DestRegSSE<0x66,((Opcode2+2)<<8)|0x38> UW; + const xImplSimd_DestRegSSE UW; // [SSE-4.1] Compare packed unsigned doubleword integers in dest to src and store // packed min/max values in dest. (SSE operands only) - const SimdImpl_DestRegSSE<0x66,((Opcode2+3)<<8)|0x38> UD; + const xImplSimd_DestRegSSE UD; }; + +} // end namespace x86Emitter + diff --git a/common/include/x86emitter/instructions.h b/common/include/x86emitter/instructions.h index 37ee9bd018..fbc29d2ab6 100644 --- a/common/include/x86emitter/instructions.h +++ b/common/include/x86emitter/instructions.h @@ -428,59 +428,81 @@ namespace x86Emitter extern const Internal::SimdImpl_DestRegEither<0x66,0xeb> xPOR; extern const Internal::SimdImpl_DestRegEither<0x66,0xef> xPXOR; - - extern const Internal::SimdImpl_COMI xCOMI; - extern const Internal::SimdImpl_COMI xUCOMI; - - extern const Internal::SimdImpl_MinMax<0x5f> xMAX; - extern const Internal::SimdImpl_MinMax<0x5d> xMIN; extern const Internal::SimdImpl_Shuffle<0xc6> xSHUF; // ------------------------------------------------------------------------ extern const Internal::SimdImpl_DestRegSSE<0x66,0x1738> xPTEST; - extern const Internal::SimdImpl_Compare xCMPEQ; - extern const Internal::SimdImpl_Compare xCMPLT; - extern const Internal::SimdImpl_Compare xCMPLE; - extern const Internal::SimdImpl_Compare xCMPUNORD; - extern const Internal::SimdImpl_Compare xCMPNE; - extern const Internal::SimdImpl_Compare xCMPNLT; - extern const Internal::SimdImpl_Compare xCMPNLE; - extern const Internal::SimdImpl_Compare xCMPORD; + extern const xImplSimd_MinMax xMIN; + extern const xImplSimd_MinMax xMAX; + + extern const xImplSimd_Compare xCMPEQ, xCMPLT, + xCMPLE, xCMPUNORD, + xCMPNE, xCMPNLT, + xCMPNLE,xCMPORD; + + extern const xImplSimd_COMI xCOMI; + extern const xImplSimd_COMI xUCOMI; + + extern const xImplSimd_PCompare xPCMP; + extern const xImplSimd_PMinMax xPMIN; + extern const xImplSimd_PMinMax xPMAX; // ------------------------------------------------------------------------ - // OMG Evil. I went cross-eyed an hour ago doing this. + // // - extern const Internal::SimdImpl_DestRegStrict<0xf3,0xe6,xRegisterSSE,xRegisterSSE,u64> xCVTDQ2PD; - extern const Internal::SimdImpl_DestRegStrict<0x00,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTDQ2PS; + extern void xCVTDQ2PD( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTDQ2PD( const xRegisterSSE& to, const ModSib64& from ); + extern void xCVTDQ2PS( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTDQ2PS( const xRegisterSSE& to, const ModSib128& from ); - extern const Internal::SimdImpl_DestRegStrict<0xf2,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTPD2DQ; - extern const Internal::SimdImpl_DestRegStrict<0x66,0x2d,xRegisterMMX,xRegisterSSE,u128> xCVTPD2PI; - extern const Internal::SimdImpl_DestRegStrict<0x66,0x5a,xRegisterSSE,xRegisterSSE,u128> xCVTPD2PS; + extern void xCVTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTPD2DQ( const xRegisterSSE& to, const ModSib128& from ); + extern void xCVTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ); + extern void xCVTPD2PI( const xRegisterMMX& to, const ModSib128& from ); + extern void xCVTPD2PS( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTPD2PS( const xRegisterSSE& to, const ModSib128& from ); - extern const Internal::SimdImpl_DestRegStrict<0x66,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PD; - extern const Internal::SimdImpl_DestRegStrict<0x00,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PS; + extern void xCVTPI2PD( const xRegisterSSE& to, const xRegisterMMX& from ); + extern void xCVTPI2PD( const xRegisterSSE& to, const ModSib64& from ); + extern void xCVTPI2PS( const xRegisterSSE& to, const xRegisterMMX& from ); + extern void xCVTPI2PS( const xRegisterSSE& to, const ModSib64& from ); - extern const Internal::SimdImpl_DestRegStrict<0x66,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTPS2DQ; - extern const Internal::SimdImpl_DestRegStrict<0x00,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTPS2PD; - extern const Internal::SimdImpl_DestRegStrict<0x00,0x2d,xRegisterMMX,xRegisterSSE,u64> xCVTPS2PI; + extern void xCVTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTPS2DQ( const xRegisterSSE& to, const ModSib128& from ); + extern void xCVTPS2PD( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTPS2PD( const xRegisterSSE& to, const ModSib64& from ); + extern void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ); + extern void xCVTPS2PI( const xRegisterMMX& to, const ModSib64& from ); - extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2d,xRegister32, xRegisterSSE,u64> xCVTSD2SI; - extern const Internal::SimdImpl_DestRegStrict<0xf2,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTSD2SS; - extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2a,xRegisterMMX,xRegister32, u32> xCVTSI2SD; - extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2a,xRegisterSSE,xRegister32, u32> xCVTSI2SS; + extern void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from ); + extern void xCVTSD2SI( const xRegister32& to, const ModSib64& from ); + extern void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTSD2SS( const xRegisterSSE& to, const ModSib64& from ); + extern void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from ); + extern void xCVTSI2SD( const xRegisterMMX& to, const ModSib32& from ); + extern void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from ); + extern void xCVTSI2SS( const xRegisterSSE& to, const ModSib32& from ); - extern const Internal::SimdImpl_DestRegStrict<0xf3,0x5a,xRegisterSSE,xRegisterSSE,u32> xCVTSS2SD; - extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2d,xRegister32, xRegisterSSE,u32> xCVTSS2SI; + extern void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTSS2SD( const xRegisterSSE& to, const ModSib32& from ); + extern void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from ); + extern void xCVTSS2SI( const xRegister32& to, const ModSib32& from ); - extern const Internal::SimdImpl_DestRegStrict<0x66,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTTPD2DQ; - extern const Internal::SimdImpl_DestRegStrict<0x66,0x2c,xRegisterMMX,xRegisterSSE,u128> xCVTTPD2PI; - extern const Internal::SimdImpl_DestRegStrict<0xf3,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTTPS2DQ; - extern const Internal::SimdImpl_DestRegStrict<0x00,0x2c,xRegisterMMX,xRegisterSSE,u64> xCVTTPS2PI; + extern void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTTPD2DQ( const xRegisterSSE& to, const ModSib128& from ); + extern void xCVTTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ); + extern void xCVTTPD2PI( const xRegisterMMX& to, const ModSib128& from ); + extern void xCVTTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ); + extern void xCVTTPS2DQ( const xRegisterSSE& to, const ModSib128& from ); + extern void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ); + extern void xCVTTPS2PI( const xRegisterMMX& to, const ModSib64& from ); - extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2c,xRegister32, xRegisterSSE,u64> xCVTTSD2SI; - extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2c,xRegister32, xRegisterSSE,u32> xCVTTSS2SI; + extern void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from ); + extern void xCVTTSD2SI( const xRegister32& to, const ModSib64& from ); + extern void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from ); + extern void xCVTTSS2SI( const xRegister32& to, const ModSib32& from ); // ------------------------------------------------------------------------ @@ -502,11 +524,6 @@ namespace x86Emitter extern const xImplSimd_DotProduct xDP; extern const xImplSimd_Round xROUND; - - extern const Internal::SimdImpl_PMinMax<0xde,0x3c> xPMAX; - extern const Internal::SimdImpl_PMinMax<0xda,0x38> xPMIN; - - extern const Internal::SimdImpl_PCompare xPCMP; extern const Internal::SimdImpl_PShuffle xPSHUF; extern const Internal::SimdImpl_PUnpack xPUNPCK; extern const Internal::SimdImpl_Unpack xUNPCK; diff --git a/common/include/x86emitter/x86types.h b/common/include/x86emitter/x86types.h index bbad0c573d..a66f60eafc 100644 --- a/common/include/x86emitter/x86types.h +++ b/common/include/x86emitter/x86types.h @@ -422,6 +422,12 @@ __forceinline void xWrite( T val ) return !operator==( src ); } }; + + typedef ModSibStrict ModSib8; + typedef ModSibStrict ModSib16; + typedef ModSibStrict ModSib32; + typedef ModSibStrict ModSib64; + typedef ModSibStrict ModSib128; ////////////////////////////////////////////////////////////////////////////////////////// // xAddressIndexerBase - This is a static class which provisions our ptr[] syntax. @@ -696,7 +702,6 @@ __forceinline void xWrite( T val ) #include "implement/helpers.h" #include "implement/simd_templated_helpers.h" #include "implement/xmm/moremovs.h" - #include "implement/xmm/comparisons.h" #include "implement/xmm/shufflepack.h" #include "implement/group1.h" #include "implement/group2.h" @@ -731,5 +736,6 @@ __forceinline void xWrite( T val ) #include "implement/simd_helpers.h" #include "implement/simd_arithmetic.h" +#include "implement/simd_comparisons.h" #include "inlines.inl" diff --git a/common/src/x86emitter/simd.cpp b/common/src/x86emitter/simd.cpp index 14a0599b43..707ea553ca 100644 --- a/common/src/x86emitter/simd.cpp +++ b/common/src/x86emitter/simd.cpp @@ -90,11 +90,6 @@ const MovhlImplAll<0x12> xMOVL; const MovhlImpl_RtoR<0x16> xMOVLH; const MovhlImpl_RtoR<0x12> xMOVHL; -const SimdImpl_COMI xCOMI; -const SimdImpl_COMI xUCOMI; - -const SimdImpl_MinMax<0x5f> xMAX; -const SimdImpl_MinMax<0x5d> xMIN; const SimdImpl_Shuffle<0xc6> xSHUF; const SimdImpl_DestRegEither<0x66,0xdb> xPAND; @@ -109,50 +104,65 @@ const SimdImpl_DestRegEither<0x66,0xef> xPXOR; // to the following condition: (xmm2/m128 AND NOT xmm1) == 0; const SimdImpl_DestRegSSE<0x66,0x1738> xPTEST; -const SimdImpl_Compare xCMPEQ; -const SimdImpl_Compare xCMPLT; -const SimdImpl_Compare xCMPLE; -const SimdImpl_Compare xCMPUNORD; -const SimdImpl_Compare xCMPNE; -const SimdImpl_Compare xCMPNLT; -const SimdImpl_Compare xCMPNLE; -const SimdImpl_Compare xCMPORD; - // ------------------------------------------------------------------------ // SSE Conversion Operations, as looney as they are. // // These enforce pointer strictness for Indirect forms, due to the otherwise completely confusing // nature of the functions. (so if a function expects an m32, you must use (u32*) or ptr32[]). // -const SimdImpl_DestRegStrict<0xf3,0xe6,xRegisterSSE,xRegisterSSE,u64> xCVTDQ2PD; -const SimdImpl_DestRegStrict<0x00,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTDQ2PS; -const SimdImpl_DestRegStrict<0xf2,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTPD2DQ; -const SimdImpl_DestRegStrict<0x66,0x2d,xRegisterMMX,xRegisterSSE,u128> xCVTPD2PI; -const SimdImpl_DestRegStrict<0x66,0x5a,xRegisterSSE,xRegisterSSE,u128> xCVTPD2PS; +__forceinline void xCVTDQ2PD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0xe6 ); } +__forceinline void xCVTDQ2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0xf3, 0xe6 ); } +__forceinline void xCVTDQ2PS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x5b ); } +__forceinline void xCVTDQ2PS( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x00, 0x5b ); } -const SimdImpl_DestRegStrict<0x66,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PD; -const SimdImpl_DestRegStrict<0x00,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PS; +__forceinline void xCVTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0xe6 ); } +__forceinline void xCVTPD2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0xf2, 0xe6 ); } +__forceinline void xCVTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x2d ); } +__forceinline void xCVTPD2PI( const xRegisterMMX& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x2d ); } +__forceinline void xCVTPD2PS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x5a ); } +__forceinline void xCVTPD2PS( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x5a ); } -const SimdImpl_DestRegStrict<0x66,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTPS2DQ; -const SimdImpl_DestRegStrict<0x00,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTPS2PD; -const SimdImpl_DestRegStrict<0x00,0x2d,xRegisterMMX,xRegisterSSE,u64> xCVTPS2PI; +__forceinline void xCVTPI2PD( const xRegisterSSE& to, const xRegisterMMX& from ) { OpWriteSSE( 0x66, 0x2a ); } +__forceinline void xCVTPI2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x66, 0x2a ); } +__forceinline void xCVTPI2PS( const xRegisterSSE& to, const xRegisterMMX& from ) { OpWriteSSE( 0x00, 0x2a ); } +__forceinline void xCVTPI2PS( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2a ); } -const SimdImpl_DestRegStrict<0xf2,0x2d,xRegister32, xRegisterSSE,u64> xCVTSD2SI; -const SimdImpl_DestRegStrict<0xf2,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTSD2SS; -const SimdImpl_DestRegStrict<0xf2,0x2a,xRegisterMMX,xRegister32, u32> xCVTSI2SD; -const SimdImpl_DestRegStrict<0xf3,0x2a,xRegisterSSE,xRegister32, u32> xCVTSI2SS; +__forceinline void xCVTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x5b ); } +__forceinline void xCVTPS2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x5b ); } +__forceinline void xCVTPS2PD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x5a ); } +__forceinline void xCVTPS2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x5a ); } +__forceinline void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2d ); } +__forceinline void xCVTPS2PI( const xRegisterMMX& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2d ); } -const SimdImpl_DestRegStrict<0xf3,0x5a,xRegisterSSE,xRegisterSSE,u32> xCVTSS2SD; -const SimdImpl_DestRegStrict<0xf3,0x2d,xRegister32, xRegisterSSE,u32> xCVTSS2SI; +__forceinline void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2d ); } +__forceinline void xCVTSD2SI( const xRegister32& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x2d ); } +__forceinline void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x5a ); } +__forceinline void xCVTSD2SS( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x5a ); } +__forceinline void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from ) { OpWriteSSE( 0xf2, 0x2a ); } +__forceinline void xCVTSI2SD( const xRegisterMMX& to, const ModSib32& from ) { OpWriteSSE( 0xf2, 0x2a ); } +__forceinline void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from ) { OpWriteSSE( 0xf3, 0x2a ); } +__forceinline void xCVTSI2SS( const xRegisterSSE& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2a ); } -const SimdImpl_DestRegStrict<0x66,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTTPD2DQ; -const SimdImpl_DestRegStrict<0x66,0x2c,xRegisterMMX,xRegisterSSE,u128> xCVTTPD2PI; -const SimdImpl_DestRegStrict<0xf3,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTTPS2DQ; -const SimdImpl_DestRegStrict<0x00,0x2c,xRegisterMMX,xRegisterSSE,u64> xCVTTPS2PI; +__forceinline void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5a ); } +__forceinline void xCVTSS2SD( const xRegisterSSE& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x5a ); } +__forceinline void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2d ); } +__forceinline void xCVTSS2SI( const xRegister32& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2d ); } + +__forceinline void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0xe6 ); } +__forceinline void xCVTTPD2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0xe6 ); } +__forceinline void xCVTTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x2c ); } +__forceinline void xCVTTPD2PI( const xRegisterMMX& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x2c ); } +__forceinline void xCVTTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5b ); } +__forceinline void xCVTTPS2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0xf3, 0x5b ); } +__forceinline void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2c ); } +__forceinline void xCVTTPS2PI( const xRegisterMMX& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2c ); } + +__forceinline void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2c ); } +__forceinline void xCVTTSD2SI( const xRegister32& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x2c ); } +__forceinline void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2c ); } +__forceinline void xCVTTSS2SI( const xRegister32& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2c ); } -const SimdImpl_DestRegStrict<0xf2,0x2c,xRegister32, xRegisterSSE,u64> xCVTTSD2SI; -const SimdImpl_DestRegStrict<0xf3,0x2c,xRegister32, xRegisterSSE,u32> xCVTTSS2SI; // ------------------------------------------------------------------------ @@ -221,7 +231,6 @@ const xImplSimd_Shift xPSLL = { 0x66, 0xf3, 0x73, 6 }, // Q }; - const xImplSimd_AddSub xPADD = { { 0x66, 0xdc+0x20 }, // B @@ -248,7 +257,6 @@ const xImplSimd_AddSub xPSUB = { 0x66, 0xd8+1 }, // USW }; - const xImplSimd_PMul xPMUL = { { 0x66, 0xd5 }, // LW @@ -326,9 +334,94 @@ const xImplSimd_Round xROUND = { 0x66,0x0b3a }, // SD }; -const SimdImpl_PMinMax<0xde,0x3c> xPMAX; -const SimdImpl_PMinMax<0xda,0x38> xPMIN; -const SimdImpl_PCompare xPCMP; +// ===================================================================================================== +// SIMD Comparison Instructions +// ===================================================================================================== + +void xImplSimd_Compare::PS( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0x00, 0xc2, to, from, (u8)CType ); } +void xImplSimd_Compare::PS( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0x00, 0xc2, to, from, (u8)CType ); } + +void xImplSimd_Compare::PD( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0x66, 0xc2, to, from, (u8)CType ); } +void xImplSimd_Compare::PD( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0x66, 0xc2, to, from, (u8)CType ); } + +void xImplSimd_Compare::SS( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0xf3, 0xc2, to, from, (u8)CType ); } +void xImplSimd_Compare::SS( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0xf3, 0xc2, to, from, (u8)CType ); } + +void xImplSimd_Compare::SD( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0xf2, 0xc2, to, from, (u8)CType ); } +void xImplSimd_Compare::SD( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0xf2, 0xc2, to, from, (u8)CType ); } + +const xImplSimd_MinMax xMIN = +{ + { 0x00, 0x5d }, // PS + { 0x66, 0x5d }, // PD + { 0xf3, 0x5d }, // SS + { 0xf2, 0x5d }, // SD +}; + +const xImplSimd_MinMax xMAX = +{ + { 0x00, 0x5f }, // PS + { 0x66, 0x5f }, // PD + { 0xf3, 0x5f }, // SS + { 0xf2, 0x5f }, // SD +}; + +// [TODO] : Merge this into the xCMP class, so that they are notation as: xCMP.EQ + +const xImplSimd_Compare xCMPEQ = { SSE2_Equal }; +const xImplSimd_Compare xCMPLT = { SSE2_Less }; +const xImplSimd_Compare xCMPLE = { SSE2_LessOrEqual }; +const xImplSimd_Compare xCMPUNORD = { SSE2_LessOrEqual }; +const xImplSimd_Compare xCMPNE = { SSE2_NotEqual }; +const xImplSimd_Compare xCMPNLT = { SSE2_NotLess }; +const xImplSimd_Compare xCMPNLE = { SSE2_NotLessOrEqual }; +const xImplSimd_Compare xCMPORD = { SSE2_Ordered }; + +const xImplSimd_COMI xCOMI = +{ + { 0x00, 0x2f }, // SS + { 0x66, 0x2f }, // SD +}; + +const xImplSimd_COMI xUCOMI = +{ + { 0x00, 0x2e }, // SS + { 0x66, 0x2e }, // SD +}; + +const xImplSimd_PCompare xPCMP = +{ + { 0x66, 0x74 }, // EQB + { 0x66, 0x75 }, // EQW + { 0x66, 0x76 }, // EQD + + { 0x66, 0x64 }, // GTB + { 0x66, 0x65 }, // GTW + { 0x66, 0x66 }, // GTD +}; + +const xImplSimd_PMinMax xPMIN = +{ + { 0x66, 0xda }, // UB + { 0x66, 0xea }, // SW + { 0x66, 0x3838 }, // SB + { 0x66, 0x3938 }, // SD + + { 0x66, 0x3a38 }, // UW + { 0x66, 0x3b38 }, // UD +}; + +const xImplSimd_PMinMax xPMAX = +{ + { 0x66, 0xde }, // UB + { 0x66, 0xee }, // SW + { 0x66, 0x3c38 }, // SB + { 0x66, 0x3d38 }, // SD + + { 0x66, 0x3e38 }, // UW + { 0x66, 0x3f38 }, // UD +}; + const SimdImpl_PShuffle xPSHUF; const SimdImpl_PUnpack xPUNPCK; const SimdImpl_Unpack xUNPCK; diff --git a/pcsx2/System/PageFaultSource.h b/pcsx2/System/PageFaultSource.h index 232f76aa9f..65b029f2f9 100644 --- a/pcsx2/System/PageFaultSource.h +++ b/pcsx2/System/PageFaultSource.h @@ -65,7 +65,8 @@ extern void InstallSignalHandler(); #elif defined( _WIN32 ) - extern int SysPageFaultExceptionFilter(EXCEPTION_POINTERS* eps); + struct _EXCEPTION_POINTERS; + extern int SysPageFaultExceptionFilter(struct _EXCEPTION_POINTERS* eps); # define PCSX2_PAGEFAULT_PROTECT __try # define PCSX2_PAGEFAULT_EXCEPT __except(SysPageFaultExceptionFilter(GetExceptionInformation())) {} diff --git a/pcsx2/System/SysCoreThread.cpp b/pcsx2/System/SysCoreThread.cpp index 6ae86a7afc..5114d00164 100644 --- a/pcsx2/System/SysCoreThread.cpp +++ b/pcsx2/System/SysCoreThread.cpp @@ -29,6 +29,10 @@ #include "GS.h" +#ifdef __WXMSW__ +# include +#endif + static __threadlocal SysCoreThread* tls_coreThread = NULL; // -------------------------------------------------------------------------------------- diff --git a/pcsx2/gui/AppMain.cpp b/pcsx2/gui/AppMain.cpp index 6087c1038c..96598d3c27 100644 --- a/pcsx2/gui/AppMain.cpp +++ b/pcsx2/gui/AppMain.cpp @@ -25,6 +25,10 @@ #include "Utilities/HashMap.h" +#ifdef __WXMSW__ +# include +#endif + IMPLEMENT_APP(Pcsx2App) DEFINE_EVENT_TYPE( pxEVT_SemaphorePing ); diff --git a/pcsx2/gui/ConsoleLogger.cpp b/pcsx2/gui/ConsoleLogger.cpp index 17817e9ad4..d622b7182f 100644 --- a/pcsx2/gui/ConsoleLogger.cpp +++ b/pcsx2/gui/ConsoleLogger.cpp @@ -23,6 +23,10 @@ #include #include +#ifdef __WXMSW__ +# include // needed for OutputDebugStirng +#endif + BEGIN_DECLARE_EVENT_TYPES() DECLARE_EVENT_TYPE(wxEVT_LOG_Write, -1) DECLARE_EVENT_TYPE(wxEVT_LOG_Newline, -1) diff --git a/pcsx2/gui/Dialogs/ConfigurationDialog.cpp b/pcsx2/gui/Dialogs/ConfigurationDialog.cpp index 1254f81bd8..e695f0ac8c 100644 --- a/pcsx2/gui/Dialogs/ConfigurationDialog.cpp +++ b/pcsx2/gui/Dialogs/ConfigurationDialog.cpp @@ -25,7 +25,8 @@ #include #ifdef __WXMSW__ -# include // needed for Vista icon spacing fix. +# include // needed for Vista icon spacing fix. +# include #endif using namespace wxHelpers;