mirror of https://github.com/PCSX2/pcsx2.git
core: rely on register.GetId() instead of define
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743e615224
commit
9eb73e1ef0
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@ -984,10 +984,10 @@ void psxSetBranchReg(u32 reg)
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psxRecompileNextInstruction(1);
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psxRecompileNextInstruction(1);
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if( x86regs[ESI].inuse ) {
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if( x86regs[esi.GetId()].inuse ) {
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pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK );
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pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
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xMOV(ptr[&psxRegs.pc], esi);
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xMOV(ptr[&psxRegs.pc], esi);
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x86regs[ESI].inuse = 0;
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x86regs[esi.GetId()].inuse = 0;
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#ifdef PCSX2_DEBUG
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#ifdef PCSX2_DEBUG
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xOR( esi, esi );
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xOR( esi, esi );
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#endif
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#endif
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@ -944,10 +944,10 @@ void rpsxJALR()
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psxRecompileNextInstruction(1);
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psxRecompileNextInstruction(1);
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if( x86regs[ESI].inuse ) {
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if( x86regs[esi.GetId()].inuse ) {
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pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK );
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pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
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xMOV(ptr[&psxRegs.pc], esi);
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xMOV(ptr[&psxRegs.pc], esi);
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x86regs[ESI].inuse = 0;
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x86regs[esi.GetId()].inuse = 0;
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#ifdef PCSX2_DEBUG
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#ifdef PCSX2_DEBUG
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xOR( esi, esi );
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xOR( esi, esi );
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#endif
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#endif
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@ -122,7 +122,7 @@ int _getFreeX86reg(int mode)
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for (uint i=0; i<iREGCNT_GPR; i++) {
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for (uint i=0; i<iREGCNT_GPR; i++) {
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int reg = (g_x86checknext+i)%iREGCNT_GPR;
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int reg = (g_x86checknext+i)%iREGCNT_GPR;
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if( reg == 0 || reg == ESP || reg == EBP ) continue;
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if( reg == 0 || reg == esp.GetId() || reg == ebp.GetId() ) continue;
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if( reg >= maxreg ) continue;
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if( reg >= maxreg ) continue;
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//if( (mode&MODE_NOFRAME) && reg==EBP ) continue;
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//if( (mode&MODE_NOFRAME) && reg==EBP ) continue;
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@ -133,7 +133,7 @@ int _getFreeX86reg(int mode)
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}
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}
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for (int i=1; i<maxreg; i++) {
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for (int i=1; i<maxreg; i++) {
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if( i == ESP || i==EBP ) continue;
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if( i == esp.GetId() || i==ebp.GetId()) continue;
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//if( (mode&MODE_NOFRAME) && i==EBP ) continue;
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//if( (mode&MODE_NOFRAME) && i==EBP ) continue;
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if (x86regs[i].needed) continue;
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if (x86regs[i].needed) continue;
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@ -247,7 +247,7 @@ int _allocX86reg(int x86reg, int type, int reg, int mode)
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{
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{
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uint i;
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uint i;
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pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." );
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pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." );
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pxAssertDev( x86reg != ESP && x86reg != EBP, "Allocation of ESP/EBP is not allowed!" );
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pxAssertDev( x86reg != esp.GetId() && x86reg != ebp.GetId(), "Allocation of ESP/EBP is not allowed!" );
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// don't alloc EAX and ESP,EBP if MODE_NOFRAME
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// don't alloc EAX and ESP,EBP if MODE_NOFRAME
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int oldmode = mode;
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int oldmode = mode;
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@ -276,7 +276,7 @@ int _allocX86reg(int x86reg, int type, int reg, int mode)
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}
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}
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for (i=1; i<maxreg; i++) {
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for (i=1; i<maxreg; i++) {
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if ( i == ESP || i == EBP ) continue;
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if ( i == esp.GetId() || i == ebp.GetId() ) continue;
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if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg) continue;
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if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg) continue;
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if( i >= maxreg ) {
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if( i >= maxreg ) {
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@ -974,10 +974,10 @@ void SetBranchReg( u32 reg )
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recompileNextInstruction(1);
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recompileNextInstruction(1);
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if( x86regs[ESI].inuse ) {
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if( x86regs[esi.GetId()].inuse ) {
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pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK );
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pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
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xMOV(ptr[&cpuRegs.pc], esi);
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xMOV(ptr[&cpuRegs.pc], esi);
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x86regs[ESI].inuse = 0;
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x86regs[esi.GetId()].inuse = 0;
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}
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}
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else {
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else {
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xMOV(eax, ptr[&g_recWriteback]);
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xMOV(eax, ptr[&g_recWriteback]);
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@ -144,10 +144,10 @@ void recJALR()
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_clearNeededXMMregs();
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_clearNeededXMMregs();
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recompileNextInstruction(1);
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recompileNextInstruction(1);
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if( x86regs[ESI].inuse ) {
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if( x86regs[esi.GetId()].inuse ) {
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pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK );
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pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
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xMOV(ptr[&cpuRegs.pc], esi);
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xMOV(ptr[&cpuRegs.pc], esi);
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x86regs[ESI].inuse = 0;
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x86regs[esi.GetId()].inuse = 0;
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}
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}
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else {
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else {
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xMOV(eax, ptr[&g_recWriteback]);
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xMOV(eax, ptr[&g_recWriteback]);
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@ -683,7 +683,7 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info)
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//------------------------------------------------------------------
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//------------------------------------------------------------------
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int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
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int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
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{
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{
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if( x86reg == EAX ) {
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if( x86reg == eax.GetId() ) {
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if (imm) xADD(xRegister32(x86reg), imm);
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if (imm) xADD(xRegister32(x86reg), imm);
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}
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}
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else {
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else {
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@ -713,7 +713,7 @@ int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
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xSHL(eax, 4); // multiply by 16 (shift left by 4)
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xSHL(eax, 4); // multiply by 16 (shift left by 4)
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}
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}
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return EAX;
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return eax.GetId();
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}
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}
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//------------------------------------------------------------------
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//------------------------------------------------------------------
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@ -339,10 +339,10 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info)
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xMOV(ptr[&tempECX], ecx);
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xMOV(ptr[&tempECX], ecx);
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int temp1 = ECX; //receives regd
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int temp1 = ecx.GetId(); //receives regd
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int temp2 = ALLOCTEMPX86(0);
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int temp2 = ALLOCTEMPX86(0);
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if (temp2 == ECX)
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if (temp2 == ecx.GetId())
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{
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{
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temp2 = ALLOCTEMPX86(0);
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temp2 = ALLOCTEMPX86(0);
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_freeX86reg(ecx);
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_freeX86reg(ecx);
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@ -434,10 +434,10 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info)
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xMOV(ptr[&tempECX], ecx);
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xMOV(ptr[&tempECX], ecx);
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int temp1 = ECX; //receives regd
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int temp1 = ecx.GetId(); //receives regd
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int temp2 = ALLOCTEMPX86(0);
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int temp2 = ALLOCTEMPX86(0);
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if (temp2 == ECX)
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if (temp2 == ecx.GetId())
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{
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{
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temp2 = ALLOCTEMPX86(0);
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temp2 = ALLOCTEMPX86(0);
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_freeX86reg(ecx);
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_freeX86reg(ecx);
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@ -3058,9 +3058,9 @@ void VuBaseBlock::Recompile()
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if (s_JumpX86 == i && x86regs[s_JumpX86].inuse)
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if (s_JumpX86 == i && x86regs[s_JumpX86].inuse)
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{
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{
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x86regs[s_JumpX86].inuse = 0;
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x86regs[s_JumpX86].inuse = 0;
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x86regs[EAX].inuse = 1;
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x86regs[eax.GetId()].inuse = 1;
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xMOV(eax, xRegister32(s_JumpX86));
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xMOV(eax, xRegister32(s_JumpX86));
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s_JumpX86 = EAX;
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s_JumpX86 = eax.GetId();
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}
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}
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if (x86regs[i].inuse)
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if (x86regs[i].inuse)
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