From 9eb73e1ef08132bcc410e4884e9a9b14eb4399fe Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Thu, 26 Nov 2015 21:29:29 +0100 Subject: [PATCH] core: rely on register.GetId() instead of define --- pcsx2/x86/iR3000A.cpp | 6 +++--- pcsx2/x86/iR3000Atables.cpp | 6 +++--- pcsx2/x86/ix86-32/iCore-32.cpp | 8 ++++---- pcsx2/x86/ix86-32/iR5900-32.cpp | 6 +++--- pcsx2/x86/ix86-32/iR5900Jump.cpp | 6 +++--- pcsx2/x86/sVU_Lower.cpp | 4 ++-- pcsx2/x86/sVU_Upper.cpp | 8 ++++---- pcsx2/x86/sVU_zerorec.cpp | 4 ++-- 8 files changed, 24 insertions(+), 24 deletions(-) diff --git a/pcsx2/x86/iR3000A.cpp b/pcsx2/x86/iR3000A.cpp index 36bb32a6a6..21ebdbda60 100644 --- a/pcsx2/x86/iR3000A.cpp +++ b/pcsx2/x86/iR3000A.cpp @@ -984,10 +984,10 @@ void psxSetBranchReg(u32 reg) psxRecompileNextInstruction(1); - if( x86regs[ESI].inuse ) { - pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); + if( x86regs[esi.GetId()].inuse ) { + pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK ); xMOV(ptr[&psxRegs.pc], esi); - x86regs[ESI].inuse = 0; + x86regs[esi.GetId()].inuse = 0; #ifdef PCSX2_DEBUG xOR( esi, esi ); #endif diff --git a/pcsx2/x86/iR3000Atables.cpp b/pcsx2/x86/iR3000Atables.cpp index 5c74bf6f3b..57cb823dea 100644 --- a/pcsx2/x86/iR3000Atables.cpp +++ b/pcsx2/x86/iR3000Atables.cpp @@ -944,10 +944,10 @@ void rpsxJALR() psxRecompileNextInstruction(1); - if( x86regs[ESI].inuse ) { - pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); + if( x86regs[esi.GetId()].inuse ) { + pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK ); xMOV(ptr[&psxRegs.pc], esi); - x86regs[ESI].inuse = 0; + x86regs[esi.GetId()].inuse = 0; #ifdef PCSX2_DEBUG xOR( esi, esi ); #endif diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp index 46785bdce3..2cad9fd5e8 100644 --- a/pcsx2/x86/ix86-32/iCore-32.cpp +++ b/pcsx2/x86/ix86-32/iCore-32.cpp @@ -122,7 +122,7 @@ int _getFreeX86reg(int mode) for (uint i=0; i= maxreg ) continue; //if( (mode&MODE_NOFRAME) && reg==EBP ) continue; @@ -133,7 +133,7 @@ int _getFreeX86reg(int mode) } for (int i=1; i= 0 && reg < 32, "Register index out of bounds." ); - pxAssertDev( x86reg != ESP && x86reg != EBP, "Allocation of ESP/EBP is not allowed!" ); + pxAssertDev( x86reg != esp.GetId() && x86reg != ebp.GetId(), "Allocation of ESP/EBP is not allowed!" ); // don't alloc EAX and ESP,EBP if MODE_NOFRAME int oldmode = mode; @@ -276,7 +276,7 @@ int _allocX86reg(int x86reg, int type, int reg, int mode) } for (i=1; i= maxreg ) { diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp index 7371b4c027..369f49bc47 100644 --- a/pcsx2/x86/ix86-32/iR5900-32.cpp +++ b/pcsx2/x86/ix86-32/iR5900-32.cpp @@ -974,10 +974,10 @@ void SetBranchReg( u32 reg ) recompileNextInstruction(1); - if( x86regs[ESI].inuse ) { - pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); + if( x86regs[esi.GetId()].inuse ) { + pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK ); xMOV(ptr[&cpuRegs.pc], esi); - x86regs[ESI].inuse = 0; + x86regs[esi.GetId()].inuse = 0; } else { xMOV(eax, ptr[&g_recWriteback]); diff --git a/pcsx2/x86/ix86-32/iR5900Jump.cpp b/pcsx2/x86/ix86-32/iR5900Jump.cpp index ec489e972d..12dccbf160 100644 --- a/pcsx2/x86/ix86-32/iR5900Jump.cpp +++ b/pcsx2/x86/ix86-32/iR5900Jump.cpp @@ -144,10 +144,10 @@ void recJALR() _clearNeededXMMregs(); recompileNextInstruction(1); - if( x86regs[ESI].inuse ) { - pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); + if( x86regs[esi.GetId()].inuse ) { + pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK ); xMOV(ptr[&cpuRegs.pc], esi); - x86regs[ESI].inuse = 0; + x86regs[esi.GetId()].inuse = 0; } else { xMOV(eax, ptr[&g_recWriteback]); diff --git a/pcsx2/x86/sVU_Lower.cpp b/pcsx2/x86/sVU_Lower.cpp index 98527aebf2..ea0c7367f5 100644 --- a/pcsx2/x86/sVU_Lower.cpp +++ b/pcsx2/x86/sVU_Lower.cpp @@ -683,7 +683,7 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info) //------------------------------------------------------------------ int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm) { - if( x86reg == EAX ) { + if( x86reg == eax.GetId() ) { if (imm) xADD(xRegister32(x86reg), imm); } else { @@ -713,7 +713,7 @@ int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm) xSHL(eax, 4); // multiply by 16 (shift left by 4) } - return EAX; + return eax.GetId(); } //------------------------------------------------------------------ diff --git a/pcsx2/x86/sVU_Upper.cpp b/pcsx2/x86/sVU_Upper.cpp index fedef0f0d2..41e6d5427b 100644 --- a/pcsx2/x86/sVU_Upper.cpp +++ b/pcsx2/x86/sVU_Upper.cpp @@ -339,10 +339,10 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info) xMOV(ptr[&tempECX], ecx); - int temp1 = ECX; //receives regd + int temp1 = ecx.GetId(); //receives regd int temp2 = ALLOCTEMPX86(0); - if (temp2 == ECX) + if (temp2 == ecx.GetId()) { temp2 = ALLOCTEMPX86(0); _freeX86reg(ecx); @@ -434,10 +434,10 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) xMOV(ptr[&tempECX], ecx); - int temp1 = ECX; //receives regd + int temp1 = ecx.GetId(); //receives regd int temp2 = ALLOCTEMPX86(0); - if (temp2 == ECX) + if (temp2 == ecx.GetId()) { temp2 = ALLOCTEMPX86(0); _freeX86reg(ecx); diff --git a/pcsx2/x86/sVU_zerorec.cpp b/pcsx2/x86/sVU_zerorec.cpp index c7e6b00ce3..c4b5e7c224 100644 --- a/pcsx2/x86/sVU_zerorec.cpp +++ b/pcsx2/x86/sVU_zerorec.cpp @@ -3058,9 +3058,9 @@ void VuBaseBlock::Recompile() if (s_JumpX86 == i && x86regs[s_JumpX86].inuse) { x86regs[s_JumpX86].inuse = 0; - x86regs[EAX].inuse = 1; + x86regs[eax.GetId()].inuse = 1; xMOV(eax, xRegister32(s_JumpX86)); - s_JumpX86 = EAX; + s_JumpX86 = eax.GetId(); } if (x86regs[i].inuse)