core: rely on register.GetId() instead of define

This commit is contained in:
Gregory Hainaut 2015-11-26 21:29:29 +01:00
parent 743e615224
commit 9eb73e1ef0
8 changed files with 24 additions and 24 deletions

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@ -984,10 +984,10 @@ void psxSetBranchReg(u32 reg)
psxRecompileNextInstruction(1); psxRecompileNextInstruction(1);
if( x86regs[ESI].inuse ) { if( x86regs[esi.GetId()].inuse ) {
pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
xMOV(ptr[&psxRegs.pc], esi); xMOV(ptr[&psxRegs.pc], esi);
x86regs[ESI].inuse = 0; x86regs[esi.GetId()].inuse = 0;
#ifdef PCSX2_DEBUG #ifdef PCSX2_DEBUG
xOR( esi, esi ); xOR( esi, esi );
#endif #endif

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@ -944,10 +944,10 @@ void rpsxJALR()
psxRecompileNextInstruction(1); psxRecompileNextInstruction(1);
if( x86regs[ESI].inuse ) { if( x86regs[esi.GetId()].inuse ) {
pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
xMOV(ptr[&psxRegs.pc], esi); xMOV(ptr[&psxRegs.pc], esi);
x86regs[ESI].inuse = 0; x86regs[esi.GetId()].inuse = 0;
#ifdef PCSX2_DEBUG #ifdef PCSX2_DEBUG
xOR( esi, esi ); xOR( esi, esi );
#endif #endif

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@ -122,7 +122,7 @@ int _getFreeX86reg(int mode)
for (uint i=0; i<iREGCNT_GPR; i++) { for (uint i=0; i<iREGCNT_GPR; i++) {
int reg = (g_x86checknext+i)%iREGCNT_GPR; int reg = (g_x86checknext+i)%iREGCNT_GPR;
if( reg == 0 || reg == ESP || reg == EBP ) continue; if( reg == 0 || reg == esp.GetId() || reg == ebp.GetId() ) continue;
if( reg >= maxreg ) continue; if( reg >= maxreg ) continue;
//if( (mode&MODE_NOFRAME) && reg==EBP ) continue; //if( (mode&MODE_NOFRAME) && reg==EBP ) continue;
@ -133,7 +133,7 @@ int _getFreeX86reg(int mode)
} }
for (int i=1; i<maxreg; i++) { for (int i=1; i<maxreg; i++) {
if( i == ESP || i==EBP ) continue; if( i == esp.GetId() || i==ebp.GetId()) continue;
//if( (mode&MODE_NOFRAME) && i==EBP ) continue; //if( (mode&MODE_NOFRAME) && i==EBP ) continue;
if (x86regs[i].needed) continue; if (x86regs[i].needed) continue;
@ -247,7 +247,7 @@ int _allocX86reg(int x86reg, int type, int reg, int mode)
{ {
uint i; uint i;
pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." ); pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." );
pxAssertDev( x86reg != ESP && x86reg != EBP, "Allocation of ESP/EBP is not allowed!" ); pxAssertDev( x86reg != esp.GetId() && x86reg != ebp.GetId(), "Allocation of ESP/EBP is not allowed!" );
// don't alloc EAX and ESP,EBP if MODE_NOFRAME // don't alloc EAX and ESP,EBP if MODE_NOFRAME
int oldmode = mode; int oldmode = mode;
@ -276,7 +276,7 @@ int _allocX86reg(int x86reg, int type, int reg, int mode)
} }
for (i=1; i<maxreg; i++) { for (i=1; i<maxreg; i++) {
if ( i == ESP || i == EBP ) continue; if ( i == esp.GetId() || i == ebp.GetId() ) continue;
if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg) continue; if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg) continue;
if( i >= maxreg ) { if( i >= maxreg ) {

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@ -974,10 +974,10 @@ void SetBranchReg( u32 reg )
recompileNextInstruction(1); recompileNextInstruction(1);
if( x86regs[ESI].inuse ) { if( x86regs[esi.GetId()].inuse ) {
pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
xMOV(ptr[&cpuRegs.pc], esi); xMOV(ptr[&cpuRegs.pc], esi);
x86regs[ESI].inuse = 0; x86regs[esi.GetId()].inuse = 0;
} }
else { else {
xMOV(eax, ptr[&g_recWriteback]); xMOV(eax, ptr[&g_recWriteback]);

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@ -144,10 +144,10 @@ void recJALR()
_clearNeededXMMregs(); _clearNeededXMMregs();
recompileNextInstruction(1); recompileNextInstruction(1);
if( x86regs[ESI].inuse ) { if( x86regs[esi.GetId()].inuse ) {
pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); pxAssert( x86regs[esi.GetId()].type == X86TYPE_PCWRITEBACK );
xMOV(ptr[&cpuRegs.pc], esi); xMOV(ptr[&cpuRegs.pc], esi);
x86regs[ESI].inuse = 0; x86regs[esi.GetId()].inuse = 0;
} }
else { else {
xMOV(eax, ptr[&g_recWriteback]); xMOV(eax, ptr[&g_recWriteback]);

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@ -683,7 +683,7 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info)
//------------------------------------------------------------------ //------------------------------------------------------------------
int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm) int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
{ {
if( x86reg == EAX ) { if( x86reg == eax.GetId() ) {
if (imm) xADD(xRegister32(x86reg), imm); if (imm) xADD(xRegister32(x86reg), imm);
} }
else { else {
@ -713,7 +713,7 @@ int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
xSHL(eax, 4); // multiply by 16 (shift left by 4) xSHL(eax, 4); // multiply by 16 (shift left by 4)
} }
return EAX; return eax.GetId();
} }
//------------------------------------------------------------------ //------------------------------------------------------------------

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@ -339,10 +339,10 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info)
xMOV(ptr[&tempECX], ecx); xMOV(ptr[&tempECX], ecx);
int temp1 = ECX; //receives regd int temp1 = ecx.GetId(); //receives regd
int temp2 = ALLOCTEMPX86(0); int temp2 = ALLOCTEMPX86(0);
if (temp2 == ECX) if (temp2 == ecx.GetId())
{ {
temp2 = ALLOCTEMPX86(0); temp2 = ALLOCTEMPX86(0);
_freeX86reg(ecx); _freeX86reg(ecx);
@ -434,10 +434,10 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info)
xMOV(ptr[&tempECX], ecx); xMOV(ptr[&tempECX], ecx);
int temp1 = ECX; //receives regd int temp1 = ecx.GetId(); //receives regd
int temp2 = ALLOCTEMPX86(0); int temp2 = ALLOCTEMPX86(0);
if (temp2 == ECX) if (temp2 == ecx.GetId())
{ {
temp2 = ALLOCTEMPX86(0); temp2 = ALLOCTEMPX86(0);
_freeX86reg(ecx); _freeX86reg(ecx);

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@ -3058,9 +3058,9 @@ void VuBaseBlock::Recompile()
if (s_JumpX86 == i && x86regs[s_JumpX86].inuse) if (s_JumpX86 == i && x86regs[s_JumpX86].inuse)
{ {
x86regs[s_JumpX86].inuse = 0; x86regs[s_JumpX86].inuse = 0;
x86regs[EAX].inuse = 1; x86regs[eax.GetId()].inuse = 1;
xMOV(eax, xRegister32(s_JumpX86)); xMOV(eax, xRegister32(s_JumpX86));
s_JumpX86 = EAX; s_JumpX86 = eax.GetId();
} }
if (x86regs[i].inuse) if (x86regs[i].inuse)