mirror of https://github.com/PCSX2/pcsx2.git
Removed some unneeded code from our vu memory handlers (was an attempted optimization from long ago, but VU memory isn't accessed directly from the EE enough for it to matter).
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3585 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine
parent
fa14e157c6
commit
9d57fee7d4
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@ -963,7 +963,6 @@ u8 __fastcall getBits128(u8 *address, u32 advance)
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if (uint shift = (g_BP.BP & 7))
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{
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shift = g_BP.BP & 7;
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mask2 = 0xff >> shift;
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mask.lo = mask2 | (mask2 << 8) | (mask2 << 16) | (mask2 << 24) | (mask2 << 32) | (mask2 << 40) | (mask2 << 48) | (mask2 << 56);
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mask.hi = mask2 | (mask2 << 8) | (mask2 << 16) | (mask2 << 24) | (mask2 << 32) | (mask2 << 40) | (mask2 << 48) | (mask2 << 56);
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@ -1063,7 +1062,6 @@ __forceinline u8 __fastcall getBits16(u8 *address, u32 advance)
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if (uint shift = (g_BP.BP & 7))
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{
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shift = g_BP.BP & 7;
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mask = (0xff >> shift);
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mask = mask | (mask << 8);
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@ -1081,7 +1079,7 @@ __forceinline u8 __fastcall getBits16(u8 *address, u32 advance)
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u8 __fastcall getBits8(u8 *address, u32 advance)
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{
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register u32 mask, shift = 0;
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u32 mask;
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u8* readpos;
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// Check if the current BP has exceeded or reached the limit of 128
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@ -1090,11 +1088,9 @@ u8 __fastcall getBits8(u8 *address, u32 advance)
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readpos = readbits + (int)g_BP.BP / 8;
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if (g_BP.BP & 7)
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if (uint shift = (g_BP.BP & 7))
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{
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shift = g_BP.BP & 7;
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mask = (0xff >> shift);
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*(u8*)address = (((~mask) & readpos[1]) >> (8 - shift)) | (((mask) & *readpos) << shift);
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}
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else
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150
pcsx2/Memory.cpp
150
pcsx2/Memory.cpp
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@ -105,41 +105,49 @@ void MyMemCheck(u32 mem)
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/////////////////////////////
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// REGULAR MEM START
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/////////////////////////////
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vtlbHandler null_handler;
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static vtlbHandler
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null_handler,
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vtlbHandler tlb_fallback_0;
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vtlbHandler tlb_fallback_1;
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vtlbHandler tlb_fallback_2;
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vtlbHandler tlb_fallback_3;
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vtlbHandler tlb_fallback_4;
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vtlbHandler tlb_fallback_5;
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vtlbHandler tlb_fallback_6;
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vtlbHandler tlb_fallback_7;
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vtlbHandler tlb_fallback_8;
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tlb_fallback_0,
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tlb_fallback_1,
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tlb_fallback_2,
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tlb_fallback_3,
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tlb_fallback_4,
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tlb_fallback_5,
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tlb_fallback_6,
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tlb_fallback_7,
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tlb_fallback_8,
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vtlbHandler vu0_micro_mem[2]; // 0 - dynarec, 1 - interpreter
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vtlbHandler vu1_micro_mem[2]; // 0 - dynarec, 1 - interpreter
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vu0_micro_mem,
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vu1_micro_mem,
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vtlbHandler hw_by_page[0x10] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };
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vtlbHandler gs_page_0;
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vtlbHandler gs_page_1;
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hw_by_page[0x10] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
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vtlbHandler iopHw_by_page_01;
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vtlbHandler iopHw_by_page_03;
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vtlbHandler iopHw_by_page_08;
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gs_page_0,
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gs_page_1,
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iopHw_by_page_01,
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iopHw_by_page_03,
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iopHw_by_page_08;
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// Used to remap the VUmicro memory according to the VU0/VU1 dynarec setting.
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// (the VU memory operations are different for recs vs. interpreters)
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void memMapVUmicro()
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{
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vtlb_MapHandler(vu0_micro_mem[CpuVU0->IsInterpreter],0x11000000,0x00004000);
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vtlb_MapHandler(vu1_micro_mem[CpuVU1->IsInterpreter],0x11008000,0x00004000);
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// VU0/VU1 memory
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// VU0/VU1 micro mem (instructions)
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// (Like IOP memory, these are generally only used by the EE Bios kernel during
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// boot-up. Applications/games are "supposed" to use the thread-safe VIF
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// instead.)
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// boot-up. Applications/games are "supposed" to use the thread-safe VIF instead;
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// or must ensure all VIF/GIF transfers are finished and all VUmicro execution stopped
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// prior to accessing VU memory directly).
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// The VU0 mapping actually repeats 4 times across the mapped range, but we don't bother
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// to manually mirror it here because the indirect memory handler for it (see vuMicroRead*
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// functions below) automatically mask and wrap the address for us.
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vtlb_MapHandler(vu0_micro_mem,0x11000000,0x00004000);
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vtlb_MapHandler(vu1_micro_mem,0x11008000,0x00004000);
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// VU0/VU1 memory (data)
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// VU0 is 4k, mirrored 4 times across a 16k area.
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vtlb_MapBlock(VU0.Mem,0x11004000,0x00004000,0x1000);
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vtlb_MapBlock(VU1.Mem,0x1100c000,0x00004000);
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}
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@ -261,7 +269,7 @@ static void __fastcall nullWrite128(u32 mem, const mem128_t *value)
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}
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template<int p>
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mem8_t __fastcall _ext_memRead8 (u32 mem)
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static mem8_t __fastcall _ext_memRead8 (u32 mem)
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{
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switch (p)
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{
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@ -285,7 +293,7 @@ mem8_t __fastcall _ext_memRead8 (u32 mem)
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}
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template<int p>
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mem16_t __fastcall _ext_memRead16(u32 mem)
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static mem16_t __fastcall _ext_memRead16(u32 mem)
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{
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switch (p)
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{
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@ -315,7 +323,7 @@ mem16_t __fastcall _ext_memRead16(u32 mem)
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}
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template<int p>
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mem32_t __fastcall _ext_memRead32(u32 mem)
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static mem32_t __fastcall _ext_memRead32(u32 mem)
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{
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switch (p)
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{
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@ -335,7 +343,7 @@ mem32_t __fastcall _ext_memRead32(u32 mem)
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}
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template<int p>
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void __fastcall _ext_memRead64(u32 mem, mem64_t *out)
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static void __fastcall _ext_memRead64(u32 mem, mem64_t *out)
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{
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switch (p)
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{
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@ -348,7 +356,7 @@ void __fastcall _ext_memRead64(u32 mem, mem64_t *out)
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}
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template<int p>
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void __fastcall _ext_memRead128(u32 mem, mem128_t *out)
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static void __fastcall _ext_memRead128(u32 mem, mem128_t *out)
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{
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switch (p)
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{
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@ -364,7 +372,7 @@ void __fastcall _ext_memRead128(u32 mem, mem128_t *out)
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}
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template<int p>
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void __fastcall _ext_memWrite8 (u32 mem, mem8_t value)
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static void __fastcall _ext_memWrite8 (u32 mem, mem8_t value)
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{
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switch (p) {
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case 1: // hwm
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@ -383,8 +391,9 @@ void __fastcall _ext_memWrite8 (u32 mem, mem8_t value)
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MEM_LOG("Unknown Memory write8 to address %x with data %2.2x", mem, value);
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cpuTlbMissW(mem, cpuRegs.branch);
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}
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template<int p>
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void __fastcall _ext_memWrite16(u32 mem, mem16_t value)
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static void __fastcall _ext_memWrite16(u32 mem, mem16_t value)
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{
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switch (p) {
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case 1: // hwm
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@ -407,7 +416,7 @@ void __fastcall _ext_memWrite16(u32 mem, mem16_t value)
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}
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template<int p>
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void __fastcall _ext_memWrite32(u32 mem, mem32_t value)
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static void __fastcall _ext_memWrite32(u32 mem, mem32_t value)
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{
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switch (p) {
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case 6: // gsm
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@ -422,7 +431,7 @@ void __fastcall _ext_memWrite32(u32 mem, mem32_t value)
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}
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template<int p>
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void __fastcall _ext_memWrite64(u32 mem, const mem64_t* value)
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static void __fastcall _ext_memWrite64(u32 mem, const mem64_t* value)
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{
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/*switch (p) {
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@ -438,7 +447,7 @@ void __fastcall _ext_memWrite64(u32 mem, const mem64_t* value)
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}
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template<int p>
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void __fastcall _ext_memWrite128(u32 mem, const mem128_t *value)
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static void __fastcall _ext_memWrite128(u32 mem, const mem128_t *value)
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{
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/*switch (p) {
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//case 1: // hwm
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@ -457,32 +466,19 @@ void __fastcall _ext_memWrite128(u32 mem, const mem128_t *value)
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#define vtlb_RegisterHandlerTempl1(nam,t) vtlb_RegisterHandler(nam##Read8<t>,nam##Read16<t>,nam##Read32<t>,nam##Read64<t>,nam##Read128<t>, \
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nam##Write8<t>,nam##Write16<t>,nam##Write32<t>,nam##Write64<t>,nam##Write128<t>)
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#define vtlb_RegisterHandlerTempl2(nam,t,rec) vtlb_RegisterHandler(nam##Read8<t>,nam##Read16<t>,nam##Read32<t>,nam##Read64<t>,nam##Read128<t>, \
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nam##Write8<t,rec>,nam##Write16<t,rec>,nam##Write32<t,rec>,nam##Write64<t,rec>,nam##Write128<t,rec>)
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typedef void __fastcall ClearFunc_t( u32 addr, u32 qwc );
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template<int vunum, bool dynarec>
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template<int vunum>
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static __forceinline void ClearVuFunc( u32 addr, u32 size )
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{
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if( dynarec )
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{
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if( vunum==0 )
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CpuVU0->Clear(addr,size);
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else
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CpuVU1->Clear(addr,size);
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}
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if( vunum==0 )
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CpuVU0->Clear(addr,size);
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else
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{
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if( vunum==0 )
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CpuVU0->Clear(addr,size);
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else
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CpuVU1->Clear(addr,size);
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}
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CpuVU1->Clear(addr,size);
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}
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template<int vunum>
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mem8_t __fastcall vuMicroRead8(u32 addr)
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static mem8_t __fastcall vuMicroRead8(u32 addr)
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{
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addr&=(vunum==0)?0xfff:0x3fff;
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VURegs* vu=(vunum==0)?&VU0:&VU1;
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@ -491,7 +487,7 @@ mem8_t __fastcall vuMicroRead8(u32 addr)
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}
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template<int vunum>
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mem16_t __fastcall vuMicroRead16(u32 addr)
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static mem16_t __fastcall vuMicroRead16(u32 addr)
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{
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addr&=(vunum==0)?0xfff:0x3fff;
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VURegs* vu=(vunum==0)?&VU0:&VU1;
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@ -500,7 +496,7 @@ mem16_t __fastcall vuMicroRead16(u32 addr)
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}
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template<int vunum>
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mem32_t __fastcall vuMicroRead32(u32 addr)
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static mem32_t __fastcall vuMicroRead32(u32 addr)
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{
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addr&=(vunum==0)?0xfff:0x3fff;
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VURegs* vu=(vunum==0)?&VU0:&VU1;
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@ -509,7 +505,7 @@ mem32_t __fastcall vuMicroRead32(u32 addr)
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}
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template<int vunum>
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void __fastcall vuMicroRead64(u32 addr,mem64_t* data)
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static void __fastcall vuMicroRead64(u32 addr,mem64_t* data)
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{
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addr&=(vunum==0)?0xfff:0x3fff;
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VURegs* vu=(vunum==0)?&VU0:&VU1;
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@ -518,7 +514,7 @@ void __fastcall vuMicroRead64(u32 addr,mem64_t* data)
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}
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template<int vunum>
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void __fastcall vuMicroRead128(u32 addr,mem128_t* data)
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static void __fastcall vuMicroRead128(u32 addr,mem128_t* data)
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{
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addr&=(vunum==0)?0xfff:0x3fff;
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VURegs* vu=(vunum==0)?&VU0:&VU1;
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@ -530,67 +526,67 @@ void __fastcall vuMicroRead128(u32 addr,mem128_t* data)
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// Profiled VU writes: Happen very infrequently, with exception of BIOS initialization (at most twice per
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// frame in-game, and usually none at all after BIOS), so cpu clears aren't much of a big deal.
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template<int vunum, bool dynrec>
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void __fastcall vuMicroWrite8(u32 addr,mem8_t data)
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template<int vunum>
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static void __fastcall vuMicroWrite8(u32 addr,mem8_t data)
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{
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addr &= (vunum==0) ? 0xfff : 0x3fff;
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VURegs& vu = (vunum==0) ? VU0 : VU1;
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if (vu.Micro[addr]!=data)
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{
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ClearVuFunc<vunum, dynrec>(addr&(~7), 8); // Clear before writing new data (clearing 8 bytes because an instruction is 8 bytes) (cottonvibes)
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ClearVuFunc<vunum>(addr&(~7), 8); // Clear before writing new data (clearing 8 bytes because an instruction is 8 bytes) (cottonvibes)
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vu.Micro[addr]=data;
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}
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}
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template<int vunum, bool dynrec>
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void __fastcall vuMicroWrite16(u32 addr,mem16_t data)
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template<int vunum>
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static void __fastcall vuMicroWrite16(u32 addr,mem16_t data)
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{
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addr &= (vunum==0) ? 0xfff : 0x3fff;
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VURegs& vu = (vunum==0) ? VU0 : VU1;
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if (*(u16*)&vu.Micro[addr]!=data)
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{
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ClearVuFunc<vunum, dynrec>(addr&(~7), 8);
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ClearVuFunc<vunum>(addr&(~7), 8);
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*(u16*)&vu.Micro[addr]=data;
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}
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}
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template<int vunum, bool dynrec>
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void __fastcall vuMicroWrite32(u32 addr,mem32_t data)
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template<int vunum>
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static void __fastcall vuMicroWrite32(u32 addr,mem32_t data)
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{
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addr &= (vunum==0) ? 0xfff : 0x3fff;
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VURegs& vu = (vunum==0) ? VU0 : VU1;
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if (*(u32*)&vu.Micro[addr]!=data)
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{
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ClearVuFunc<vunum, dynrec>(addr&(~7), 8);
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ClearVuFunc<vunum>(addr&(~7), 8);
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*(u32*)&vu.Micro[addr]=data;
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}
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}
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template<int vunum, bool dynrec>
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void __fastcall vuMicroWrite64(u32 addr,const mem64_t* data)
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template<int vunum>
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static void __fastcall vuMicroWrite64(u32 addr,const mem64_t* data)
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{
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addr &= (vunum==0) ? 0xfff : 0x3fff;
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VURegs& vu = (vunum==0) ? VU0 : VU1;
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if (*(u64*)&vu.Micro[addr]!=data[0])
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{
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ClearVuFunc<vunum, dynrec>(addr&(~7), 8);
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ClearVuFunc<vunum>(addr&(~7), 8);
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*(u64*)&vu.Micro[addr]=data[0];
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}
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}
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template<int vunum, bool dynrec>
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void __fastcall vuMicroWrite128(u32 addr,const mem128_t* data)
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template<int vunum>
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static void __fastcall vuMicroWrite128(u32 addr,const mem128_t* data)
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{
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addr &= (vunum==0) ? 0xfff : 0x3fff;
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VURegs& vu = (vunum==0) ? VU0 : VU1;
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if (*(u64*)&vu.Micro[addr]!=data[0] || *(u64*)&vu.Micro[addr+8]!=data[1])
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{
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ClearVuFunc<vunum, dynrec>(addr&(~7), 16);
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ClearVuFunc<vunum>(addr&(~7), 16);
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*(u64*)&vu.Micro[addr]=data[0];
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*(u64*)&vu.Micro[addr+8]=data[1];
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}
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@ -706,12 +702,8 @@ void memReset()
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tlb_fallback_8 = vtlb_RegisterHandlerTempl1(_ext_mem,8);
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// Dynarec versions of VUs
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vu0_micro_mem[0] = vtlb_RegisterHandlerTempl2(vuMicro,0,true);
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vu1_micro_mem[0] = vtlb_RegisterHandlerTempl2(vuMicro,1,true);
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// Interpreter versions of VUs
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vu0_micro_mem[1] = vtlb_RegisterHandlerTempl2(vuMicro,0,false);
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vu1_micro_mem[1] = vtlb_RegisterHandlerTempl2(vuMicro,1,false);
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vu0_micro_mem = vtlb_RegisterHandlerTempl1(vuMicro,0);
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vu1_micro_mem = vtlb_RegisterHandlerTempl1(vuMicro,1);
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//////////////////////////////////////////////////////////////////////////////////////////
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// IOP's "secret" Hardware Register mapping, accessible from the EE (and meant for use
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