mirror of https://github.com/PCSX2/pcsx2.git
VUInt: Fix macro flags and implement EFU ops correctly.
Also now using the microVU style Tri-Ace hack as the interpreters seem to now need it
This commit is contained in:
refractionpcsx2
parent
1f50dd7496
commit
857ab07f1c
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@ -477,7 +477,7 @@ static __fi float vuADD_TriAceHack(u32 a, u32 b) {
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// On VU0 TriAce Games use ADDi and expects these bit-perfect results:
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//if (a == 0xb3e2a619 && b == 0x42546666) return vuDouble(0x42546666);
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//if (a == 0x8b5b19e9 && b == 0xc7f079b3) return vuDouble(0xc7f079b3);
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if (a == 0x4b1ed4a8 && b == 0x43a02666) return vuDouble(0x4b1ed5e7);
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//if (a == 0x4b1ed4a8 && b == 0x43a02666) return vuDouble(0x4b1ed5e7);
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//if (a == 0x7d1ca47b && b == 0x42f23333) return vuDouble(0x7d1ca47b);
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// In the 3rd case, some other rounding error is giving us incorrect
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@ -487,21 +487,20 @@ static __fi float vuADD_TriAceHack(u32 a, u32 b) {
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// microVU gets the correct operands and result. The interps likely
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// don't get it due to rounding towards nearest in other calculations.
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if (0) {
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// microVU uses something like this to get TriAce games working,
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// but VU interpreters don't seem to need it currently:
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// Update Sept 2021, now the interpreters don't suck, they do - Refraction
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s32 aExp = (a >> 23) & 0xff;
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s32 bExp = (b >> 23) & 0xff;
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if (aExp - bExp >= 25) b &= 0x80000000;
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if (aExp - bExp <=-25) a &= 0x80000000;
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float ret = vuDouble(a) + vuDouble(b);
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DevCon.WriteLn("aExp = %d, bExp = %d", aExp, bExp);
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DevCon.WriteLn("0x%08x + 0x%08x = 0x%08x", a, b, (u32&)ret);
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DevCon.WriteLn("%f + %f = %f", vuDouble(a), vuDouble(b), ret);
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//DevCon.WriteLn("aExp = %d, bExp = %d", aExp, bExp);
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//DevCon.WriteLn("0x%08x + 0x%08x = 0x%08x", a, b, (u32&)ret);
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//DevCon.WriteLn("%f + %f = %f", vuDouble(a), vuDouble(b), ret);
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return ret;
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}
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return vuDouble(a) + vuDouble(b);
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}
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void _vuABS(VURegs * VU) {
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if (_Ft_ == 0) return;
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@ -2231,20 +2230,40 @@ static __ri void _vuERLENG(VURegs * VU) {
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VU->p.F = p;
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}
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static __ri float _vuCalculateEATAN(float inputvalue) {
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float eatanconst[9] = { 0.999999344348907f, -0.333298563957214f, 0.199465364217758f, -0.13085337519646f,
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0.096420042216778f, -0.055909886956215f, 0.021861229091883f, -0.004054057877511f,
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0.785398185253143f };
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float result = (eatanconst[0] * inputvalue) + (eatanconst[1] * pow(inputvalue, 3)) + (eatanconst[2] * pow(inputvalue, 5))
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+ (eatanconst[3] * pow(inputvalue, 7)) + (eatanconst[4] * pow(inputvalue, 9)) + (eatanconst[5] * pow(inputvalue, 11))
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+ (eatanconst[6] * pow(inputvalue, 13)) + (eatanconst[7] * pow(inputvalue, 15));
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result += eatanconst[8];
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result = vuDouble(*(u32*)&result);
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return result;
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}
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static __ri void _vuEATAN(VURegs* VU) {
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float p = _vuCalculateEATAN(vuDouble(VU->VF[_Fs_].UL[_Fsf_]));
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VU->p.F = p;
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}
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static __ri void _vuEATANxy(VURegs * VU) {
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DevCon.Warning("EATANxy");
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float p = 0;
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if(vuDouble(VU->VF[_Fs_].i.x) != 0) {
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p = atan2(vuDouble(VU->VF[_Fs_].i.y), vuDouble(VU->VF[_Fs_].i.x));
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p = _vuCalculateEATAN(vuDouble(VU->VF[_Fs_].i.y) / vuDouble(VU->VF[_Fs_].i.x));
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}
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VU->p.F = p;
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}
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static __ri void _vuEATANxz(VURegs * VU) {
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DevCon.Warning("EATANxz");
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float p = 0;
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if(vuDouble(VU->VF[_Fs_].i.x) != 0) {
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p = atan2(vuDouble(VU->VF[_Fs_].i.z), vuDouble(VU->VF[_Fs_].i.x));
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p = _vuCalculateEATAN(vuDouble(VU->VF[_Fs_].i.z) / vuDouble(VU->VF[_Fs_].i.x));
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}
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VU->p.F = p;
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}
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@ -2282,19 +2301,23 @@ static __ri void _vuERSQRT(VURegs * VU) {
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}
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static __ri void _vuESIN(VURegs * VU) {
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DevCon.Warning("ESIN");
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float p = sin(vuDouble(VU->VF[_Fs_].UL[_Fsf_]));
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VU->p.F = p;
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}
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float sinconsts[5] = { 1.0f, -0.166666567325592f, 0.008333025500178f, -0.000198074136279f, 0.000002601886990f };
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float p = vuDouble(VU->VF[_Fs_].UL[_Fsf_]);
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static __ri void _vuEATAN(VURegs * VU) {
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DevCon.Warning("EATAN");
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float p = atan(vuDouble(VU->VF[_Fs_].UL[_Fsf_]));
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VU->p.F = p;
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p = (sinconsts[0] * p) + (sinconsts[1] * pow(p, 3)) + (sinconsts[2] * pow(p, 5)) + (sinconsts[3] * pow(p, 7)) + (sinconsts[4] * pow(p, 9));
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VU->p.F = vuDouble(*(u32*)&p);
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}
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static __ri void _vuEEXP(VURegs * VU) {
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float p = exp(-(vuDouble(VU->VF[_Fs_].UL[_Fsf_])));
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float consts[6] = { 0.249998688697815f, 0.031257584691048f, 0.002591371303424f,
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0.000171562001924f, 0.000005430199963f, 0.000000690600018f };
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float p = vuDouble(VU->VF[_Fs_].UL[_Fsf_]);
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p = 1.0f + (consts[0] * p) + (consts[1] * pow(p, 2)) + (consts[2] * pow(p, 3)) + (consts[3] * pow(p, 4)) + (consts[4] * pow(p, 5)) + (consts[5] * pow(p, 6));
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p = pow(p, 4);
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p = vuDouble(*(u32*)&p);
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p = 1 / p;
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VU->p.F = p;
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}
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@ -4266,14 +4289,24 @@ _vuRegsTables(VU1, VU1regs, Fnptr_VuRegsN)
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static __fi void SYNCMSFLAGS()
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{
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VU0.VI[REG_STATUS_FLAG].UL = VU0.statusflag;
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VU0.VI[REG_STATUS_FLAG].UL = (VU0.VI[REG_STATUS_FLAG].UL & 0xC30) | (VU0.statusflag & 0xF) | ((VU0.statusflag & 0xF) << 6);
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VU0.VI[REG_MAC_FLAG].UL = VU0.macflag;
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}
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static __fi void SYNCCLIPFLAG()
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{
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VU0.VI[REG_CLIP_FLAG].UL = VU0.clipflag;
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}
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static __fi void SYNCSTATUSFLAG()
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{
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VU0.VI[REG_STATUS_FLAG].UL = (VU0.VI[REG_STATUS_FLAG].UL & 0x3F) | (VU0.statusflag & 0xFC0);
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}
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static __fi void SYNCFDIV()
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{
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VU0.VI[REG_Q].UL = VU0.q.UL;
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VU0.VI[REG_STATUS_FLAG].UL = VU0.statusflag;
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VU0.VI[REG_STATUS_FLAG].UL = (VU0.VI[REG_STATUS_FLAG].UL & 0x3CF) | (VU0.statusflag & 0x30) | ((VU0.statusflag & 0x30) << 6);
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}
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void VABS() { VU0.code = cpuRegs.code; _vuABS(&VU0); }
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@ -4370,7 +4403,7 @@ void VITOF0() { VU0.code = cpuRegs.code; _vuITOF0(&VU0); }
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void VITOF4() { VU0.code = cpuRegs.code; _vuITOF4(&VU0); }
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void VITOF12() { VU0.code = cpuRegs.code; _vuITOF12(&VU0); }
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void VITOF15() { VU0.code = cpuRegs.code; _vuITOF15(&VU0); }
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void VCLIPw() { VU0.code = cpuRegs.code; _vuCLIP(&VU0); VU0.VI[REG_CLIP_FLAG].UL = VU0.clipflag; }
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void VCLIPw() { VU0.code = cpuRegs.code; _vuCLIP(&VU0); SYNCCLIPFLAG(); }
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void VDIV() { VU0.code = cpuRegs.code; _vuDIV(&VU0); SYNCFDIV(); }
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void VSQRT() { VU0.code = cpuRegs.code; _vuSQRT(&VU0); SYNCFDIV(); }
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@ -4404,14 +4437,14 @@ void VWAITQ() { VU0.code = cpuRegs.code; _vuWAITQ(&VU0); }
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void VFSAND() { VU0.code = cpuRegs.code; _vuFSAND(&VU0); }
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void VFSEQ() { VU0.code = cpuRegs.code; _vuFSEQ(&VU0); }
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void VFSOR() { VU0.code = cpuRegs.code; _vuFSOR(&VU0); }
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void VFSSET() { VU0.code = cpuRegs.code; _vuFSSET(&VU0); }
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void VFSSET() { VU0.code = cpuRegs.code; _vuFSSET(&VU0); SYNCSTATUSFLAG(); }
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void VFMAND() { VU0.code = cpuRegs.code; _vuFMAND(&VU0); }
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void VFMEQ() { VU0.code = cpuRegs.code; _vuFMEQ(&VU0); }
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void VFMOR() { VU0.code = cpuRegs.code; _vuFMOR(&VU0); }
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void VFCAND() { VU0.code = cpuRegs.code; _vuFCAND(&VU0); }
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void VFCEQ() { VU0.code = cpuRegs.code; _vuFCEQ(&VU0); }
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void VFCOR() { VU0.code = cpuRegs.code; _vuFCOR(&VU0); }
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void VFCSET() { VU0.code = cpuRegs.code; _vuFCSET(&VU0); }
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void VFCSET() { VU0.code = cpuRegs.code; _vuFCSET(&VU0); SYNCCLIPFLAG(); }
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void VFCGET() { VU0.code = cpuRegs.code; _vuFCGET(&VU0); }
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void VXITOP() { VU0.code = cpuRegs.code; _vuXITOP(&VU0); }
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