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Set a few of the IRQ handlers to __forceinline since they're only called from one place (cpuBranchTest, psxBranchTest). Changed all uses of _inline to __forceinline as well, since _inline is a useless keyword [all modern compilers by default assume _inline status on everything]. 

Also a few code cleanups and fixme's marking unused/unreferenced functions.

git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@340 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
Jake.Stine 2008-11-19 02:26:05 +00:00 committed by Gregory Hainaut
parent e0a35a3aa6
commit 83f0c75dfb
15 changed files with 69 additions and 66 deletions
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3
pcsx2/CDVD.c
View File

@ -884,7 +884,8 @@ int cdvdReadSector() {
return 0;
}
void cdvdReadInterrupt() {
// inlined due to being referenced in only one place.
__forceinline void cdvdReadInterrupt() {
//SysPrintf("cdvdReadInterrupt %x %x %x %x %x\n", cpuRegs.interrupt, cdvd.Readed, cdvd.Reading, cdvd.nSectors, (HW_DMA3_BCR_H16 * HW_DMA3_BCR_L16) *4);
cdvd.Ready = 0x00;

2
pcsx2/CDVD.h
View File

@ -92,7 +92,7 @@ void cdvdReadTimeRcnt(int mode);
void cdvdVsync();
int cdvdInterrupt();
int cdvdFreeze(gzFile f, int Mode);
void cdvdReadInterrupt();
extern void cdvdReadInterrupt();
void cdvdNewDiskCB();
u8 cdvdRead04(void);
u8 cdvdRead05(void);

10
pcsx2/CdRom.c
View File

@ -91,34 +91,34 @@ unsigned long cdReadTime;// = ((PSXCLK / 75) / BIAS);
#define CDR_INT(eCycle) PSX_INT(17, eCycle)
#define CDREAD_INT(eCycle) PSX_INT(18, eCycle)
static __inline void StartReading(unsigned long type) {
static __forceinline void StartReading(unsigned long type) {
cdr.Reading = type;
cdr.FirstSector = 1;
cdr.Readed = 0xff;
AddIrqQueue(READ_ACK, 0x800);
}
static __inline void StopReading() {
static __forceinline void StopReading() {
if (cdr.Reading) {
cdr.Reading = 0;
psxRegs.interrupt&=~0x40000;
}
}
static __inline void StopCdda() {
static __forceinline void StopCdda() {
if (cdr.Play) {
cdr.StatP&=~0x80;
cdr.Play = 0;
}
}
__inline void SetResultSize(u8 size) {
__forceinline void SetResultSize(u8 size) {
cdr.ResultP = 0;
cdr.ResultC = size;
cdr.ResultReady = 1;
}
s32 MSFtoLSN(u8 *Time) {
__forceinline s32 MSFtoLSN(u8 *Time) {
u32 lsn;
lsn = Time[2];

6
pcsx2/GS.cpp
View File

@ -887,7 +887,7 @@ u32 GSgifTransferDummy(int path, u32 *pMem, u32 size)
static int gspath3done=0;
int gscycles = 0;
void gsInterrupt() {
__forceinline void gsInterrupt() {
GIF_LOG("gsInterrupt: %8.8x\n", cpuRegs.cycle);
if((gif->chcr & 0x100) == 0){
@ -1361,11 +1361,13 @@ void gifMFIFOInterrupt()
mfifoGIFtransfer(0);
return;
}
#ifndef PCSX2_PUBLIC
if(gifdone == 0 || gif->qwc > 0) {
SysPrintf("Shouldnt go here\n");
SysPrintf("gifMFIFO Panic > Shouldnt go here!\n");
cpuRegs.interrupt &= ~(1 << 11);
return;
}
#endif
//if(gifqwc > 0)SysPrintf("GIF MFIFO ending with stuff in it %x\n", gifqwc);
gifqwc = 0;
gifdone = 0;

2
pcsx2/GS.h
View File

@ -157,7 +157,7 @@ void gsConstRead64(u32 mem, int mmreg);
void gsConstRead128(u32 mem, int xmmreg);
void gsIrq();
void gsInterrupt();
extern void gsInterrupt();
void dmaGIF();
void GIFdma();
void mfifoGIFtransfer(int qwc);

4
pcsx2/IPU/IPU.c
View File

@ -1922,7 +1922,7 @@ void dmaIPU1() // toIPU
extern void GIFdma();
void ipu0Interrupt() {
__forceinline void ipu0Interrupt() {
IPU_LOG("ipu0Interrupt: %x\n", cpuRegs.cycle);
if( g_nDMATransfer & IPU_DMA_FIREINT0 ) {
@ -1953,7 +1953,7 @@ void ipu0Interrupt() {
cpuRegs.interrupt &= ~(1 << 3);
}
void ipu1Interrupt() {
__forceinline void ipu1Interrupt() {
IPU_LOG("ipu1Interrupt %x:\n", cpuRegs.cycle);
if( g_nDMATransfer & IPU_DMA_FIREINT1 ) {

4
pcsx2/IPU/IPU.h
View File

@ -192,8 +192,8 @@ void ipuConstWrite32(u32 mem, int mmreg);
void ipuWrite64(u32 mem,u64 value);
void ipuConstWrite64(u32 mem, int mmreg);
void ipu0Interrupt();
void ipu1Interrupt();
extern void ipu0Interrupt();
extern void ipu1Interrupt();
u8 getBits32(u8 *address, u32 advance);
u8 getBits16(u8 *address, u32 advance);

55
pcsx2/PsxDma.c
View File

@ -27,23 +27,23 @@
int iopsifbusy[2] = { 0, 0 };
void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
int size;
/*if (chcr & 0x400) SysPrintf("SPU 2 DMA 4 linked list chain mode! chcr = %x madr = %x bcr = %x\n", chcr, madr, bcr);
if (chcr & 0x40000000) SysPrintf("SPU 2 DMA 4 Unusual bit set on 'to' direction chcr = %x madr = %x bcr = %x\n", chcr, madr, bcr);
if ((chcr & 0x1) == 0) SysPrintf("SPU 2 DMA 4 loading from spu2 memory chcr = %x madr = %x bcr = %x\n", chcr, madr, bcr);*/
const int size = (bcr >> 16) * (bcr & 0xFFFF); // Number of blocks to transfer
/*if (chcr & 0x400) SysPrintf("SPU 2 DMA 4 linked list chain mode! chcr = %x madr = %x bcr = %x\n", chcr, madr, bcr);
if (chcr & 0x40000000) SysPrintf("SPU 2 DMA 4 Unusual bit set on 'to' direction chcr = %x madr = %x bcr = %x\n", chcr, madr, bcr);
if ((chcr & 0x1) == 0) SysPrintf("SPU 2 DMA 4 loading from spu2 memory chcr = %x madr = %x bcr = %x\n", chcr, madr, bcr);*/
if(SPU2async)
{
SPU2async(psxRegs.cycle - psxCounters[6].sCycleT);
//SysPrintf("cycles sent to SPU2 %x\n", psxRegs.cycle - psxCounters[6].sCycleT);
psxCounters[6].sCycleT = psxRegs.cycle;
psxCounters[6].CycleT = ((bcr >> 16) * (bcr & 0xFFFF)) * 3;
psxNextCounter -= (psxRegs.cycle-psxNextsCounter);
psxNextsCounter = psxRegs.cycle;
if(psxCounters[6].CycleT < psxNextCounter) psxNextCounter = psxCounters[6].CycleT;
{
SPU2async(psxRegs.cycle - psxCounters[6].sCycleT);
//SysPrintf("cycles sent to SPU2 %x\n", psxRegs.cycle - psxCounters[6].sCycleT);
psxCounters[6].sCycleT = psxRegs.cycle;
psxCounters[6].CycleT = size * 3;
psxNextCounter -= (psxRegs.cycle-psxNextsCounter);
psxNextsCounter = psxRegs.cycle;
if(psxCounters[6].CycleT < psxNextCounter) psxNextCounter = psxCounters[6].CycleT;
}
switch (chcr) {
@ -51,14 +51,12 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
PSXDMA_LOG("*** DMA 4 - SPU mem2spu *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
//SysPrintf("DMA4 write blocks %x, size per block %x\n", (bcr >> 16), (bcr & 0xFFFF));
size = (bcr >> 16) * (bcr & 0xFFFF); // Number of blocks to transfer
SPU2writeDMA4Mem((u16 *)PSXM(madr), size*2);
break;
case 0x01000200: //spu to cpu transfer
PSXDMA_LOG("*** DMA 4 - SPU spu2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
//SysPrintf("DMA4 read blocks %x, size per block %x\n", (bcr >> 16), (bcr & 0xFFFF));
size = (bcr >> 16) * (bcr & 0xFFFF); // Number of blocks to transfer
SPU2readDMA4Mem((u16 *)PSXM(madr), size*2);
psxCpu->Clear(HW_DMA4_MADR, size);
break;
@ -101,19 +99,18 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) {
}
void psxDma7(u32 madr, u32 bcr, u32 chcr) {
int size;
int size = (bcr >> 16) * (bcr & 0xFFFF);
if(SPU2async)
{
SPU2async(psxRegs.cycle - psxCounters[6].sCycleT);
//SysPrintf("cycles sent to SPU2 %x\n", psxRegs.cycle - psxCounters[6].sCycleT);
psxCounters[6].sCycleT = psxRegs.cycle;
psxCounters[6].CycleT = ((bcr >> 16) * (bcr & 0xFFFF)) * 3;
psxNextCounter -= (psxRegs.cycle-psxNextsCounter);
psxNextsCounter = psxRegs.cycle;
if(psxCounters[6].CycleT < psxNextCounter) psxNextCounter = psxCounters[6].CycleT;
{
SPU2async(psxRegs.cycle - psxCounters[6].sCycleT);
psxCounters[6].sCycleT = psxRegs.cycle;
psxCounters[6].CycleT = size * 3;
psxNextCounter -= (psxRegs.cycle-psxNextsCounter);
psxNextsCounter = psxRegs.cycle;
if(psxCounters[6].CycleT < psxNextCounter) psxNextCounter = psxCounters[6].CycleT;
}
@ -122,14 +119,12 @@ void psxDma7(u32 madr, u32 bcr, u32 chcr) {
PSXDMA_LOG("*** DMA 7 - SPU2 mem2spu *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
//SysPrintf("DMA7 write blocks %x, size per block %x\n", (bcr >> 16), (bcr & 0xFFFF));
size = (bcr >> 16) * (bcr & 0xFFFF); // Number of blocks to transfer
SPU2writeDMA7Mem((u16 *)PSXM(madr), size*2);
break;
case 0x01000200: //spu2 to cpu transfer
PSXDMA_LOG("*** DMA 7 - SPU2 spu2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
//SysPrintf("DMA7 read blocks %x, size per block %x\n", (bcr >> 16), (bcr & 0xFFFF));
size = (bcr >> 16) * (bcr & 0xFFFF); // Number of blocks to transfer
SPU2readDMA7Mem((u16 *)PSXM(madr), size*2);
psxCpu->Clear(HW_DMA7_MADR, size);
break;

2
pcsx2/SPR.c
View File

@ -252,7 +252,7 @@ void dmaSPR0() { // fromSPR
}
__inline static void SPR1transfer(u32 *data, int size) {
__forceinline static void SPR1transfer(u32 *data, int size) {
/* {
int i;
for (i=0; i<size; i++) {

19
pcsx2/Sif.c
View File

@ -64,7 +64,7 @@ void sifInit() {
memset(&sif0, 0, sizeof(sif0));
memset(&sif1, 0, sizeof(sif1));
}
_inline void SIF0write(u32 *from, int words)
static __forceinline void SIF0write(u32 *from, int words)
{
/*if(FIFO_SIF0_W < (words+sif0.fifoWritePos)) {*/
wP0 = min((FIFO_SIF0_W-sif0.fifoWritePos),words);
@ -89,7 +89,7 @@ _inline void SIF0write(u32 *from, int words)
}*/
}
_inline void SIF0read(u32 *to, int words)
static __forceinline void SIF0read(u32 *to, int words)
{
/*if(FIFO_SIF0_W < (words+sif0.fifoReadPos))
{*/
@ -111,7 +111,7 @@ _inline void SIF0read(u32 *to, int words)
SIF_LOG(" SIF0 - %d = %d (pos=%d)\n", words, sif0.fifoSize, sif0.fifoReadPos);
}
_inline void SIF1write(u32 *from, int words)
__forceinline void SIF1write(u32 *from, int words)
{
/*if(FIFO_SIF1_W < (words+sif1.fifoWritePos))
{*/
@ -137,7 +137,7 @@ _inline void SIF1write(u32 *from, int words)
}*/
}
_inline void SIF1read(u32 *to, int words)
static __forceinline void SIF1read(u32 *to, int words)
{
/*if(FIFO_SIF1_W < (words+sif1.fifoReadPos))
{*/
@ -491,7 +491,7 @@ _inline void SIF1Dma()
} while (notDone);
}
_inline void sif0Interrupt() {
__forceinline void sif0Interrupt() {
/*if (psxHu32(0x1070) & 8) {
PSX_INT(9, 0x800);
return 0;
@ -504,7 +504,7 @@ _inline void sif0Interrupt() {
//return 1;
}
_inline void sif1Interrupt() {
__forceinline void sif1Interrupt() {
/*if (psxHu32(0x1070) & 8) {
PSX_INT(10, 0x800);
return 0;
@ -517,7 +517,7 @@ _inline void sif1Interrupt() {
//return 1;
}
_inline void EEsif0Interrupt() {
__forceinline void EEsif0Interrupt() {
/*if (psHu32(DMAC_STAT) & (1<<5)) {
CPU_INT(5, 0x800);
return 0;
@ -529,7 +529,7 @@ _inline void EEsif0Interrupt() {
//return 1;
}
_inline void EEsif1Interrupt() {
__forceinline void EEsif1Interrupt() {
/*if (psHu32(DMAC_STAT) & (1<<6)) {
CPU_INT(6, 0x800);
return 0;
@ -541,6 +541,7 @@ _inline void EEsif1Interrupt() {
// return 1;
}
// fixme: Unused code
_inline void dmaSIF0() {
SIF_LOG("EE: dmaSIF0 chcr = %lx, madr = %lx, qwc = %lx, tadr = %lx\n",
sif0dma->chcr, sif0dma->madr, sif0dma->qwc, sif0dma->tadr);
@ -565,6 +566,7 @@ _inline void dmaSIF0() {
}
}
// fixme: Unused code
_inline void dmaSIF1() {
SIF_LOG("EE: dmaSIF1 chcr = %lx, madr = %lx, qwc = %lx, tadr = %lx\n",
sif1dma->chcr, sif1dma->madr, sif1dma->qwc, sif1dma->tadr);
@ -591,6 +593,7 @@ _inline void dmaSIF1() {
}
// fixme: Unused code
_inline void dmaSIF2() {
SIF_LOG("dmaSIF2 chcr = %lx, madr = %lx, qwc = %lx\n",
sif2dma->chcr, sif2dma->madr, sif2dma->qwc);

2
pcsx2/Sio.c
View File

@ -497,7 +497,7 @@ void sioWriteCtrl16(unsigned short value) {
}
}
void sioInterrupt() {
__forceinline void sioInterrupt() {
PAD_LOG("Sio Interrupt\n");
sio.StatReg|= IRQ;
psxHu32(0x1070)|=0x80;

2
pcsx2/Sio.h
View File

@ -77,7 +77,7 @@ void psxSIOShutdown();
unsigned char sioRead8();
void sioWrite8(unsigned char value);
void sioWriteCtrl16(unsigned short value);
void sioInterrupt();
extern void sioInterrupt();
int sioFreeze(gzFile f, int Mode);
void InitializeSIO(u8 value);

6
pcsx2/Vif.c
View File

@ -38,7 +38,7 @@ vifStruct *_vif;
static int n;
__inline static int _limit( int a, int max )
__forceinline static int _limit( int a, int max )
{
return ( a > max ? max : a );
}
@ -401,7 +401,7 @@ void UNPACK_V4_5(u32 *dest, u32 *data, int size) {
static int cycles;
extern int g_vifCycles;
u16 vifqwc = 0;
__inline int mfifoVIF1rbTransfer() {
static __forceinline int mfifoVIF1rbTransfer() {
u32 maddr = psHu32(DMAC_RBOR);
u32 ret, msize = psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR) + 16;
u16 mfifoqwc = min(vif1ch->qwc, vifqwc);
@ -447,7 +447,7 @@ __inline int mfifoVIF1rbTransfer() {
return ret;
}
__inline int mfifoVIF1chain() {
static __forceinline int mfifoVIF1chain() {
int ret;
/* Is QWC = 0? if so there is nothing to transfer */

14
pcsx2/VifDma.c
View File

@ -229,7 +229,7 @@ __forceinline void vif1FLUSH() {
void vifDmaInit() {
}
__inline static int _limit( int a, int max ) {
__forceinline static int _limit( int a, int max ) {
return ( a > max ? max : a );
}
@ -833,7 +833,7 @@ void vif0Init()
SetNewMask(g_vif0Masks, g_vif0HasMask3, 0, 0xffffffff);
}
__inline void vif0UNPACK(u32 *data) {
static __forceinline void vif0UNPACK(u32 *data) {
int vifNum;
int vl, vn;
int len;
@ -870,7 +870,7 @@ __inline void vif0UNPACK(u32 *data) {
vif0Regs->offset = 0;
}
__inline void _vif0mpgTransfer(u32 addr, u32 *data, int size) {
static __forceinline void _vif0mpgTransfer(u32 addr, u32 *data, int size) {
/* SysPrintf("_vif0mpgTransfer addr=%x; size=%x\n", addr, size);
{
FILE *f = fopen("vu1.raw", "wb");
@ -1510,7 +1510,7 @@ void vif1Init() {
SetNewMask(g_vif1Masks, g_vif1HasMask3, 0, 0xffffffff);
}
__inline void vif1UNPACK(u32 *data) {
static __forceinline void vif1UNPACK(u32 *data) {
int vifNum;
int vl, vn;
//int len;
@ -1551,7 +1551,7 @@ __inline void vif1UNPACK(u32 *data) {
// vif1Regs->offset = 0;
}
__inline void _vif1mpgTransfer(u32 addr, u32 *data, int size) {
static __forceinline void _vif1mpgTransfer(u32 addr, u32 *data, int size) {
/* SysPrintf("_vif1mpgTransfer addr=%x; size=%x\n", addr, size);
{
FILE *f = fopen("vu1.raw", "wb");
@ -2158,7 +2158,7 @@ int _chainVIF1() {
return vif1.done; //Return Done
}
void vif1Interrupt() {
__forceinline void vif1Interrupt() {
VIF_LOG("vif1Interrupt: %8.8x\n", cpuRegs.cycle);
g_vifCycles = 0;
@ -2216,8 +2216,10 @@ void vif1Interrupt() {
return;
}
#ifndef PCSX2_PUBLIC
if(vif1ch->qwc > 0) SysPrintf("VIF1 Ending with QWC left\n");
if(vif1.cmd != 0) SysPrintf("vif1.cmd still set %x\n", vif1.cmd);
#endif
//SysPrintf("VIF Interrupt\n");
//if((gif->chcr & 0x100) && vif1Regs->mskpath3) gsInterrupt();
prevviftag = NULL;

4
pcsx2/VifDma.h
View File

@ -84,8 +84,8 @@ void UNPACK_V4_5( u32 *dest, u32 *data, int size );
void vifDmaInit();
void vif0Init();
void vif1Init();
void vif0Interrupt();
void vif1Interrupt();
extern void vif0Interrupt();
extern void vif1Interrupt();
void vif0Write32(u32 mem, u32 value);
void vif1Write32(u32 mem, u32 value);