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microVU: Fixed a bug I had in the handling of indirect jumps that are placed in a branch delay slot. This fixes the game "The Thing" and I think makes it playable although I didn't test it much. 

Might fix problems in other games that were doing this too.
The bug was kind-of funny, it was an old line of code I had forgotten to delete xD

I also improved the console message for branch in branch delay slots to actually say the names of the branches.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4660 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2011-05-21 03:48:47 +00:00
parent 802be79bd6
commit 633a31ccbc
6 changed files with 19 additions and 17 deletions
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14
pcsx2/x86/microVU_Alloc.inl
View File

@ -131,13 +131,9 @@ __fi void mVUallocCFLAGb(mV, const x32& reg, int fInstance)
__ri void mVUallocVIa(mV, const x32& GPRreg, int _reg_, bool signext = false)
{
if (!_reg_)
xXOR(GPRreg, GPRreg);
else
if (signext)
xMOVSX(GPRreg, ptr16[&mVU.regs().VI[_reg_].SL]);
else
xMOVZX(GPRreg, ptr16[&mVU.regs().VI[_reg_].UL]);
if (!_reg_) xXOR (GPRreg, GPRreg);
elif(signext) xMOVSX(GPRreg, ptr16[&mVU.regs().VI[_reg_].SL]);
else xMOVZX(GPRreg, ptr16[&mVU.regs().VI[_reg_].UL]);
}
__ri void mVUallocVIb(mV, const x32& GPRreg, int _reg_)
@ -146,8 +142,8 @@ __ri void mVUallocVIb(mV, const x32& GPRreg, int _reg_)
xMOVZX(gprT3, ptr16[&mVU.regs().VI[_reg_].UL]);
xMOV (ptr32[&mVU.VIbackup], gprT3);
}
if (_reg_ == 0) { return; }
else if (_reg_ < 16) { xMOV(ptr16[&mVU.regs().VI[_reg_].UL], xRegister16(GPRreg.Id)); }
if (_reg_ == 0) { return; }
elif (_reg_ < 16) { xMOV(ptr16[&mVU.regs().VI[_reg_].UL], xRegister16(GPRreg.Id)); }
}
//------------------------------------------------------------------

8
pcsx2/x86/microVU_Analyze.inl
View File

@ -451,15 +451,15 @@ __ri int mVUbranchCheck(mV) {
mVUregs.flagInfo = 0;
mVUregs.fullFlags0 = 0;
mVUregs.fullFlags1 = 0;
DevCon.Warning("microVU%d Warning: Branch[%d] in Branch[%d] delay slot! [%04x]",
mVU.index, branchType, mVUlow.branch, xPC);
DevCon.Warning("microVU%d Warning: %s in %s delay slot! [%04x]", mVU.index,
branchSTR[mVUlow.branch&0xf], branchSTR[branchType&0xf], xPC);
return 1;
}
else {
incPC(2);
mVUlow.isNOP = 1;
DevCon.Warning("microVU%d Warning: Branch[%d] in Branch[%d] delay slot! [%04x]",
mVU.index, branchType, mVUlow.branch, xPC);
DevCon.Warning("microVU%d Warning: %s in %s delay slot! [%04x]", mVU.index,
branchSTR[mVUlow.branch&0xf], branchSTR[branchType&0xf], xPC);
return 0;
}
}

4
pcsx2/x86/microVU_Compile.inl
View File

@ -21,8 +21,8 @@
static void __fastcall mVUbadOp0(u32 prog, u32 pc) { Console.Error("microVU0 Warning: Exiting... Block started with illegal opcode. [%04x] [%x]", pc, prog); }
static void __fastcall mVUbadOp1(u32 prog, u32 pc) { Console.Error("microVU1 Warning: Exiting... Block started with illegal opcode. [%04x] [%x]", pc, prog); }
static void __fastcall mVUwarning0(u32 prog) { Console.Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x] [%x]", prog); }
static void __fastcall mVUwarning1(u32 prog) { Console.Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x] [%x]", prog); }
static void __fastcall mVUwarning0(u32 prog) { Console.Error("microVU0 Warning: Exiting from Possible Infinite Loop [%03d]", prog); }
static void __fastcall mVUwarning1(u32 prog) { Console.Error("microVU1 Warning: Exiting from Possible Infinite Loop [%03d]", prog); }
static void __fastcall mVUprintPC1(u32 pc) { Console.WriteLn("Block Start PC = 0x%04x", pc); }
static void __fastcall mVUprintPC2(u32 pc) { Console.WriteLn("Block End PC = 0x%04x", pc); }

2
pcsx2/x86/microVU_IR.h
View File

@ -122,7 +122,7 @@ struct microLowerOp {
microVIreg VI_write; // VI reg written to by this instruction
microVIreg VI_read[2]; // VI regs read by this instruction
microConstInfo constJump; // Constant Reg Info for JR/JARL instructions
u32 branch; // Branch Type (0 = Not a Branch, 1 = B. 2 = BAL, 3~8 = Conditional Branches, 9 = JALR, 10 = JR)
u32 branch; // Branch Type (0 = Not a Branch, 1 = B. 2 = BAL, 3~8 = Conditional Branches, 9 = JR, 10 = JALR)
bool badBranch; // This instruction is a Branch who has another branch in its Delay Slot
bool evilBranch;// This instruction is a Branch in a Branch Delay Slot (Instruction after badBranch)
bool isNOP; // This instruction is a NOP

1
pcsx2/x86/microVU_Lower.inl
View File

@ -1349,7 +1349,6 @@ void normJumpPass2(mV) {
mVUallocVIa(mVU, gprT1, _Is_);
xSHL(gprT1, 3);
xAND(gprT1, mVU.microMemSize - 8);
xMOV(ptr32[&mVU.branch], gprT1);
if (!mVUlow.evilBranch) xMOV(ptr32[&mVU.branch], gprT1);
else xMOV(ptr32[&mVU.evilBranch], gprT1);
if (mVUlow.badBranch) {

7
pcsx2/x86/microVU_Misc.h
View File

@ -81,6 +81,13 @@ static const uint _DTbit_ = 0; //( _Dbit_ | _Tbit_ ) // ToDo: Implement this stu
static const uint divI = 0x1040000;
static const uint divD = 0x2080000;
static const char branchSTR[16][8] = {
"None", "B", "BAL", "IBEQ",
"IBGEZ", "IBGTZ", "IBLEZ", "IBLTZ",
"IBNE", "JR", "JALR", "N/A",
"N/A", "N/A", "N/A", "N/A"
};
//------------------------------------------------------------------
// Helper Macros
//------------------------------------------------------------------