mirror of https://github.com/PCSX2/pcsx2.git
x86emitter: remove unused legacy function
And mark the remaining one as deprecated Clang only as it relies on C++14
This commit is contained in:
Gregory Hainaut
parent
fcdbae6806
commit
60a9463e7a
File diff suppressed because it is too large
Load Diff
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@ -33,12 +33,6 @@ using x86Emitter::xWrite64;
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#define MEMADDR(addr, oplen) (addr)
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#define Rex(w,r,x,b) assert(0)
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#define RexR(w, reg) assert( !(w || (reg)>=8) )
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#define RexB(w, base) assert( !(w || (base)>=8) )
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#define RexRB(w, reg, base) assert( !(w || (reg) >= 8 || (base)>=8) )
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#define RexRXB(w, reg, index, base) assert( !(w || (reg) >= 8 || (index) >= 8 || (base) >= 8) )
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// Recent GCC define the macro in x86intrin.h
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#ifndef _MM_MK_INSERTPS_NDX
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#define _MM_MK_INSERTPS_NDX(srcField, dstField, zeroMask) (((srcField)<<6) | ((dstField)<<4) | (zeroMask))
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@ -15,15 +15,25 @@
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#pragma once
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#if defined(__linux__) && defined(__clang__)
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[[deprecated]] const int DISP32 = 5; // maps to EBP
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[[deprecated]] const int EAX = 0;
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[[deprecated]] const int EBX = 3;
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[[deprecated]] const int ECX = 1;
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[[deprecated]] const int EDX = 2;
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[[deprecated]] const int ESI = 6;
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[[deprecated]] const int EDI = 7;
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[[deprecated]] const int EBP = 5;
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[[deprecated]] const int ESP = 4;
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#else
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//#define SIB 4 // maps to ESP
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//#define SIBDISP 5 // maps to EBP
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#define DISP32 5 // maps to EBP
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// general types
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typedef int x86IntRegType;
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typedef int x86MMXRegType;
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typedef int x86SSERegType;
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#define EAX 0
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#define EBX 3
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#define ECX 1
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@ -32,3 +42,10 @@ typedef int x86SSERegType;
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#define EDI 7
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#define EBP 5
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#define ESP 4
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#endif
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// general types
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typedef int x86IntRegType;
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typedef int x86MMXRegType;
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typedef int x86SSERegType;
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@ -1,47 +0,0 @@
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/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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//////////////////////////////////////////////////////////////////////////////////////////
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// SSE-X Helpers (generates either INT or FLOAT versions of certain SSE instructions)
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// This header should always be included *after* ix86.h.
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// Added AlwaysUseMovaps check to the relevant functions here, which helps reduce the
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// overhead of dynarec instructions that use these.
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extern void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from );
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extern void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
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extern void SSEX_MOVDQARmtoR( x86SSERegType to, x86IntRegType from, int offset=0 );
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extern void SSEX_MOVDQARtoRm( x86IntRegType to, x86SSERegType from, int offset=0 );
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extern void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from );
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extern void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from );
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extern void SSEX_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset=0 );
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extern void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset=0 );
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extern void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
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extern void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
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extern void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
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extern void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from );
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extern void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
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extern void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from );
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extern void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
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extern void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from );
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extern void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
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@ -52,280 +52,6 @@ emitterT void SibSB( uint ss, uint index, uint base )
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using namespace x86Emitter;
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static xIndirect32 _mhlp32( x86IntRegType to )
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{
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return ptr32[xAddressReg( to )];
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}
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static xIndirect32 _mhlp32( x86IntRegType to1, x86IntRegType to2 )
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{
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return ptr32[xAddressReg( to1 ) + xAddressReg( to2 )];
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}
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static xIndirect16 _mhlp16( x86IntRegType to )
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{
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return ptr16[xAddressReg( to )];
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}
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static xIndirect16 _mhlp16( x86IntRegType to1, x86IntRegType to2 )
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{
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return ptr16[xAddressReg( to1 ) + xAddressReg( to2 )];
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}
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static xIndirect8 _mhlp8( x86IntRegType to )
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{
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return ptr8[xAddressReg( to )];
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}
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static xIndirect8 _mhlp8( x86IntRegType to1, x86IntRegType to2 )
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{
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return ptr8[xAddressReg( to1 ) + xAddressReg( to2 )];
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}
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//////////////////////////////////////////////////////////////////////////////////////////
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//
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#define DEFINE_LEGACY_HELPER( cod, bits ) \
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emitterT void cod##bits##RtoR( x86IntRegType to, x86IntRegType from ) { x##cod( xRegister##bits(to), xRegister##bits(from) ); } \
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emitterT void cod##bits##ItoR( x86IntRegType to, u##bits imm ) { x##cod( xRegister##bits(to), imm ); } \
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emitterT void cod##bits##MtoR( x86IntRegType to, uptr from ) { x##cod( xRegister##bits(to), ptr[(void*)from] ); } \
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emitterT void cod##bits##RtoM( uptr to, x86IntRegType from ) { x##cod( ptr[(void*)to], xRegister##bits(from) ); } \
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emitterT void cod##bits##ItoM( uptr to, u##bits imm ) { x##cod( ptr##bits[(u##bits*)to], imm ); } \
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emitterT void cod##bits##ItoRm( x86IntRegType to, u##bits imm, int offset ) { x##cod( _mhlp##bits(to) + offset, imm ); } \
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emitterT void cod##bits##RmtoR( x86IntRegType to, x86IntRegType from, int offset ) { x##cod( xRegister##bits(to), _mhlp##bits(from) + offset ); } \
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emitterT void cod##bits##RtoRm( x86IntRegType to, x86IntRegType from, int offset ) { x##cod( _mhlp##bits(to) + offset, xRegister##bits(from) ); } \
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emitterT void cod##bits##RtoRmS( x86IntRegType to1, x86IntRegType to2, x86IntRegType from, int offset ) \
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{ x##cod( _mhlp##bits(to1,to2) + offset, xRegister##bits(from) ); } \
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emitterT void cod##bits##RmStoR( x86IntRegType to, x86IntRegType from1, x86IntRegType from2, int offset ) \
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{ x##cod( xRegister##bits(to), _mhlp##bits(from1,from2) + offset ); }
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#define DEFINE_LEGACY_SHIFT_HELPER( cod, bits ) \
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emitterT void cod##bits##CLtoR( x86IntRegType to ) { x##cod( xRegister##bits(to), cl ); } \
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emitterT void cod##bits##ItoR( x86IntRegType to, u8 imm ) { x##cod( xRegister##bits(to), imm ); } \
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emitterT void cod##bits##CLtoM( uptr to ) { x##cod( ptr##bits[(u##bits*)to], cl ); } \
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emitterT void cod##bits##ItoM( uptr to, u8 imm ) { x##cod( ptr##bits[(u##bits*)to], imm ); } \
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emitterT void cod##bits##ItoRm( x86IntRegType to, u8 imm, int offset ) { x##cod( _mhlp##bits(to) + offset, imm ); } \
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emitterT void cod##bits##CLtoRm( x86IntRegType to, int offset ) { x##cod( _mhlp##bits(to) + offset, cl ); }
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#define DEFINE_LEGACY_ONEREG_HELPER( cod, bits ) \
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emitterT void cod##bits##R( x86IntRegType to ) { x##cod( xRegister##bits(to) ); } \
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emitterT void cod##bits##M( uptr to ) { x##cod( ptr##bits[(u##bits*)to] ); } \
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emitterT void cod##bits##Rm( x86IntRegType to, uptr offset ) { x##cod( _mhlp##bits(to) + offset ); }
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#define DEFINE_OPCODE_LEGACY( cod ) \
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DEFINE_LEGACY_HELPER( cod, 32 ) \
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DEFINE_LEGACY_HELPER( cod, 16 ) \
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DEFINE_LEGACY_HELPER( cod, 8 )
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#define DEFINE_OPCODE_SHIFT_LEGACY( cod ) \
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DEFINE_LEGACY_SHIFT_HELPER( cod, 32 ) \
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DEFINE_LEGACY_SHIFT_HELPER( cod, 16 ) \
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DEFINE_LEGACY_SHIFT_HELPER( cod, 8 )
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#define DEFINE_OPCODE_ONEREG_LEGACY( cod ) \
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DEFINE_LEGACY_ONEREG_HELPER( cod, 32 ) \
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DEFINE_LEGACY_ONEREG_HELPER( cod, 16 ) \
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DEFINE_LEGACY_ONEREG_HELPER( cod, 8 )
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//////////////////////////////////////////////////////////////////////////////////////////
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//
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DEFINE_OPCODE_LEGACY( ADD )
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DEFINE_OPCODE_LEGACY( CMP )
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DEFINE_OPCODE_LEGACY( OR )
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DEFINE_OPCODE_LEGACY( ADC )
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DEFINE_OPCODE_LEGACY( SBB )
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DEFINE_OPCODE_LEGACY( AND )
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DEFINE_OPCODE_LEGACY( SUB )
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DEFINE_OPCODE_LEGACY( XOR )
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DEFINE_OPCODE_SHIFT_LEGACY( ROL )
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DEFINE_OPCODE_SHIFT_LEGACY( ROR )
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DEFINE_OPCODE_SHIFT_LEGACY( RCL )
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DEFINE_OPCODE_SHIFT_LEGACY( RCR )
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DEFINE_OPCODE_SHIFT_LEGACY( SHL )
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DEFINE_OPCODE_SHIFT_LEGACY( SHR )
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DEFINE_OPCODE_SHIFT_LEGACY( SAR )
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DEFINE_OPCODE_LEGACY( MOV )
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DEFINE_OPCODE_ONEREG_LEGACY( INC )
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DEFINE_OPCODE_ONEREG_LEGACY( DEC )
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DEFINE_OPCODE_ONEREG_LEGACY( NOT )
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DEFINE_OPCODE_ONEREG_LEGACY( NEG )
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// ------------------------------------------------------------------------
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#define DEFINE_LEGACY_MOVEXTEND( form, destbits, srcbits ) \
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emitterT void MOV##form##destbits##R##srcbits##toR( x86IntRegType to, x86IntRegType from ) { xMOV##form( xRegister##destbits( to ), xRegister##srcbits( from ) ); } \
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emitterT void MOV##form##destbits##Rm##srcbits##toR( x86IntRegType to, x86IntRegType from, int offset ) { xMOV##form( xRegister##destbits( to ), ptr##srcbits[xAddressReg( from ) + offset] ); } \
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emitterT void MOV##form##destbits##M##srcbits##toR( x86IntRegType to, u32 from ) { xMOV##form( xRegister##destbits( to ), ptr##srcbits[(u##srcbits*)from] ); }
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DEFINE_LEGACY_MOVEXTEND( SX, 32, 16 )
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DEFINE_LEGACY_MOVEXTEND( ZX, 32, 16 )
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DEFINE_LEGACY_MOVEXTEND( SX, 32, 8 )
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DEFINE_LEGACY_MOVEXTEND( ZX, 32, 8 )
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DEFINE_LEGACY_MOVEXTEND( SX, 16, 8 )
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DEFINE_LEGACY_MOVEXTEND( ZX, 16, 8 )
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emitterT void TEST32ItoR( x86IntRegType to, u32 from ) { xTEST( xRegister32(to), from ); }
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emitterT void TEST32ItoM( uptr to, u32 from ) { xTEST( ptr32[(u32*)to], from ); }
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emitterT void TEST32RtoR( x86IntRegType to, x86IntRegType from ) { xTEST( xRegister32(to), xRegister32(from) ); }
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emitterT void TEST32ItoRm( x86IntRegType to, u32 from ) { xTEST( ptr32[xAddressReg(to)], from ); }
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emitterT void TEST16ItoR( x86IntRegType to, u16 from ) { xTEST( xRegister16(to), from ); }
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emitterT void TEST16ItoM( uptr to, u16 from ) { xTEST( ptr16[(u16*)to], from ); }
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emitterT void TEST16RtoR( x86IntRegType to, x86IntRegType from ) { xTEST( xRegister16(to), xRegister16(from) ); }
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emitterT void TEST16ItoRm( x86IntRegType to, u16 from ) { xTEST( ptr16[xAddressReg(to)], from ); }
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emitterT void TEST8ItoR( x86IntRegType to, u8 from ) { xTEST( xRegister8(to), from ); }
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emitterT void TEST8ItoM( uptr to, u8 from ) { xTEST( ptr8[(u8*)to], from ); }
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emitterT void TEST8RtoR( x86IntRegType to, x86IntRegType from ) { xTEST( xRegister8(to), xRegister8(from) ); }
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emitterT void TEST8ItoRm( x86IntRegType to, u8 from ) { xTEST( ptr8[xAddressReg(to)], from ); }
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// mov r32 to [r32<<scale+from2]
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emitterT void MOV32RmSOffsettoR( x86IntRegType to, x86IntRegType from1, s32 from2, int scale )
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{
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xMOV( xRegister32(to), ptr[(xAddressReg(from1)<<scale) + from2] );
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}
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emitterT void MOV16RmSOffsettoR( x86IntRegType to, x86IntRegType from1, s32 from2, int scale )
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{
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xMOV( xRegister16(to), ptr[(xAddressReg(from1)<<scale) + from2] );
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}
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emitterT void MOV8RmSOffsettoR( x86IntRegType to, x86IntRegType from1, s32 from2, int scale )
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{
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xMOV( xRegister8(to), ptr[(xAddressReg(from1)<<scale) + from2] );
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}
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emitterT void AND32I8toR( x86IntRegType to, s8 from )
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{
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xAND( xRegister32(to), from );
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}
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emitterT void AND32I8toM( uptr to, s8 from )
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{
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xAND( ptr8[(u8*)to], from );
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}
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/* cmove r32 to r32*/
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emitterT void CMOVE32RtoR( x86IntRegType to, x86IntRegType from )
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{
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xCMOVE( xRegister32(to), xRegister32(from) );
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}
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// shld imm8 to r32
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emitterT void SHLD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
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{
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xSHLD( xRegister32(to), xRegister32(from), shift );
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}
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// shrd imm8 to r32
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emitterT void SHRD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
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{
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xSHRD( xRegister32(to), xRegister32(from), shift );
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}
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/* mul eax by r32 to edx:eax */
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emitterT void MUL32R( x86IntRegType from ) { xUMUL( xRegister32(from) ); }
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/* imul eax by r32 to edx:eax */
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emitterT void IMUL32R( x86IntRegType from ) { xMUL( xRegister32(from) ); }
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/* mul eax by m32 to edx:eax */
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emitterT void MUL32M( u32 from ) { xUMUL( ptr32[(u32*)from] ); }
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/* imul eax by m32 to edx:eax */
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emitterT void IMUL32M( u32 from ) { xMUL( ptr32[(u32*)from] ); }
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/* imul r32 by r32 to r32 */
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emitterT void IMUL32RtoR( x86IntRegType to, x86IntRegType from )
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{
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xMUL( xRegister32(to), xRegister32(from) );
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}
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/* div eax by r32 to edx:eax */
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emitterT void DIV32R( x86IntRegType from ) { xUDIV( xRegister32(from) ); }
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/* idiv eax by r32 to edx:eax */
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emitterT void IDIV32R( x86IntRegType from ) { xDIV( xRegister32(from) ); }
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/* div eax by m32 to edx:eax */
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emitterT void DIV32M( u32 from ) { xUDIV( ptr32[(u32*)from] ); }
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/* idiv eax by m32 to edx:eax */
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emitterT void IDIV32M( u32 from ) { xDIV( ptr32[(u32*)from] ); }
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emitterT void LEA32RtoR(x86IntRegType to, x86IntRegType from, s32 offset)
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{
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xLEA( xRegister32( to ), ptr[xAddressReg(from)+offset] );
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}
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emitterT void LEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
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{
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xLEA( xRegister32( to ), ptr[xAddressReg(from0)+xAddressReg(from1)] );
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}
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// Don't inline recursive functions
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emitterT void LEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
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{
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xLEA( xRegister32( to ), ptr[xAddressReg(from)*(1<<scale)] );
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}
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// to = from + offset
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emitterT void LEA16RtoR(x86IntRegType to, x86IntRegType from, s16 offset)
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{
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xLEA( xRegister16( to ), ptr[xAddressReg(from)+offset] );
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}
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// to = from0 + from1
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emitterT void LEA16RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
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{
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xLEA( xRegister16( to ), ptr[xAddressReg(from0)+xAddressReg(from1)] );
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}
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// to = from << scale (max is 3)
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emitterT void LEA16RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
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{
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xLEA( xRegister16( to ), ptr[xAddressReg(from)*(1<<scale)] );
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}
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||||
emitterT void BT32ItoR( x86IntRegType to, u8 from ) { xBT( xRegister32(to), from ); }
|
||||
emitterT void BTR32ItoR( x86IntRegType to, u8 from ) { xBTR( xRegister32(to), from ); }
|
||||
|
||||
emitterT void SETS8R( x86IntRegType to ) { xSETS( xRegister8(to) ); }
|
||||
emitterT void SETL8R( x86IntRegType to ) { xSETL( xRegister8(to) ); }
|
||||
emitterT void SETGE8R( x86IntRegType to ) { xSETGE( xRegister8(to) ); }
|
||||
emitterT void SETG8R( x86IntRegType to ) { xSETG( xRegister8(to) ); }
|
||||
emitterT void SETA8R( x86IntRegType to ) { xSETA( xRegister8(to) ); }
|
||||
emitterT void SETAE8R( x86IntRegType to ) { xSETAE( xRegister8(to) ); }
|
||||
emitterT void SETB8R( x86IntRegType to ) { xSETB( xRegister8(to) ); }
|
||||
emitterT void SETNZ8R( x86IntRegType to ) { xSETNZ( xRegister8(to) ); }
|
||||
emitterT void SETZ8R( x86IntRegType to ) { xSETZ( xRegister8(to) ); }
|
||||
emitterT void SETE8R( x86IntRegType to ) { xSETE( xRegister8(to) ); }
|
||||
|
||||
/* push imm32 */
|
||||
emitterT void PUSH32I( u32 from ) { xPUSH( from ); }
|
||||
|
||||
/* push r32 */
|
||||
emitterT void PUSH32R( x86IntRegType from ) { xPUSH( xRegister32( from ) ); }
|
||||
|
||||
/* push m32 */
|
||||
emitterT void PUSH32M( u32 from )
|
||||
{
|
||||
xPUSH( ptr[(void*)from] );
|
||||
}
|
||||
|
||||
/* pop r32 */
|
||||
emitterT void POP32R( x86IntRegType from ) { xPOP( xRegister32( from ) ); }
|
||||
emitterT void PUSHFD( void ) { xPUSHFD(); }
|
||||
emitterT void POPFD( void ) { xPOPFD(); }
|
||||
|
||||
emitterT void RET( void ) { xRET(); }
|
||||
|
||||
emitterT void CBW( void ) { xCBW(); }
|
||||
emitterT void CWD( void ) { xCWD(); }
|
||||
emitterT void CDQ( void ) { xCDQ(); }
|
||||
emitterT void CWDE() { xCWDE(); }
|
||||
|
||||
emitterT void LAHF() { xLAHF(); }
|
||||
emitterT void SAHF() { xSAHF(); }
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////////////
|
||||
//////////////////////////////////////////////////////////////////////////////////////////
|
||||
// From here on are instructions that have NOT been implemented in the new emitter.
|
||||
|
|
@ -422,10 +148,6 @@ emitterT void x86Align( int bytes )
|
|||
/* IX86 instructions */
|
||||
/********************/
|
||||
|
||||
emitterT void STC( void ) { xSTC(); }
|
||||
emitterT void CLC( void ) { xCLC(); }
|
||||
emitterT void NOP( void ) { xNOP(); }
|
||||
|
||||
////////////////////////////////////
|
||||
// jump instructions /
|
||||
////////////////////////////////////
|
||||
|
|
@ -699,33 +421,3 @@ emitterT u32* JNO32( u32 to )
|
|||
{
|
||||
return J32Rel( 0x81, to );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* call func */
|
||||
emitterT void CALLFunc( uptr func )
|
||||
{
|
||||
xCALL( (void*)func );
|
||||
}
|
||||
|
||||
/* call r32 */
|
||||
emitterT void CALL32R( x86IntRegType to )
|
||||
{
|
||||
xCALL( xRegister32( to ) );
|
||||
}
|
||||
|
||||
/* call m32 */
|
||||
emitterT void CALL32M( u32 to )
|
||||
{
|
||||
xCALL( ptr32[(u32*)to] );
|
||||
}
|
||||
|
||||
emitterT void BSRRtoR(x86IntRegType to, x86IntRegType from)
|
||||
{
|
||||
xBSR( xRegister32(to), xRegister32(from) );
|
||||
}
|
||||
|
||||
emitterT void BSWAP32R( x86IntRegType to )
|
||||
{
|
||||
xBSWAP( xRegister32(to) );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -15,518 +15,19 @@
|
|||
|
||||
#include "PrecompiledHeader.h"
|
||||
#include "legacy_internal.h"
|
||||
#include "sse_helpers.h"
|
||||
|
||||
using namespace x86Emitter;
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// MMX / SSE Mixed Bag
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
emitterT void MOVQMtoR( x86MMXRegType to, uptr from ) { xMOVQ( xRegisterMMX(to), ptr[(void*)from] ); }
|
||||
emitterT void MOVQRtoM( uptr to, x86MMXRegType from ) { xMOVQ( ptr[(void*)to], xRegisterMMX(from) ); }
|
||||
emitterT void MOVQRtoR( x86MMXRegType to, x86MMXRegType from ) { xMOVQ( xRegisterMMX(to), xRegisterMMX(from) ); }
|
||||
emitterT void MOVQRmtoR( x86MMXRegType to, x86IntRegType from, int offset ) { xMOVQ( xRegisterMMX(to), ptr[xAddressReg(from)+offset] ); }
|
||||
emitterT void MOVQRtoRm( x86IntRegType to, x86MMXRegType from, int offset ) { xMOVQ( ptr[xAddressReg(to)+offset], xRegisterMMX(from) ); }
|
||||
|
||||
emitterT void MOVDMtoMMX( x86MMXRegType to, uptr from ) { xMOVDZX( xRegisterMMX(to), ptr[(void*)from] ); }
|
||||
emitterT void MOVDMMXtoM( uptr to, x86MMXRegType from ) { xMOVD( ptr[(void*)to], xRegisterMMX(from) ); }
|
||||
emitterT void MOVD32RtoMMX( x86MMXRegType to, x86IntRegType from ) { xMOVDZX( xRegisterMMX(to), xRegister32(from) ); }
|
||||
emitterT void MOVD32RmtoMMX( x86MMXRegType to, x86IntRegType from, int offset ) { xMOVDZX( xRegisterMMX(to), ptr[xAddressReg(from)+offset] ); }
|
||||
emitterT void MOVD32MMXtoR( x86IntRegType to, x86MMXRegType from ) { xMOVD( xRegister32(to), xRegisterMMX(from) ); }
|
||||
emitterT void MOVD32MMXtoRm( x86IntRegType to, x86MMXRegType from, int offset ) { xMOVD( ptr[xAddressReg(to)+offset], xRegisterMMX(from) ); }
|
||||
|
||||
emitterT void PMOVMSKBMMXtoR(x86IntRegType to, x86MMXRegType from) { xPMOVMSKB( xRegister32(to), xRegisterMMX(from) ); }
|
||||
emitterT void MASKMOVQRtoR(x86MMXRegType to, x86MMXRegType from) { xMASKMOV( xRegisterMMX(to), xRegisterMMX(from) ); }
|
||||
|
||||
#define DEFINE_LEGACY_LOGIC_OPCODE( mod ) \
|
||||
emitterT void P##mod##RtoR( x86MMXRegType to, x86MMXRegType from ) { xP##mod( xRegisterMMX(to), xRegisterMMX(from) ); } \
|
||||
emitterT void P##mod##MtoR( x86MMXRegType to, uptr from ) { xP##mod( xRegisterMMX(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE2_P##mod##_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xP##mod( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_P##mod##_M128_to_XMM( x86SSERegType to, uptr from ) { xP##mod( xRegisterSSE(to), ptr[(void*)from]); }
|
||||
|
||||
#define DEFINE_LEGACY_ARITHMETIC( mod, sub ) \
|
||||
emitterT void P##mod##sub##RtoR( x86MMXRegType to, x86MMXRegType from ) { xP##mod.sub( xRegisterMMX(to), xRegisterMMX(from) ); } \
|
||||
emitterT void P##mod##sub##MtoR( x86MMXRegType to, uptr from ) { xP##mod.sub( xRegisterMMX(to), ptr[(void*)from] ); } \
|
||||
emitterT void SSE2_P##mod##sub##_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xP##mod.sub( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_P##mod##sub##_M128_to_XMM( x86SSERegType to, uptr from ) { xP##mod.sub( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
|
||||
#define DEFINE_LEGACY_SHIFT_STUFF( mod, sub ) \
|
||||
emitterT void P##mod##sub##RtoR( x86MMXRegType to, x86MMXRegType from ) { xP##mod.sub( xRegisterMMX(to), xRegisterMMX(from) ); } \
|
||||
emitterT void P##mod##sub##MtoR( x86MMXRegType to, uptr from ) { xP##mod.sub( xRegisterMMX(to), ptr[(void*)from] ); } \
|
||||
emitterT void P##mod##sub##ItoR( x86MMXRegType to, u8 imm ) { xP##mod.sub( xRegisterMMX(to), imm ); } \
|
||||
emitterT void SSE2_P##mod##sub##_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xP##mod.sub( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_P##mod##sub##_M128_to_XMM( x86SSERegType to, uptr from ) { xP##mod.sub( xRegisterSSE(to), ptr[(void*)from] ); } \
|
||||
emitterT void SSE2_P##mod##sub##_I8_to_XMM( x86SSERegType to, u8 imm ) { xP##mod.sub( xRegisterSSE(to), imm ); }
|
||||
|
||||
#define DEFINE_LEGACY_SHIFT_OPCODE( mod ) \
|
||||
DEFINE_LEGACY_SHIFT_STUFF( mod, Q ) \
|
||||
DEFINE_LEGACY_SHIFT_STUFF( mod, D ) \
|
||||
DEFINE_LEGACY_SHIFT_STUFF( mod, W ) \
|
||||
emitterT void SSE2_P##mod##DQ_I8_to_XMM( x86MMXRegType to, u8 imm ) { xP##mod.DQ( xRegisterSSE(to), imm ); }
|
||||
|
||||
DEFINE_LEGACY_LOGIC_OPCODE( AND )
|
||||
DEFINE_LEGACY_LOGIC_OPCODE( ANDN )
|
||||
DEFINE_LEGACY_LOGIC_OPCODE( OR )
|
||||
DEFINE_LEGACY_LOGIC_OPCODE( XOR )
|
||||
|
||||
DEFINE_LEGACY_SHIFT_OPCODE( SLL )
|
||||
DEFINE_LEGACY_SHIFT_OPCODE( SRL )
|
||||
DEFINE_LEGACY_SHIFT_STUFF( SRA, D )
|
||||
DEFINE_LEGACY_SHIFT_STUFF( SRA, W )
|
||||
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, B )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, W )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, D )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, Q )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, SB )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, SW )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, USB )
|
||||
DEFINE_LEGACY_ARITHMETIC( ADD, USW )
|
||||
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, B )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, W )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, D )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, Q )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, SB )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, SW )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, USB )
|
||||
DEFINE_LEGACY_ARITHMETIC( SUB, USW )
|
||||
|
||||
DEFINE_LEGACY_ARITHMETIC( CMP, EQB );
|
||||
DEFINE_LEGACY_ARITHMETIC( CMP, EQW );
|
||||
DEFINE_LEGACY_ARITHMETIC( CMP, EQD );
|
||||
DEFINE_LEGACY_ARITHMETIC( CMP, GTB );
|
||||
DEFINE_LEGACY_ARITHMETIC( CMP, GTW );
|
||||
DEFINE_LEGACY_ARITHMETIC( CMP, GTD );
|
||||
|
||||
DEFINE_LEGACY_ARITHMETIC( UNPCK, HDQ );
|
||||
DEFINE_LEGACY_ARITHMETIC( UNPCK, LDQ );
|
||||
DEFINE_LEGACY_ARITHMETIC( UNPCK, HBW );
|
||||
DEFINE_LEGACY_ARITHMETIC( UNPCK, LBW );
|
||||
|
||||
DEFINE_LEGACY_ARITHMETIC( UNPCK, LWD );
|
||||
DEFINE_LEGACY_ARITHMETIC( UNPCK, HWD );
|
||||
|
||||
|
||||
emitterT void PMULUDQMtoR( x86MMXRegType to, uptr from ) { xPMUL.UDQ( xRegisterMMX( to ), ptr[(void*)from]); }
|
||||
emitterT void PMULUDQRtoR( x86MMXRegType to, x86MMXRegType from ) { xPMUL.UDQ( xRegisterMMX( to ), xRegisterMMX( from ) ); }
|
||||
|
||||
emitterT void PSHUFWRtoR(x86MMXRegType to, x86MMXRegType from, u8 imm8) { xPSHUF.W( xRegisterMMX(to), xRegisterMMX(from), imm8 ); }
|
||||
emitterT void PSHUFWMtoR(x86MMXRegType to, uptr from, u8 imm8) { xPSHUF.W( xRegisterMMX(to), ptr[(void*)from], imm8 ); }
|
||||
|
||||
emitterT void PINSRWRtoMMX( x86MMXRegType to, x86SSERegType from, u8 imm8 ) { xPINSR.W( xRegisterMMX(to), xRegister32(from), imm8 ); }
|
||||
|
||||
emitterT void EMMS() { xEMMS(); }
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// Begin SSE-Only Part!
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
#define DEFINE_LEGACY_MOV_OPCODE( mod, sse ) \
|
||||
emitterT void sse##_MOV##mod##_M128_to_XMM( x86SSERegType to, uptr from ) { xMOV##mod( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void sse##_MOV##mod##_XMM_to_M128( uptr to, x86SSERegType from ) { xMOV##mod( ptr[(void*)to], xRegisterSSE(from) ); } \
|
||||
emitterT void sse##_MOV##mod##RmtoR( x86SSERegType to, x86IntRegType from, int offset ) { xMOV##mod( xRegisterSSE(to), ptr[xAddressReg(from)+offset] ); } \
|
||||
emitterT void sse##_MOV##mod##RtoRm( x86IntRegType to, x86SSERegType from, int offset ) { xMOV##mod( ptr[xAddressReg(to)+offset], xRegisterSSE(from) ); } \
|
||||
emitterT void sse##_MOV##mod##RmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale ) \
|
||||
{ xMOV##mod( xRegisterSSE(to), ptr[xAddressReg(from)+xAddressReg(from2)] ); } \
|
||||
emitterT void sse##_MOV##mod##RtoRmS( x86IntRegType to, x86SSERegType from, x86IntRegType from2, int scale ) \
|
||||
{ xMOV##mod( ptr[xAddressReg(to)+xAddressReg(from2)], xRegisterSSE(from) ); }
|
||||
|
||||
#define DEFINE_LEGACY_PSD_OPCODE( mod ) \
|
||||
emitterT void SSE_##mod##PS_M128_to_XMM( x86SSERegType to, uptr from ) { x##mod.PS( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE_##mod##PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.PS( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_##mod##PD_M128_to_XMM( x86SSERegType to, uptr from ) { x##mod.PD( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE2_##mod##PD_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.PD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
#define DEFINE_LEGACY_SSSD_OPCODE( mod ) \
|
||||
emitterT void SSE_##mod##SS_M32_to_XMM( x86SSERegType to, uptr from ) { x##mod.SS( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE_##mod##SS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.SS( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_##mod##SD_M64_to_XMM( x86SSERegType to, uptr from ) { x##mod.SD( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE2_##mod##SD_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.SD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
#define DEFINE_LEGACY_CMP_OPCODE( comp ) \
|
||||
emitterT void SSE_CMP##comp##PS_M128_to_XMM( x86SSERegType to, uptr from ) { xCMP##comp.PS( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE_CMP##comp##PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCMP##comp.PS( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_CMP##comp##PD_M128_to_XMM( x86SSERegType to, uptr from ) { xCMP##comp.PD( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE2_CMP##comp##PD_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCMP##comp.PD( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE_CMP##comp##SS_M32_to_XMM( x86SSERegType to, uptr from ) { xCMP##comp.SS( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE_CMP##comp##SS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCMP##comp.SS( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE2_CMP##comp##SD_M64_to_XMM( x86SSERegType to, uptr from ) { xCMP##comp.SD( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE2_CMP##comp##SD_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCMP##comp.SD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
DEFINE_LEGACY_SSSD_OPCODE( SUB )
|
||||
DEFINE_LEGACY_SSSD_OPCODE( ADD )
|
||||
|
||||
#define DEFINE_LEGACY_RSQRT_OPCODE(mod) \
|
||||
emitterT void SSE_##mod##PS_M128_to_XMM( x86SSERegType to, uptr from ) { x##mod.PS( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE_##mod##PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.PS( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE_##mod##SS_M32_to_XMM( x86SSERegType to, uptr from ) { x##mod.SS( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE_##mod##SS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.SS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
#define DEFINE_LEGACY_SQRT_OPCODE(mod) \
|
||||
DEFINE_LEGACY_RSQRT_OPCODE(mod) \
|
||||
emitterT void SSE2_##mod##SD_M64_to_XMM( x86SSERegType to, uptr from ) { x##mod.SD( xRegisterSSE(to), ptr[(void*)from]); } \
|
||||
emitterT void SSE2_##mod##SD_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.SD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
#define DEFINE_LEGACY_OP128( ssenum, mod, sub ) \
|
||||
emitterT void SSE##ssenum##_##mod##sub##_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod.sub( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE##ssenum##_##mod##sub##_M128_to_XMM( x86SSERegType to, uptr from ) { x##mod.sub( xRegisterSSE(to), ptr[(void*)from]); }
|
||||
|
||||
#define DEFINE_LEGACY_MOV128( ssenum, mod, sub ) \
|
||||
emitterT void SSE##ssenum##_##mod##sub##_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { x##mod##sub( xRegisterSSE(to), xRegisterSSE(from) ); } \
|
||||
emitterT void SSE##ssenum##_##mod##sub##_M128_to_XMM( x86SSERegType to, uptr from ) { x##mod##sub( xRegisterSSE(to), ptr[(void*)from]); }
|
||||
|
||||
|
||||
#define DEFINE_LEGACY_PSSD_OPCODE( mod ) \
|
||||
DEFINE_LEGACY_PSD_OPCODE( mod ) \
|
||||
DEFINE_LEGACY_SSSD_OPCODE( mod )
|
||||
|
||||
DEFINE_LEGACY_MOV_OPCODE( UPS, SSE )
|
||||
DEFINE_LEGACY_MOV_OPCODE( APS, SSE )
|
||||
DEFINE_LEGACY_MOV_OPCODE( DQA, SSE2 )
|
||||
DEFINE_LEGACY_MOV_OPCODE( DQU, SSE2 )
|
||||
|
||||
DEFINE_LEGACY_PSD_OPCODE( AND )
|
||||
DEFINE_LEGACY_PSD_OPCODE( ANDN )
|
||||
DEFINE_LEGACY_PSD_OPCODE( OR )
|
||||
DEFINE_LEGACY_PSD_OPCODE( XOR )
|
||||
|
||||
DEFINE_LEGACY_PSSD_OPCODE( SUB )
|
||||
DEFINE_LEGACY_PSSD_OPCODE( ADD )
|
||||
DEFINE_LEGACY_PSSD_OPCODE( MUL )
|
||||
DEFINE_LEGACY_PSSD_OPCODE( DIV )
|
||||
|
||||
DEFINE_LEGACY_PSSD_OPCODE( MIN )
|
||||
DEFINE_LEGACY_PSSD_OPCODE( MAX )
|
||||
|
||||
DEFINE_LEGACY_CMP_OPCODE( EQ )
|
||||
DEFINE_LEGACY_CMP_OPCODE( LT )
|
||||
DEFINE_LEGACY_CMP_OPCODE( LE )
|
||||
DEFINE_LEGACY_CMP_OPCODE( UNORD )
|
||||
DEFINE_LEGACY_CMP_OPCODE( NE )
|
||||
DEFINE_LEGACY_CMP_OPCODE( NLT )
|
||||
DEFINE_LEGACY_CMP_OPCODE( NLE )
|
||||
DEFINE_LEGACY_CMP_OPCODE( ORD )
|
||||
|
||||
DEFINE_LEGACY_SSSD_OPCODE( COMI )
|
||||
DEFINE_LEGACY_SSSD_OPCODE( UCOMI )
|
||||
DEFINE_LEGACY_RSQRT_OPCODE( RCP )
|
||||
DEFINE_LEGACY_RSQRT_OPCODE( RSQRT )
|
||||
DEFINE_LEGACY_SQRT_OPCODE( SQRT )
|
||||
|
||||
DEFINE_LEGACY_OP128( 2, PMUL, LW )
|
||||
DEFINE_LEGACY_OP128( 2, PMUL, HW )
|
||||
DEFINE_LEGACY_OP128( 2, PMUL, UDQ )
|
||||
|
||||
DEFINE_LEGACY_OP128( 2, PMAX, SW )
|
||||
DEFINE_LEGACY_OP128( 2, PMAX, UB )
|
||||
DEFINE_LEGACY_OP128( 2, PMIN, SW )
|
||||
DEFINE_LEGACY_OP128( 2, PMIN, UB )
|
||||
|
||||
DEFINE_LEGACY_OP128( 2, UNPCK, LPS )
|
||||
DEFINE_LEGACY_OP128( 2, UNPCK, HPS )
|
||||
DEFINE_LEGACY_OP128( 2, PUNPCK, LQDQ )
|
||||
DEFINE_LEGACY_OP128( 2, PUNPCK, HQDQ )
|
||||
|
||||
DEFINE_LEGACY_OP128( 2, PACK, SSWB )
|
||||
DEFINE_LEGACY_OP128( 2, PACK, SSDW )
|
||||
DEFINE_LEGACY_OP128( 2, PACK, USWB )
|
||||
|
||||
DEFINE_LEGACY_MOV128( 3, MOV, SLDUP )
|
||||
DEFINE_LEGACY_MOV128( 3, MOV, SHDUP )
|
||||
|
||||
DEFINE_LEGACY_OP128( 4, PMAX, SD )
|
||||
DEFINE_LEGACY_OP128( 4, PMIN, SD )
|
||||
DEFINE_LEGACY_OP128( 4, PMAX, UD )
|
||||
DEFINE_LEGACY_OP128( 4, PMIN, UD )
|
||||
|
||||
|
||||
emitterT void SSE_MOVAPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMOVAPS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { xMOVDQA( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE2_MOVD_M32_to_XMM( x86SSERegType to, uptr from ) { xMOVDZX( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE2_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from ) { xMOVDZX( xRegisterSSE(to), xRegister32(from) ); }
|
||||
emitterT void SSE2_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
|
||||
{
|
||||
xMOVDZX( xRegisterSSE(to), ptr[xAddressReg(from)+offset] );
|
||||
}
|
||||
|
||||
emitterT void SSE2_MOVD_XMM_to_M32( u32 to, x86SSERegType from ) { xMOVD( ptr[(void*)to], xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) { xMOVD( xRegister32(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset )
|
||||
{
|
||||
xMOVD( ptr[xAddressReg(from)+offset], xRegisterSSE(from) );
|
||||
}
|
||||
|
||||
emitterT void SSE2_MOVQ_M64_to_XMM( x86SSERegType to, uptr from ) { xMOVQZX( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE2_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMOVQZX( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from ) { xMOVQ( ptr[(void*)to], xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from) { xMOVQ( xRegisterMMX(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from) { xMOVQ( xRegisterSSE(to), xRegisterMMX(from) ); }
|
||||
|
||||
|
||||
emitterT void SSE_MOVSS_M32_to_XMM( x86SSERegType to, uptr from ) { xMOVSSZX( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE_MOVSS_XMM_to_M32( u32 to, x86SSERegType from ) { xMOVSS( ptr[(void*)to], xRegisterSSE(from) ); }
|
||||
emitterT void SSE_MOVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMOVSS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE_MOVSS_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset ) { xMOVSSZX( xRegisterSSE(to), ptr[xAddressReg(from)+offset] ); }
|
||||
emitterT void SSE_MOVSS_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset ) { xMOVSS( ptr[xAddressReg(to)+offset], xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE2_MOVSD_M32_to_XMM( x86SSERegType to, uptr from ) { xMOVSDZX( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE2_MOVSD_XMM_to_M32( u32 to, x86SSERegType from ) { xMOVSD( ptr[(void*)to], xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMOVSD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVSD_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset ) { xMOVSDZX( xRegisterSSE(to), ptr[xAddressReg(from)+offset] ); }
|
||||
emitterT void SSE2_MOVSD_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset ) { xMOVSD( ptr[xAddressReg(to)+offset], xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_MOVLPS_M64_to_XMM( x86SSERegType to, uptr from ) { xMOVL.PS( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE_MOVLPS_XMM_to_M64( u32 to, x86SSERegType from ) { xMOVL.PS( ptr[(void*)to], xRegisterSSE(from) ); }
|
||||
emitterT void SSE_MOVLPS_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset ) { xMOVL.PS( xRegisterSSE(to), ptr[xAddressReg(from)+offset] ); }
|
||||
emitterT void SSE_MOVLPS_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset ) { xMOVL.PS( ptr[xAddressReg(to)+offset], xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_MOVHPS_M64_to_XMM( x86SSERegType to, uptr from ) { xMOVH.PS( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE_MOVHPS_XMM_to_M64( u32 to, x86SSERegType from ) { xMOVH.PS( ptr[(void*)to], xRegisterSSE(from) ); }
|
||||
emitterT void SSE_MOVHPS_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset ) { xMOVH.PS( xRegisterSSE(to), ptr[xAddressReg(from)+offset] ); }
|
||||
emitterT void SSE_MOVHPS_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset ) { xMOVH.PS( ptr[xAddressReg(to)+offset], xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_MOVLHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMOVLH.PS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMOVHL.PS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_MASKMOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xMASKMOV( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_PMOVMSKB_XMM_to_R32(x86IntRegType to, x86SSERegType from) { xPMOVMSKB( xRegister32(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_SHUFPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { xSHUF.PS( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE_SHUFPS_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { xSHUF.PS( xRegisterSSE(to), ptr[(void*)from], imm8 ); }
|
||||
emitterT void SSE_SHUFPS_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset, u8 imm8 )
|
||||
{
|
||||
xSHUF.PS( xRegisterSSE(to), ptr[xAddressReg(from)+offset], imm8 );
|
||||
}
|
||||
|
||||
emitterT void SSE_SHUFPD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { xSHUF.PD( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE_SHUFPD_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { xSHUF.PD( xRegisterSSE(to), ptr[(void*)from], imm8 ); }
|
||||
|
||||
emitterT void SSE_CVTPI2PS_M64_to_XMM( x86SSERegType to, uptr from ) { xCVTPI2PS( xRegisterSSE(to), ptr64[(u64*)from] ); }
|
||||
emitterT void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from ) { xCVTPI2PS( xRegisterSSE(to), xRegisterMMX(from) ); }
|
||||
emitterT void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from ) { xCVTPS2PI( xRegisterMMX(to), ptr64[(u64*)from] ); }
|
||||
emitterT void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from ) { xCVTPS2PI( xRegisterMMX(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from) { xCVTTSS2SI( xRegister32(to), ptr32[(u32*)from] ); }
|
||||
emitterT void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from) { xCVTTSS2SI( xRegister32(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE_CVTSI2SS_M32_to_XMM(x86SSERegType to, uptr from) { xCVTSI2SS( xRegisterSSE(to), ptr32[(u32*)from] ); }
|
||||
emitterT void SSE_CVTSI2SS_R_to_XMM(x86SSERegType to, x86IntRegType from) { xCVTSI2SS( xRegisterSSE(to), xRegister32(from) ); }
|
||||
|
||||
emitterT void SSE2_CVTSS2SD_M32_to_XMM( x86SSERegType to, uptr from) { xCVTSS2SD( xRegisterSSE(to), ptr32[(u32*)from] ); }
|
||||
emitterT void SSE2_CVTSS2SD_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { xCVTSS2SD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_CVTSD2SS_M64_to_XMM( x86SSERegType to, uptr from) { xCVTSD2SS( xRegisterSSE(to), ptr64[(u64*)from] ); }
|
||||
emitterT void SSE2_CVTSD2SS_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { xCVTSD2SS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from ) { xCVTDQ2PS( xRegisterSSE(to), ptr128[(u128*)from] ); }
|
||||
emitterT void SSE2_CVTDQ2PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCVTDQ2PS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_CVTPS2DQ_M128_to_XMM( x86SSERegType to, uptr from ) { xCVTPS2DQ( xRegisterSSE(to), ptr128[(u128*)from] ); }
|
||||
emitterT void SSE2_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCVTPS2DQ( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE2_CVTTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xCVTTPS2DQ( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ) { xPMAX.SW( xRegisterMMX(to), xRegisterMMX(from) ); }
|
||||
emitterT void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ) { xPMAX.SW( xRegisterMMX(to), xRegisterMMX(from) ); }
|
||||
|
||||
emitterT void SSE2_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { xPSHUF.D( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE2_PSHUFD_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { xPSHUF.D( xRegisterSSE(to), ptr[(void*)from], imm8 ); }
|
||||
emitterT void SSE2_PSHUFLW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { xPSHUF.LW( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE2_PSHUFLW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { xPSHUF.LW( xRegisterSSE(to), ptr[(void*)from], imm8 ); }
|
||||
emitterT void SSE2_PSHUFHW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { xPSHUF.HW( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE2_PSHUFHW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { xPSHUF.HW( xRegisterSSE(to), ptr[(void*)from], imm8 ); }
|
||||
|
||||
emitterT void SSE_UNPCKLPS_M128_to_XMM( x86SSERegType to, uptr from ) { xUNPCK.LPS( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE_UNPCKLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xUNPCK.LPS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE_UNPCKHPS_M128_to_XMM( x86SSERegType to, uptr from ) { xUNPCK.HPS( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
emitterT void SSE_UNPCKHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { xUNPCK.HPS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_MOVMSKPS_XMM_to_R32(x86IntRegType to, x86SSERegType from) { xMOVMSKPS( xRegister32(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE2_MOVMSKPD_XMM_to_R32(x86IntRegType to, x86SSERegType from) { xMOVMSKPD( xRegister32(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSSE3_PABSB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPABS.B( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSSE3_PABSW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPABS.W( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSSE3_PABSD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPABS.D( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSSE3_PSIGNB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPSIGN.B( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSSE3_PSIGNW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPSIGN.W( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSSE3_PSIGND_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPSIGN.D( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE_PEXTRW_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8 ) { xPEXTR.W( xRegister32(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE_PINSRW_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8 ) { xPINSR.W( xRegisterSSE(to), xRegister32(from), imm8 ); }
|
||||
|
||||
emitterT void SSE2_PMADDWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPMADD.WD( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
|
||||
emitterT void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xHADD.PS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from) { xHADD.PS( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
|
||||
emitterT void SSE4_PINSRD_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8) { xPINSR.D( xRegisterSSE(to), xRegister32(from), imm8 ); }
|
||||
|
||||
emitterT void SSE4_INSERTPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8) { xINSERTPS( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE4_EXTRACTPS_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8) { xEXTRACTPS( xRegister32(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE4_EXTRACTPS_XMM_to_M32(uptr to, x86SSERegType from, u8 imm8) { xEXTRACTPS( ptr32[(u32*)to], xRegisterSSE(from), imm8 ); }
|
||||
|
||||
emitterT void SSE4_DPPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8) { xDP.PS( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE4_DPPS_M128_to_XMM(x86SSERegType to, uptr from, u8 imm8) { xDP.PS( xRegisterSSE(to), ptr[(void*)from], imm8 ); }
|
||||
|
||||
emitterT void SSE4_BLENDPS_XMM_to_XMM(x86IntRegType to, x86SSERegType from, u8 imm8) { xBLEND.PS( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
|
||||
emitterT void SSE4_BLENDVPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xBLEND.VPS( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE4_BLENDVPS_M128_to_XMM(x86SSERegType to, uptr from) { xBLEND.VPS( xRegisterSSE(to), ptr[(void*)from] ); }
|
||||
|
||||
emitterT void SSE4_PMOVSXDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPMOVSX.DQ( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE4_PMULDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPMUL.DQ( xRegisterSSE(to), xRegisterSSE(from) ); }
|
||||
emitterT void SSE4_PTEST_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPTEST(xRegisterSSE(to), xRegisterSSE(from)); }
|
||||
|
||||
emitterT void SSE_LDMXCSR( uptr from ) { xLDMXCSR( ptr32[(u32*)from] ); }
|
||||
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////////////
|
||||
// SSE-X Helpers (generates either INT or FLOAT versions of certain SSE instructions)
|
||||
//
|
||||
// Added AlwaysUseMovaps check to the relevant functions here, which helps reduce the
|
||||
// overhead of dynarec instructions that use these, even thought the same check would
|
||||
// have been done redundantly by the emitter function.
|
||||
|
||||
emitterT void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQA_M128_to_XMM(to, from);
|
||||
else SSE_MOVAPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_M128(to, from);
|
||||
else SSE_MOVAPS_XMM_to_M128(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_XMM(to, from);
|
||||
else SSE_MOVAPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVDQARmtoR( x86SSERegType to, x86IntRegType from, int offset )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQARmtoR(to, from, offset);
|
||||
else SSE_MOVAPSRmtoR(to, from, offset);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVDQARtoRm( x86IntRegType to, x86SSERegType from, int offset )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQARtoRm(to, from, offset);
|
||||
else SSE_MOVAPSRtoRm(to, from, offset);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQU_M128_to_XMM(to, from);
|
||||
else SSE_MOVUPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from )
|
||||
{
|
||||
if( !AlwaysUseMovaps && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_M128(to, from);
|
||||
else SSE_MOVUPS_XMM_to_M128(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_M32_to_XMM(to, from);
|
||||
else SSE_MOVSS_M32_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_M32(to, from);
|
||||
else SSE_MOVSS_XMM_to_M32(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_Rm_to_XMM(to, from, offset);
|
||||
else SSE_MOVSS_Rm_to_XMM(to, from, offset);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from, int offset )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_Rm(to, from, offset);
|
||||
else SSE_MOVSS_XMM_to_Rm(to, from, offset);
|
||||
}
|
||||
|
||||
emitterT void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_POR_M128_to_XMM(to, from);
|
||||
else SSE_ORPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_POR_XMM_to_XMM(to, from);
|
||||
else SSE_ORPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PXOR_M128_to_XMM(to, from);
|
||||
else SSE_XORPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PXOR_XMM_to_XMM(to, from);
|
||||
else SSE_XORPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PAND_M128_to_XMM(to, from);
|
||||
else SSE_ANDPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PAND_XMM_to_XMM(to, from);
|
||||
else SSE_ANDPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from )
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PANDN_M128_to_XMM(to, from);
|
||||
else SSE_ANDNPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PANDN_XMM_to_XMM(to, from);
|
||||
else SSE_ANDNPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from)
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKLDQ_M128_to_XMM(to, from);
|
||||
else SSE_UNPCKLPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKLDQ_XMM_to_XMM(to, from);
|
||||
else SSE_UNPCKLPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from)
|
||||
{
|
||||
if( g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKHDQ_M128_to_XMM(to, from);
|
||||
else SSE_UNPCKHPS_M128_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKHDQ_XMM_to_XMM(to, from);
|
||||
else SSE_UNPCKHPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
|
||||
emitterT void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
|
||||
{
|
||||
if( g_xmmtypes[from] == XMMT_INT ) {
|
||||
SSE2_PUNPCKHQDQ_XMM_to_XMM(to, from);
|
||||
if( to != from ) SSE2_PSHUFD_XMM_to_XMM(to, to, 0x4e);
|
||||
}
|
||||
else {
|
||||
SSE_MOVHLPS_XMM_to_XMM(to, from);
|
||||
}
|
||||
}
|
||||
DEFINE_LEGACY_SSSD_OPCODE( MIN )
|
||||
DEFINE_LEGACY_SSSD_OPCODE( MAX )
|
||||
|
|
|
|||
Loading…
Reference in New Issue