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microVU: cleanup (removed old mmx vi reg caching) 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1541 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-07-18 11:57:10 +00:00
parent 73d388fc87
commit 5474df1479
4 changed files with 1 additions and 26 deletions
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2
pcsx2/x86/microVU_Alloc.inl
View File

@ -708,7 +708,6 @@ microVUt(void) mVUallocCFLAGb(mV, int reg, int fInstance) {
microVUt(void) mVUallocVIa(mV, int GPRreg, int _reg_) {
if (!_reg_) { XOR32RtoR(GPRreg, GPRreg); }
else if (isMMX(_reg_)) { MOVD32MMXtoR(GPRreg, mmVI(_reg_)); }
else { MOVZX32Rm16toR(GPRreg, gprR, (_reg_ - 9) * 16); }
}
@ -719,7 +718,6 @@ microVUt(void) mVUallocVIb(mV, int GPRreg, int _reg_) {
MOV32ItoR(gprR, Roffset);
}
if (_reg_ == 0) { return; }
else if (isMMX(_reg_)) { MOVD32RtoMMX(mmVI(_reg_), GPRreg); }
else if (_reg_ < 16) { MOV16RtoRm(gprR, GPRreg, (_reg_ - 9) * 16); }
}

9
pcsx2/x86/microVU_Execute.inl
View File

@ -75,10 +75,6 @@ void mVUdispatcherA(mV) {
SSE_MOVAPS_M128_to_XMM(xmmPQ, (uptr)&mVU->regs->VI[REG_Q].UL);
SSE_SHUFPS_XMM_to_XMM(xmmPQ, xmmT1, 0); // wzyx = PPQQ
for (int i = 1; i < 16; i++) {
if (isMMX(i)) { MOVQMtoR(mmVI(i), (uptr)&mVU->regs->VI[i].UL); }
}
// Jump to Recompiled Code Block
JMPR(EAX);
}
@ -93,10 +89,6 @@ void mVUdispatcherB(mV) {
// Save Regs (Other Regs Saved in mVUcompile)
SSE_MOVAPS_XMM_to_M128((uptr)&mVU->regs->ACC.UL[0], xmmACC);
for (int i = 1; i < 16; i++) {
if (isMMX(i)) { MOVDMMXtoM((uptr)&mVU->regs->VI[i].UL, mmVI(i)); }
}
// __fastcall = The first two DWORD or smaller arguments are passed in ECX and EDX registers; all other arguments are passed right to left.
if (!isVU1) { CALLFunc((uptr)mVUcleanUpVU0); }
else { CALLFunc((uptr)mVUcleanUpVU1); }
@ -107,7 +99,6 @@ void mVUdispatcherB(mV) {
POP32R(EBP);
POP32R(EBX);
if (isMMX(1)) EMMS();
RET();
mVUcacheCheck(x86Ptr, mVU->cache, 0x1000);

3
pcsx2/x86/microVU_Lower.inl
View File

@ -666,11 +666,10 @@ mVUop(mVU_ISUB) {
SUB16RtoR(gprT1, gprT2);
mVUallocVIb(mVU, gprT1, _Id_);
}
else if (!isMMX(_Id_)) {
else {
XOR32RtoR(gprT1, gprT1);
mVUallocVIb(mVU, gprT1, _Id_);
}
else { PXORRtoR(mmVI(_Id_), mmVI(_Id_)); }
}
pass3 { mVUlog("ISUB vi%02d, vi%02d, vi%02d", _Fd_, _Fs_, _Ft_); }
}

13
pcsx2/x86/microVU_Misc.h
View File

@ -124,15 +124,6 @@ declareAllVariables
#define xmmT2 6 // Temp Reg?
#define xmmPQ 7 // Holds the Value and Backup Values of P and Q regs
#define mmxVI1 0 // Holds VI 1
#define mmxVI2 1 // Holds VI 2
#define mmxVI3 2 // Holds VI 3
#define mmxVI4 3 // Holds VI 4
#define mmxVI5 4 // Holds VI 5
#define mmxVI6 5 // Holds VI 6
#define mmxVI7 6 // Holds VI 7
#define mmxVI8 7 // Holds VI 8
#define gprT1 0 // Temp Reg
#define gprT2 1 // Temp Reg
#define gprR 2 // VI Reg Offset
@ -241,10 +232,6 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
#define mVUlogQ() { mVUlog(", Q"); }
#define mVUlogCLIP() { mVUlog("w.xyz vf%02d, vf%02dw", _Fs_, _Ft_); }
// Store VI regs in mmx regs?
#define isMMX(_VIreg_) 0 //(_VIreg_ >= 1 && _VIreg_ <=8)
#define mmVI(_VIreg_) (_VIreg_ - 1)
// Debug Stuff...
#ifdef mVUdebug
#define mVUprint Console::Status