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Merge pull request #155 from Kingcom/Debugger 

Check for alignment when accessing memory with the debugger
This commit is contained in:
Pseudonym 2014-07-19 00:36:15 +01:00
parent 455a20d852 b23062c54a
commit 41d12130c2
4 changed files with 53 additions and 8 deletions
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20
pcsx2/DebugTools/DebugInterface.cpp
View File

@ -206,22 +206,31 @@ bool DebugInterface::parseExpression(PostfixExpression& exp, u64& dest)
u32 R5900DebugInterface::read8(u32 address)
{
if (!isValidAddress(address))
return -1;
return memRead8(address);
}
u32 R5900DebugInterface::read16(u32 address)
{
if (!isValidAddress(address) || address % 2)
return -1;
return memRead16(address);
}
u32 R5900DebugInterface::read32(u32 address)
{
if (!isValidAddress(address) || address % 4)
return -1;
return memRead32(address);
}
u64 R5900DebugInterface::read64(u32 address)
{
if (!isValidAddress(address))
if (!isValidAddress(address) || address % 8)
return -1;
u64 result;
@ -231,10 +240,13 @@ u64 R5900DebugInterface::read64(u32 address)
u128 R5900DebugInterface::read128(u32 address)
{
if (!isValidAddress(address))
return u128::From32(-1);
__aligned16 u128 result;
if (!isValidAddress(address) || address % 16)
{
result.hi = result.lo = -1;
return result;
}
memRead128(address,result);
return result;
}

13
pcsx2/DebugTools/MIPSAnalyst.cpp
View File

@ -317,26 +317,35 @@ namespace MIPSAnalyst
size = 2;
break;
case 0x23: // lw
case 0x26: // lwr
case 0x2B: // sw
size = 4;
break;
case 0x26: // lwr
case 0x2E: // swr
size = 4;
info.lrType = LOADSTORE_RIGHT;
break;
case 0x22: // lwl
case 0x2A: // swl
size = 4;
off = -3;
info.lrType = LOADSTORE_LEFT;
break;
case 0x37: // ld
case 0x1B: // ldr
case 0x3F: // sd
size = 8;
break;
case 0x1B: // ldr
case 0x2D: // sdr
size = 8;
info.lrType = LOADSTORE_RIGHT;
break;
case 0x1A: // ldl
case 0x2C: // sdl
size = 8;
off = -7;
info.lrType = LOADSTORE_LEFT;
break;
case 0x1E: // lq
case 0x1F: // sq
size = 16;

3
pcsx2/DebugTools/MIPSAnalyst.h
View File

@ -41,6 +41,8 @@ namespace MIPSAnalyst
void ScanForFunctions(u32 startAddr, u32 endAddr, bool insertSymbols);
enum LoadStoreLRType { LOADSTORE_NORMAL, LOADSTORE_LEFT, LOADSTORE_RIGHT };
typedef struct {
DebugInterface* cpu;
u32 opcodeAddress;
@ -61,6 +63,7 @@ namespace MIPSAnalyst
// data access
bool isDataAccess;
LoadStoreLRType lrType;
int dataSize;
u32 dataAddress;

25
pcsx2/gui/Debugger/CtrlDisassemblyView.cpp
View File

@ -847,6 +847,9 @@ void CtrlDisassemblyView::updateStatusBarText()
if (!cpu->isValidAddress(line.info.dataAddress))
{
sprintf(text,"Invalid address %08X",line.info.dataAddress);
} else if (line.info.lrType == MIPSAnalyst::LOADSTORE_NORMAL && line.info.dataAddress % line.info.dataSize)
{
sprintf(text,"Unaligned address %08X",line.info.dataAddress);
} else {
switch (line.info.dataSize)
{
@ -858,7 +861,16 @@ void CtrlDisassemblyView::updateStatusBarText()
break;
case 4:
{
u32 data = cpu->read32(line.info.dataAddress);
u32 data;
if (line.info.lrType != MIPSAnalyst::LOADSTORE_NORMAL)
{
u32 address = line.info.dataAddress;
data = cpu->read32(address & ~3) >> (address & 3) * 8;
data |= cpu->read32((address + 3) & ~3) << (4 - (address & 3)) * 8;
} else {
data = cpu->read32(line.info.dataAddress);
}
const std::string addressSymbol = symbolMap.GetLabelString(data);
if (!addressSymbol.empty())
{
@ -870,7 +882,16 @@ void CtrlDisassemblyView::updateStatusBarText()
}
case 8:
{
u64 data = cpu->read64(line.info.dataAddress);
u64 data;
if (line.info.lrType != MIPSAnalyst::LOADSTORE_NORMAL)
{
u32 address = line.info.dataAddress;
data = cpu->read64(address & ~7) >> (address & 7) * 8;
data |= cpu->read64((address + 7) & ~7) << (8 - (address & 7)) * 8;
} else {
data = cpu->read64(line.info.dataAddress);
}
sprintf(text,"[%08X] = %016llX",line.info.dataAddress,data);
break;
}