Sif: Revert one of the changes from r2490. Rework safeDmaGetAddr.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2509 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
arcum42 2010-01-24 08:10:20 +00:00
parent 60987c08eb
commit 3c132690f5
2 changed files with 65 additions and 35 deletions

View File

@ -196,7 +196,8 @@ union tDMA_QWC {
void reset() { _u32 = 0; }
wxString desc() { return wxsFormat(L"QWC: 0x%x", _u32); }
};
static __forceinline void setDmacStat(u32 num);
static __forceinline tDMA_TAG *dmaGetAddr(u32 addr);
static __forceinline void throwBusError(const char *s);
struct DMACh {
@ -226,8 +227,6 @@ struct DMACh {
bool transfer(const char *s, tDMA_TAG* ptag)
{
//chcrTransfer(ptag);
if (ptag == NULL) // Is ptag empty?
{
throwBusError(s);
@ -245,6 +244,35 @@ struct DMACh {
qwcTransfer(ptag);
}
tDMA_TAG *getAddr(u32 addr, u32 num)
{
tDMA_TAG *ptr = dmaGetAddr(addr);
if (ptr == NULL)
{
throwBusError("dmaGetAddr");
setDmacStat(num);
chcr.STR = false;
}
return ptr;
}
tDMA_TAG *DMAtransfer(u32 addr, u32 num)
{
tDMA_TAG *tag = getAddr(addr, num);
if (tag == NULL) return NULL;
chcrTransfer(tag);
qwcTransfer(tag);
return tag;
}
tDMA_TAG dma_tag()
{
return DMA_TAG(chcr._u32);
}
wxString cmq_to_str()
{
return wxsFormat(L"chcr = %lx, madr = %lx, qwc = %lx", chcr._u32, madr, qwc);
@ -543,7 +571,7 @@ struct INTCregisters
u32 padding[3];
tINTC_MASK mask;
};
#define dmacRegs ((DMACregisters*)(PS2MEM_HW+0xE000))
#define intcRegs ((INTCregisters*)(PS2MEM_HW+0xF000))
@ -553,6 +581,13 @@ static __forceinline void throwBusError(const char *s)
dmacRegs->stat.BEIS = true;
}
static __forceinline void setDmacStat(u32 num)
{
dmacRegs->stat.set_flags(1 << num);
}
static __forceinline bool inScratchpad(u32 addr)
{
return ((addr >=0x70000000) && (addr <= 0x70003fff));
@ -583,22 +618,6 @@ static __forceinline tDMA_TAG *dmaGetAddr(u32 addr)
return ptr;
}
static __forceinline tDMA_TAG *safeDmaGetAddr(DMACh *dma, u32 addr, u32 num)
{
tDMA_TAG *ptr = dmaGetAddr(addr);
if (ptr == NULL)
{
// DMA Error
dmacRegs->stat.BEIS = true; // BUS Error
// DMA End
dmacRegs->stat.set_flags(1 << num);
dma->chcr.STR = false;
}
return ptr;
}
void hwIntcIrq(int n);
void hwDmacIrq(int n);

View File

@ -44,8 +44,12 @@ static __forceinline bool SifEERead(int &cycles)
//SIF_LOG(" EE SIF doing transfer %04Xqw to %08X", readSize, sif0dma->madr);
SIF_LOG("----------- %lX of %lX", readSize << 2, sif0dma->qwc << 2);
ptag = safeDmaGetAddr(sif0dma, sif0dma->madr, DMAC_SIF0);
if (ptag == NULL) return false;
ptag = sif0dma->getAddr(sif0dma->madr, DMAC_SIF0);
if (ptag == NULL)
{
DevCon.Warning("SIFEERead: ptag == NULL");
return false;
}
sif0.fifo.read((u32*)ptag, readSize << 2);
@ -61,14 +65,19 @@ static __forceinline bool SifEERead(int &cycles)
static __forceinline bool SifEEWrite(int &cycles)
{
// There's some data ready to transfer into the fifo..
tDMA_TAG *pTag;
tDMA_TAG *ptag;
const int writeSize = min((s32)sif1dma->qwc, (FIFO_SIF_W - sif1.fifo.size) / 4);
if (writeSize == 0) { /*Console.Warning("SifEEWrite writeSize is 0"); return false;*/ }
pTag = safeDmaGetAddr(sif1dma, sif1dma->madr, DMAC_SIF1);
if (pTag == NULL) return false;
ptag = sif1dma->getAddr(sif1dma->madr, DMAC_SIF1);
if (ptag == NULL)
{
DevCon.Warning("SIFEEWrite: ptag == NULL");
return false;
}
sif1.fifo.write((u32*)pTag, writeSize << 2);
sif1.fifo.write((u32*)ptag, writeSize << 2);
sif1dma->madr += writeSize << 4;
cycles += writeSize; // fixme : BIAS is factored in above
@ -230,10 +239,12 @@ static __forceinline void SIF1EEDma(int &cycles, bool &done)
// Process DMA tag at sif1dma->tadr
done = false;
ptag = safeDmaGetAddr(sif1dma, sif1dma->tadr, DMAC_SIF1);
if (ptag == NULL) return;
sif1dma->unsafeTransfer(ptag);
ptag = sif1dma->DMAtransfer(sif1dma->tadr, DMAC_SIF1);
if (ptag == NULL)
{
DevCon.Warning("SIF1EEDma: ptag == NULL");
return;
}
if (sif1dma->chcr.TTE)
{
@ -355,6 +366,11 @@ static __forceinline void SIF0IOPDma(int &psxCycles, bool &done)
static __forceinline void SIF1IOPDma(int &psxCycles, bool &done)
{
if (sif1.counter > 0)
{
SifIOPRead(psxCycles);
}
if (sif1.counter <= 0)
{
tDMA_TAG sTag(sif1.data.data);
@ -394,11 +410,6 @@ static __forceinline void SIF1IOPDma(int &psxCycles, bool &done)
done = false;
}
}
if (sif1.counter > 0)
{
SifIOPRead(psxCycles);
}
}
// Tests if iop & ee are busy before the while statement,