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(new dmac) Sending the sio interrupts on the dma interrupt seems like a more sensible solution, but I don't know if it will actually be better or worse. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2508 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
gigaherz 2010-01-24 03:00:41 +00:00
parent 83a6898651
commit 60987c08eb
1 changed files with 5 additions and 4 deletions
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9
pcsx2/IopSio2.cpp
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@ -239,8 +239,6 @@ s32 sio2DmaRead(s32 channel, u32* tdata, u32 bytesLeft, u32* bytesProcessed)
}
}
PSX_INT(IopEvt_Dma12,read/4); // Interrupts should always occur at the end
*bytesProcessed = read;
#endif
return 0;
@ -283,8 +281,6 @@ s32 sio2DmaWrite(s32 channel, u32* tdata, u32 bytesLeft, u32* bytesProcessed)
}
}
PSX_INT(IopEvt_Dma11,written/4); // Interrupts should always occur at the end
*bytesProcessed = written;
#endif
return 0;
@ -293,6 +289,11 @@ s32 sio2DmaWrite(s32 channel, u32* tdata, u32 bytesLeft, u32* bytesProcessed)
void sio2DmaInterrupt(s32 channel)
{
#ifdef ENABLE_NEW_IOPDMA_SIO
switch(channel) // Interrupts should always occur at the end
{
case 11: PSX_INT(IopEvt_Dma11,0); break;
case 12: PSX_INT(IopEvt_Dma12,0); break;
}
#endif
}