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Merge branch 'uptr-addr'

This commit is contained in:
Gregory Hainaut 2016-01-16 18:34:27 +01:00
parent 20c8b89bb7 35568f6425
commit 38c548854e
13 changed files with 54 additions and 33 deletions
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1
common/include/x86emitter/x86types.h
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@ -696,6 +696,7 @@ template< typename T > void xWrite( T val );
bool IsByteSizeDisp() const { return is_s8( Displacement ); } bool IsByteSizeDisp() const { return is_s8( Displacement ); }
bool IsMem() const { return true; } bool IsMem() const { return true; }
bool IsReg() const { return false; } bool IsReg() const { return false; }
bool IsExtended() const { return false; } // Non sense but ease template
operator xAddressVoid() operator xAddressVoid()
{ {

21
pcsx2/MTGS.cpp
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@ -168,10 +168,17 @@ void SysMtgsThread::PostVsyncStart()
m_sem_Vsync.WaitNoCancel(); m_sem_Vsync.WaitNoCancel();
} }
struct PacketTagType union PacketTagType
{ {
u32 command; struct {
u32 data[3]; u32 command;
u32 data[3];
};
struct {
u32 _command;
u32 _data[1];
uptr pointer;
};
}; };
static void dummyIrqCallback() static void dummyIrqCallback()
@ -456,7 +463,7 @@ void SysMtgsThread::ExecuteTaskInThread()
case GS_RINGTYPE_FREEZE: case GS_RINGTYPE_FREEZE:
{ {
MTGS_FreezeData* data = (MTGS_FreezeData*)(*(uptr*)&tag.data[1]); MTGS_FreezeData* data = (MTGS_FreezeData*)tag.pointer;
int mode = tag.data[0]; int mode = tag.data[0];
data->retval = GetCorePlugins().DoFreeze( PluginId_GS, mode, data->fdata ); data->retval = GetCorePlugins().DoFreeze( PluginId_GS, mode, data->fdata );
} }
@ -486,13 +493,13 @@ void SysMtgsThread::ExecuteTaskInThread()
case GS_RINGTYPE_INIT_READ_FIFO1: case GS_RINGTYPE_INIT_READ_FIFO1:
MTGS_LOG( "(MTGS Packet Read) ringtype=Fifo1" ); MTGS_LOG( "(MTGS Packet Read) ringtype=Fifo1" );
if (GSinitReadFIFO) if (GSinitReadFIFO)
GSinitReadFIFO( (u64*)tag.data[1]); GSinitReadFIFO( (u64*)tag.pointer);
break; break;
case GS_RINGTYPE_INIT_READ_FIFO2: case GS_RINGTYPE_INIT_READ_FIFO2:
MTGS_LOG( "(MTGS Packet Read) ringtype=Fifo2, size=%d", tag.data[0] ); MTGS_LOG( "(MTGS Packet Read) ringtype=Fifo2, size=%d", tag.data[0] );
if (GSinitReadFIFO2) if (GSinitReadFIFO2)
GSinitReadFIFO2( (u64*)tag.data[1], tag.data[0]); GSinitReadFIFO2( (u64*)tag.pointer, tag.data[0]);
break; break;
#ifdef PCSX2_DEVBUILD #ifdef PCSX2_DEVBUILD
@ -823,7 +830,7 @@ void SysMtgsThread::SendPointerPacket( MTGS_RingCommand type, u32 data0, void* d
tag.command = type; tag.command = type;
tag.data[0] = data0; tag.data[0] = data0;
*(uptr*)&tag.data[1] = (uptr)data1; tag.pointer = (uptr)data1;
_FinishSimplePacket(); _FinishSimplePacket();
} }

4
pcsx2/x86/BaseblockEx.h
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@ -242,4 +242,8 @@ static void recLUT_SetPage(uptr reclut[0x10000], uptr hwlut[0x10000],
hwlut[page] = 0u - (pagebase << 16); hwlut[page] = 0u - (pagebase << 16);
} }
#ifdef __x86_64__
static_assert( sizeof(BASEBLOCK) == 8, "BASEBLOCK is not 8 bytes" );
#else
static_assert( sizeof(BASEBLOCK) == 4, "BASEBLOCK is not 4 bytes" ); static_assert( sizeof(BASEBLOCK) == 4, "BASEBLOCK is not 4 bytes" );
#endif

2
pcsx2/x86/iCore.cpp
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@ -963,7 +963,7 @@ void _freeXMMregs()
} }
} }
int _signExtendXMMtoM(u32 to, x86SSERegType from, int candestroy) int _signExtendXMMtoM(uptr to, x86SSERegType from, int candestroy)
{ {
int t0reg; int t0reg;
g_xmmtypes[from] = XMMT_INT; g_xmmtypes[from] = XMMT_INT;

6
pcsx2/x86/iCore.h
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@ -186,12 +186,12 @@ u8 _hasFreeXMMreg();
void _freeXMMregs(); void _freeXMMregs();
int _getNumXMMwrite(); int _getNumXMMwrite();
void _signExtendSFtoM(u32 mem); void _signExtendSFtoM(uptr mem);
// returns new index of reg, lower 32 bits already in mmx // returns new index of reg, lower 32 bits already in mmx
// shift is used when the data is in the top bits of the mmx reg to begin with // shift is used when the data is in the top bits of the mmx reg to begin with
// a negative shift is for sign extension // a negative shift is for sign extension
int _signExtendXMMtoM(u32 to, x86SSERegType from, int candestroy); // returns true if reg destroyed int _signExtendXMMtoM(uptr to, x86SSERegType from, int candestroy); // returns true if reg destroyed
////////////////////// //////////////////////
// Instruction Info // // Instruction Info //
@ -311,7 +311,7 @@ u8 _hasFreeMMXreg();
void _freeMMXregs(); void _freeMMXregs();
int _getNumMMXwrite(); int _getNumMMXwrite();
int _signExtendMtoMMX(x86MMXRegType to, u32 mem); int _signExtendMtoMMX(x86MMXRegType to, uptr mem);
int _signExtendGPRMMXtoMMX(x86MMXRegType to, u32 gprreg, x86MMXRegType from, u32 gprfromreg); int _signExtendGPRMMXtoMMX(x86MMXRegType to, u32 gprreg, x86MMXRegType from, u32 gprfromreg);
int _allocCheckGPRtoMMX(EEINST* pinst, int reg, int mode); int _allocCheckGPRtoMMX(EEINST* pinst, int reg, int mode);

6
pcsx2/x86/iR3000A.cpp
View File

@ -398,7 +398,8 @@ void _psxMoveGPRtoR(const xRegister32& to, int fromgpr)
} }
} }
void _psxMoveGPRtoM(u32 to, int fromgpr) #if 0
void _psxMoveGPRtoM(uptr to, int fromgpr)
{ {
if( PSX_IS_CONST1(fromgpr) ) if( PSX_IS_CONST1(fromgpr) )
xMOV(ptr32[(u32*)(to)], g_psxConstRegs[fromgpr] ); xMOV(ptr32[(u32*)(to)], g_psxConstRegs[fromgpr] );
@ -408,7 +409,9 @@ void _psxMoveGPRtoM(u32 to, int fromgpr)
xMOV(ptr[(void*)(to)], eax); xMOV(ptr[(void*)(to)], eax);
} }
} }
#endif
#if 0
void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr) void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr)
{ {
if( PSX_IS_CONST1(fromgpr) ) if( PSX_IS_CONST1(fromgpr) )
@ -419,6 +422,7 @@ void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr)
xMOV(ptr[xAddressReg(to)], eax); xMOV(ptr[xAddressReg(to)], eax);
} }
} }
#endif
void _psxFlushCall(int flushtype) void _psxFlushCall(int flushtype)
{ {

4
pcsx2/x86/iR3000A.h
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@ -49,8 +49,10 @@ void _psxFlushCall(int flushtype);
void _psxOnWriteReg(int reg); void _psxOnWriteReg(int reg);
void _psxMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr); void _psxMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr);
void _psxMoveGPRtoM(u32 to, int fromgpr); #if 0
void _psxMoveGPRtoM(uptr to, int fromgpr);
void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr); void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);
#endif
extern u32 psxpc; // recompiler pc extern u32 psxpc; // recompiler pc
extern int psxbranch; // set for branch extern int psxbranch; // set for branch

2
pcsx2/x86/iR5900.h
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@ -105,7 +105,7 @@ u32* _eeGetConstReg(int reg);
// finds where the GPR is stored and moves lower 32 bits to EAX // finds where the GPR is stored and moves lower 32 bits to EAX
void _eeMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr); void _eeMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr);
void _eeMoveGPRtoM(u32 to, int fromgpr); void _eeMoveGPRtoM(uptr to, int fromgpr);
void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr); void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr);
void eeSignExtendTo(int gpr, bool onlyupper=false); void eeSignExtendTo(int gpr, bool onlyupper=false);

4
pcsx2/x86/ix86-32/iCore-32.cpp
View File

@ -872,7 +872,7 @@ void SetFPUstate() {
} }
} }
void _signExtendSFtoM(u32 mem) void _signExtendSFtoM(uptr mem)
{ {
xLAHF(); xLAHF();
xSAR(ax, 15); xSAR(ax, 15);
@ -880,7 +880,7 @@ void _signExtendSFtoM(u32 mem)
xMOV(ptr[(void*)(mem)], eax); xMOV(ptr[(void*)(mem)], eax);
} }
int _signExtendMtoMMX(x86MMXRegType to, u32 mem) int _signExtendMtoMMX(x86MMXRegType to, uptr mem)
{ {
int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); int t0reg = _allocMMXreg(-1, MMX_TEMP, 0);

2
pcsx2/x86/ix86-32/iR5900-32.cpp
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@ -176,7 +176,7 @@ void _eeMoveGPRtoR(const xRegister32& to, int fromgpr)
} }
} }
void _eeMoveGPRtoM(u32 to, int fromgpr) void _eeMoveGPRtoM(uptr to, int fromgpr)
{ {
if( GPR_IS_CONST1(fromgpr) ) if( GPR_IS_CONST1(fromgpr) )
xMOV(ptr32[(u32*)(to)], g_cpuConstRegs[fromgpr].UL[0] ); xMOV(ptr32[(u32*)(to)], g_cpuConstRegs[fromgpr].UL[0] );

4
plugins/GSdx/GSTextureOGL.cpp
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@ -36,7 +36,7 @@ extern uint64 g_real_texture_upload_byte;
namespace PboPool { namespace PboPool {
GLuint m_pool[PBO_POOL_SIZE]; GLuint m_pool[PBO_POOL_SIZE];
uint32 m_offset[PBO_POOL_SIZE]; uptr m_offset[PBO_POOL_SIZE];
char* m_map[PBO_POOL_SIZE]; char* m_map[PBO_POOL_SIZE];
uint32 m_current_pbo = 0; uint32 m_current_pbo = 0;
uint32 m_size; uint32 m_size;
@ -132,7 +132,7 @@ namespace PboPool {
} }
} }
uint32 Offset() { uptr Offset() {
return m_offset[m_current_pbo]; return m_offset[m_current_pbo];
} }

2
plugins/GSdx/GSTextureOGL.h
View File

@ -31,7 +31,7 @@ namespace PboPool {
char* Map(uint32 size); char* Map(uint32 size);
void Unmap(); void Unmap();
uint32 Offset(); uptr Offset();
void EndTransfer(); void EndTransfer();
void Init(); void Init();

29
plugins/GSdx/stdafx.h
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@ -120,10 +120,6 @@ using namespace std;
using namespace stdext; using namespace stdext;
#endif #endif
#ifdef __linux__
#include <sys/stat.h> // mkdir
#endif
#ifdef _WINDOWS #ifdef _WINDOWS
// Note use GL/glcorearb.h on the future // Note use GL/glcorearb.h on the future
@ -195,6 +191,8 @@ using namespace stdext;
#include <GL/glext.h> #include <GL/glext.h>
#include "GLLoader.h" #include "GLLoader.h"
#include <sys/stat.h> // mkdir
#define DIRECTORY_SEPARATOR '/' #define DIRECTORY_SEPARATOR '/'
#endif #endif
@ -206,6 +204,8 @@ using namespace stdext;
#define EXPORT_C_(type) extern "C" __declspec(dllexport) type __stdcall #define EXPORT_C_(type) extern "C" __declspec(dllexport) type __stdcall
#define EXPORT_C EXPORT_C_(void) #define EXPORT_C EXPORT_C_(void)
#define ALIGN_STACK(n) __aligned(int, n) __dummy;
#else #else
#define __aligned(t, n) t __attribute__((aligned(n))) #define __aligned(t, n) t __attribute__((aligned(n)))
@ -221,8 +221,18 @@ using namespace stdext;
// #define __forceinline __inline__ __attribute__((__always_inline__,__gnu_inline__)) // #define __forceinline __inline__ __attribute__((__always_inline__,__gnu_inline__))
#define __assume(c) do { if (!(c)) __builtin_unreachable(); } while(0) #define __assume(c) do { if (!(c)) __builtin_unreachable(); } while(0)
// GCC removes the variable as dead code and generates some warnings.
// Stack is automatically realigned due to SSE/AVX operations
#define ALIGN_STACK(n) (void)0;
#else
// TODO Check clang behavior
#define ALIGN_STACK(n) __aligned(int, n) __dummy;
#endif #endif
#endif #endif
extern string format(const char* fmt, ...); extern string format(const char* fmt, ...);
@ -236,14 +246,6 @@ struct aligned_free_second {template<class T> void operator()(T& p) {_aligned_fr
#define countof(a) (sizeof(a) / sizeof(a[0])) #define countof(a) (sizeof(a) / sizeof(a[0]))
// GCC removes the variable as dead code and generates some warnings.
// Stack is automatically realigned due to SSE/AVX operations
#ifdef __GNUC__
#define ALIGN_STACK(n) (void)0;
#else
#define ALIGN_STACK(n) __aligned(int, n) __dummy;
#endif
#ifndef RESTRICT #ifndef RESTRICT
#ifdef __INTEL_COMPILER #ifdef __INTEL_COMPILER
@ -284,7 +286,7 @@ struct aligned_free_second {template<class T> void operator()(T& p) {_aligned_fr
#endif #endif
// sse // sse
#ifdef __GNUC__ #if defined(__GNUC__) && !defined(__x86_64__)
// Convert gcc see define into GSdx (windows) define // Convert gcc see define into GSdx (windows) define
#if defined(__AVX2__) #if defined(__AVX2__)
#define _M_SSE 0x501 #define _M_SSE 0x501
@ -301,6 +303,7 @@ struct aligned_free_second {template<class T> void operator()(T& p) {_aligned_fr
#elif defined(__SSE__) #elif defined(__SSE__)
#define _M_SSE 0x100 #define _M_SSE 0x100
#endif #endif
#endif #endif
#if !defined(_M_SSE) && (!defined(_WINDOWS) || defined(_M_AMD64) || defined(_M_IX86_FP) && _M_IX86_FP >= 2) #if !defined(_M_SSE) && (!defined(_WINDOWS) || defined(_M_AMD64) || defined(_M_IX86_FP) && _M_IX86_FP >= 2)