diff --git a/common/include/x86emitter/x86types.h b/common/include/x86emitter/x86types.h
index 3d00a3fc2a..9932865e45 100644
--- a/common/include/x86emitter/x86types.h
+++ b/common/include/x86emitter/x86types.h
@@ -696,6 +696,7 @@ template< typename T > void xWrite( T val );
 		bool IsByteSizeDisp() const { return is_s8( Displacement ); }
 		bool IsMem() const			{ return true; }
 		bool IsReg() const			{ return false; }
+		bool IsExtended() const		{ return false; } // Non sense but ease template
 
 		operator xAddressVoid()
 		{
diff --git a/pcsx2/MTGS.cpp b/pcsx2/MTGS.cpp
index 7abad90e45..7e1b106c86 100644
--- a/pcsx2/MTGS.cpp
+++ b/pcsx2/MTGS.cpp
@@ -168,10 +168,17 @@ void SysMtgsThread::PostVsyncStart()
 	m_sem_Vsync.WaitNoCancel();
 }
 
-struct PacketTagType
+union PacketTagType
 {
-	u32 command;
-	u32 data[3];
+	struct {
+		u32 command;
+		u32 data[3];
+	};
+	struct {
+		u32 _command;
+		u32 _data[1];
+		uptr pointer;
+	};
 };
 
 static void dummyIrqCallback()
@@ -456,7 +463,7 @@ void SysMtgsThread::ExecuteTaskInThread()
 
 						case GS_RINGTYPE_FREEZE:
 						{
-							MTGS_FreezeData* data = (MTGS_FreezeData*)(*(uptr*)&tag.data[1]);
+							MTGS_FreezeData* data = (MTGS_FreezeData*)tag.pointer;
 							int mode = tag.data[0];
 							data->retval = GetCorePlugins().DoFreeze( PluginId_GS, mode, data->fdata );
 						}
@@ -486,13 +493,13 @@ void SysMtgsThread::ExecuteTaskInThread()
 						case GS_RINGTYPE_INIT_READ_FIFO1:
 							MTGS_LOG( "(MTGS Packet Read) ringtype=Fifo1" );
 							if (GSinitReadFIFO)
-								GSinitReadFIFO( (u64*)tag.data[1]);
+								GSinitReadFIFO( (u64*)tag.pointer);
 						break;
 
 						case GS_RINGTYPE_INIT_READ_FIFO2:
 							MTGS_LOG( "(MTGS Packet Read) ringtype=Fifo2, size=%d", tag.data[0] );
 							if (GSinitReadFIFO2)
-								GSinitReadFIFO2( (u64*)tag.data[1], tag.data[0]);
+								GSinitReadFIFO2( (u64*)tag.pointer, tag.data[0]);
 						break;
 
 #ifdef PCSX2_DEVBUILD
@@ -823,7 +830,7 @@ void SysMtgsThread::SendPointerPacket( MTGS_RingCommand type, u32 data0, void* d
 
 	tag.command = type;
 	tag.data[0] = data0;
-	*(uptr*)&tag.data[1] = (uptr)data1;
+	tag.pointer = (uptr)data1;
 
 	_FinishSimplePacket();
 }
diff --git a/pcsx2/x86/BaseblockEx.h b/pcsx2/x86/BaseblockEx.h
index 8460bbf6c0..44c29a55fb 100644
--- a/pcsx2/x86/BaseblockEx.h
+++ b/pcsx2/x86/BaseblockEx.h
@@ -242,4 +242,8 @@ static void recLUT_SetPage(uptr reclut[0x10000], uptr hwlut[0x10000],
 		hwlut[page] = 0u - (pagebase << 16);
 }
 
+#ifdef __x86_64__
+static_assert( sizeof(BASEBLOCK) == 8, "BASEBLOCK is not 8 bytes" );
+#else
 static_assert( sizeof(BASEBLOCK) == 4, "BASEBLOCK is not 4 bytes" );
+#endif
diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp
index d4f5414019..f4102808dc 100644
--- a/pcsx2/x86/iCore.cpp
+++ b/pcsx2/x86/iCore.cpp
@@ -963,7 +963,7 @@ void _freeXMMregs()
 	}
 }
 
-int _signExtendXMMtoM(u32 to, x86SSERegType from, int candestroy)
+int _signExtendXMMtoM(uptr to, x86SSERegType from, int candestroy)
 {
 	int t0reg;
 	g_xmmtypes[from] = XMMT_INT;
diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h
index 12b663ae86..a3575423c7 100644
--- a/pcsx2/x86/iCore.h
+++ b/pcsx2/x86/iCore.h
@@ -186,12 +186,12 @@ u8 _hasFreeXMMreg();
 void _freeXMMregs();
 int _getNumXMMwrite();
 
-void _signExtendSFtoM(u32 mem);
+void _signExtendSFtoM(uptr mem);
 
 // returns new index of reg, lower 32 bits already in mmx
 // shift is used when the data is in the top bits of the mmx reg to begin with
 // a negative shift is for sign extension
-int _signExtendXMMtoM(u32 to, x86SSERegType from, int candestroy); // returns true if reg destroyed
+int _signExtendXMMtoM(uptr to, x86SSERegType from, int candestroy); // returns true if reg destroyed
 
 //////////////////////
 // Instruction Info //
@@ -311,7 +311,7 @@ u8 _hasFreeMMXreg();
 void _freeMMXregs();
 int _getNumMMXwrite();
 
-int _signExtendMtoMMX(x86MMXRegType to, u32 mem);
+int _signExtendMtoMMX(x86MMXRegType to, uptr mem);
 int _signExtendGPRMMXtoMMX(x86MMXRegType to, u32 gprreg, x86MMXRegType from, u32 gprfromreg);
 int _allocCheckGPRtoMMX(EEINST* pinst, int reg, int mode);
 
diff --git a/pcsx2/x86/iR3000A.cpp b/pcsx2/x86/iR3000A.cpp
index de1f88b377..2ba5e2f1cf 100644
--- a/pcsx2/x86/iR3000A.cpp
+++ b/pcsx2/x86/iR3000A.cpp
@@ -398,7 +398,8 @@ void _psxMoveGPRtoR(const xRegister32& to, int fromgpr)
 	}
 }
 
-void _psxMoveGPRtoM(u32 to, int fromgpr)
+#if 0
+void _psxMoveGPRtoM(uptr to, int fromgpr)
 {
 	if( PSX_IS_CONST1(fromgpr) )
 		xMOV(ptr32[(u32*)(to)], g_psxConstRegs[fromgpr] );
@@ -408,7 +409,9 @@ void _psxMoveGPRtoM(u32 to, int fromgpr)
 		xMOV(ptr[(void*)(to)], eax);
 	}
 }
+#endif
 
+#if 0
 void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr)
 {
 	if( PSX_IS_CONST1(fromgpr) )
@@ -419,6 +422,7 @@ void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr)
 		xMOV(ptr[xAddressReg(to)], eax);
 	}
 }
+#endif
 
 void _psxFlushCall(int flushtype)
 {
diff --git a/pcsx2/x86/iR3000A.h b/pcsx2/x86/iR3000A.h
index d880cd78b8..d85391f4c5 100644
--- a/pcsx2/x86/iR3000A.h
+++ b/pcsx2/x86/iR3000A.h
@@ -49,8 +49,10 @@ void _psxFlushCall(int flushtype);
 void _psxOnWriteReg(int reg);
 
 void _psxMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr);
-void _psxMoveGPRtoM(u32 to, int fromgpr);
+#if 0
+void _psxMoveGPRtoM(uptr to, int fromgpr);
 void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);
+#endif
 
 extern u32 psxpc;			// recompiler pc
 extern int psxbranch;		// set for branch
diff --git a/pcsx2/x86/iR5900.h b/pcsx2/x86/iR5900.h
index 28ef0fa136..bb5c6ed937 100644
--- a/pcsx2/x86/iR5900.h
+++ b/pcsx2/x86/iR5900.h
@@ -105,7 +105,7 @@ u32* _eeGetConstReg(int reg);
 
 // finds where the GPR is stored and moves lower 32 bits to EAX
 void _eeMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr);
-void _eeMoveGPRtoM(u32 to, int fromgpr);
+void _eeMoveGPRtoM(uptr to, int fromgpr);
 void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr);
 void eeSignExtendTo(int gpr, bool onlyupper=false);
 
diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp
index d41c57aab0..5711ba8b4f 100644
--- a/pcsx2/x86/ix86-32/iCore-32.cpp
+++ b/pcsx2/x86/ix86-32/iCore-32.cpp
@@ -872,7 +872,7 @@ void SetFPUstate() {
 	}
 }
 
-void _signExtendSFtoM(u32 mem)
+void _signExtendSFtoM(uptr mem)
 {
 	xLAHF();
 	xSAR(ax, 15);
@@ -880,7 +880,7 @@ void _signExtendSFtoM(u32 mem)
 	xMOV(ptr[(void*)(mem)], eax);
 }
 
-int _signExtendMtoMMX(x86MMXRegType to, u32 mem)
+int _signExtendMtoMMX(x86MMXRegType to, uptr mem)
 {
 	int t0reg = _allocMMXreg(-1, MMX_TEMP, 0);
 
diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp
index 8cb340c409..402c795d68 100644
--- a/pcsx2/x86/ix86-32/iR5900-32.cpp
+++ b/pcsx2/x86/ix86-32/iR5900-32.cpp
@@ -176,7 +176,7 @@ void _eeMoveGPRtoR(const xRegister32& to, int fromgpr)
 	}
 }
 
-void _eeMoveGPRtoM(u32 to, int fromgpr)
+void _eeMoveGPRtoM(uptr to, int fromgpr)
 {
 	if( GPR_IS_CONST1(fromgpr) )
 		xMOV(ptr32[(u32*)(to)], g_cpuConstRegs[fromgpr].UL[0] );
diff --git a/plugins/GSdx/GSTextureOGL.cpp b/plugins/GSdx/GSTextureOGL.cpp
index 3041827735..6968fce4cd 100644
--- a/plugins/GSdx/GSTextureOGL.cpp
+++ b/plugins/GSdx/GSTextureOGL.cpp
@@ -36,7 +36,7 @@ extern uint64 g_real_texture_upload_byte;
 namespace PboPool {
 
 	GLuint m_pool[PBO_POOL_SIZE];
-	uint32 m_offset[PBO_POOL_SIZE];
+	uptr m_offset[PBO_POOL_SIZE];
 	char*  m_map[PBO_POOL_SIZE];
 	uint32 m_current_pbo = 0;
 	uint32 m_size;
@@ -132,7 +132,7 @@ namespace PboPool {
 		}
 	}
 
-	uint32 Offset() {
+	uptr Offset() {
 		return m_offset[m_current_pbo];
 	}
 
diff --git a/plugins/GSdx/GSTextureOGL.h b/plugins/GSdx/GSTextureOGL.h
index f1207f9f17..1050907273 100644
--- a/plugins/GSdx/GSTextureOGL.h
+++ b/plugins/GSdx/GSTextureOGL.h
@@ -31,7 +31,7 @@ namespace PboPool {
 
 	char* Map(uint32 size);
 	void Unmap();
-	uint32 Offset();
+	uptr Offset();
 	void EndTransfer();
 
 	void Init();
diff --git a/plugins/GSdx/stdafx.h b/plugins/GSdx/stdafx.h
index 7c80d746cd..e9c49a5c40 100644
--- a/plugins/GSdx/stdafx.h
+++ b/plugins/GSdx/stdafx.h
@@ -120,10 +120,6 @@ using namespace std;
 using namespace stdext;
 #endif
 
-#ifdef __linux__
-#include <sys/stat.h> // mkdir
-#endif
-
 #ifdef _WINDOWS
 
 	// Note use GL/glcorearb.h on the future
@@ -195,6 +191,8 @@ using namespace stdext;
 	#include <GL/glext.h>
 	#include "GLLoader.h"
 
+	#include <sys/stat.h> // mkdir
+
 	#define DIRECTORY_SEPARATOR '/'
 
 #endif
@@ -206,6 +204,8 @@ using namespace stdext;
     #define EXPORT_C_(type) extern "C" __declspec(dllexport) type __stdcall
     #define EXPORT_C EXPORT_C_(void)
 
+    #define ALIGN_STACK(n) __aligned(int, n) __dummy;
+
 #else
 
     #define __aligned(t, n) t __attribute__((aligned(n)))
@@ -221,8 +221,18 @@ using namespace stdext;
         // #define __forceinline __inline__ __attribute__((__always_inline__,__gnu_inline__))
         #define __assume(c) do { if (!(c)) __builtin_unreachable(); } while(0)
 
+        // GCC removes the variable as dead code and generates some warnings.
+        // Stack is automatically realigned due to SSE/AVX operations
+        #define ALIGN_STACK(n) (void)0;
+
+    #else
+
+        // TODO Check clang behavior
+        #define ALIGN_STACK(n) __aligned(int, n) __dummy;
+
     #endif
 
+
 #endif
 
 extern string format(const char* fmt, ...);
@@ -236,14 +246,6 @@ struct aligned_free_second {template<class T> void operator()(T& p) {_aligned_fr
 
 #define countof(a) (sizeof(a) / sizeof(a[0]))
 
-// GCC removes the variable as dead code and generates some warnings.
-// Stack is automatically realigned due to SSE/AVX operations
-#ifdef __GNUC__
-#define ALIGN_STACK(n) (void)0;
-#else
-#define ALIGN_STACK(n) __aligned(int, n) __dummy;
-#endif
-
 #ifndef RESTRICT
 
     #ifdef __INTEL_COMPILER
@@ -284,7 +286,7 @@ struct aligned_free_second {template<class T> void operator()(T& p) {_aligned_fr
 #endif
 
 // sse
-#ifdef __GNUC__
+#if defined(__GNUC__) && !defined(__x86_64__)
 // Convert gcc see define into GSdx (windows) define
 #if defined(__AVX2__)
 	#define _M_SSE 0x501
@@ -301,6 +303,7 @@ struct aligned_free_second {template<class T> void operator()(T& p) {_aligned_fr
 #elif defined(__SSE__)
 	#define _M_SSE 0x100
 #endif
+
 #endif
 
 #if !defined(_M_SSE) && (!defined(_WINDOWS) || defined(_M_AMD64) || defined(_M_IX86_FP) && _M_IX86_FP >= 2)