mirror of https://github.com/PCSX2/pcsx2.git
minor cleanups (no functional changes)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2455 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
parent
b26d7fad2f
commit
3780b67ea8
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@ -16,164 +16,77 @@
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#include "PrecompiledHeader.h"
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "Common.h"
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#include <cmath>
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#include "Vif.h"
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#include "Vif.h"
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#include "VifDma_internal.h"
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#include "VifDma_internal.h"
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enum UnpackOffset
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enum UnpackOffset {
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{
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OFFSET_X = 0,
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OFFSET_X = 0,
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OFFSET_Y = 1,
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OFFSET_Y = 1,
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OFFSET_Z = 2,
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OFFSET_Z = 2,
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OFFSET_W = 3
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OFFSET_W = 3
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};
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};
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static __forceinline u32 setVifRowRegs(u32 reg, u32 data)
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static __forceinline u32 setVifRowRegs(u32 reg, u32 data) {
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{
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switch (reg) {
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switch (reg)
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case 0: vifRegs->r0 = data; break;
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{
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case 1: vifRegs->r1 = data; break;
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case 0:
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case 2: vifRegs->r2 = data; break;
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vifRegs->r0 = data;
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case 3: vifRegs->r3 = data; break;
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break;
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jNO_DEFAULT;
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case 1:
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vifRegs->r1 = data;
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break;
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case 2:
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vifRegs->r2 = data;
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break;
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case 3:
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vifRegs->r3 = data;
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break;
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jNO_DEFAULT;
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}
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}
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return data;
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return data;
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}
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}
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static __forceinline u32 getVifRowRegs(u32 reg)
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static __forceinline u32 getVifRowRegs(u32 reg) {
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{
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switch (reg) {
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switch (reg)
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case 0: return vifRegs->r0; break;
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{
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case 1: return vifRegs->r1; break;
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case 0:
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case 2: return vifRegs->r2; break;
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return vifRegs->r0;
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case 3: return vifRegs->r3; break;
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break;
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jNO_DEFAULT;
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case 1:
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return vifRegs->r1;
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break;
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case 2:
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return vifRegs->r2;
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break;
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case 3:
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return vifRegs->r3;
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break;
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jNO_DEFAULT;
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}
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}
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return 0; // unreachable...
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return 0; // unreachable...
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}
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}
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static __forceinline u32 setVifColRegs(u32 reg, u32 data)
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static __forceinline u32 getVifColRegs(u32 reg) {
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{
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switch (reg) {
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switch (reg)
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case 0: return vifRegs->c0; break;
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{
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case 1: return vifRegs->c1; break;
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case 0:
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case 2: return vifRegs->c2; break;
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vifRegs->c0 = data;
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default: return vifRegs->c3; break;
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break;
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case 1:
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vifRegs->c1 = data;
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break;
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case 2:
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vifRegs->c2 = data;
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break;
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case 3:
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vifRegs->c3 = data;
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break;
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jNO_DEFAULT;
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}
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}
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return data;
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return 0; // unreachable...
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}
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static __forceinline u32 getVifColRegs(u32 reg)
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{
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switch (reg)
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{
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case 0:
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return vifRegs->c0;
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break;
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case 1:
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return vifRegs->c1;
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break;
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case 2:
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return vifRegs->c2;
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break;
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case 3:
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return vifRegs->c3;
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break;
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jNO_DEFAULT;
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}
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return 0; // unreachable...
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}
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}
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template< bool doMask >
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template< bool doMask >
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static __releaseinline void writeXYZW(u32 offnum, u32 &dest, u32 data)
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static __releaseinline void writeXYZW(u32 offnum, u32 &dest, u32 data) {
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{
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int n;
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u32 vifRowReg = getVifRowRegs(offnum);
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u32 vifRowReg = getVifRowRegs(offnum);
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int n = 0;
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if (doMask)
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if (doMask) {
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{
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switch (vif->cl) {
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switch (vif->cl)
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case 0: n = (vifRegs->mask >> (offnum * 2)) & 0x3; break;
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{
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case 1: n = (vifRegs->mask >> ( 8 + (offnum * 2))) & 0x3; break;
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case 0:
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case 2: n = (vifRegs->mask >> (16 + (offnum * 2))) & 0x3; break;
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if (offnum == OFFSET_X)
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default: n = (vifRegs->mask >> (24 + (offnum * 2))) & 0x3; break;
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n = (vifRegs->mask) & 0x3;
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else
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n = (vifRegs->mask >> (offnum * 2)) & 0x3;
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break;
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case 1:
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n = (vifRegs->mask >> ( 8 + (offnum * 2))) & 0x3;
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break;
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case 2:
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n = (vifRegs->mask >> (16 + (offnum * 2))) & 0x3;
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break;
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default:
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n = (vifRegs->mask >> (24 + (offnum * 2))) & 0x3;
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break;
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}
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}
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}
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}
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else n = 0;
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switch (n)
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switch (n) {
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{
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case 0:
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case 0:
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if ((vif->cmd & 0x6F) == 0x6f)
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if ((vif->cmd & 0x6F) != 0x6f) {
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{
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switch (vifRegs->mode) {
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dest = data;
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case 1: dest = data + vifRowReg; break;
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}
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case 2: dest = setVifRowRegs(offnum, vifRowReg + data); break;
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else switch (vifRegs->mode)
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default: dest = data; break;
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{
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}
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case 1:
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dest = data + vifRowReg;
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break;
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case 2:
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// vifRowReg isn't used after this, or I would make it equal to dest here.
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dest = setVifRowRegs(offnum, vifRowReg + data);
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break;
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default:
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dest = data;
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break;
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}
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}
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else dest = data; // v4-5 Unpack Mode
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break;
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break;
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case 1:
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case 1: dest = vifRowReg; break;
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dest = vifRowReg;
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case 2: dest = getVifColRegs(vif->cl); break;
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break;
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case 3: break;
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case 2:
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dest = getVifColRegs((vif->cl > 2) ? 3 : vif->cl);
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break;
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case 3:
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break;
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}
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}
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// VIF_LOG("writeX %8.8x : Mode %d, r0 = %x, data %8.8x", *dest,vifRegs->mode,vifRegs->r0,data);
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}
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}
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template < bool doMask, class T >
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template < bool doMask, class T >
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@ -257,8 +170,8 @@ static __forceinline void __fastcall UNPACK_V3(u32 *dest, T *data, int size)
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if(vifRegs->offset == OFFSET_W)
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if(vifRegs->offset == OFFSET_W)
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{
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{
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//V3-# does some bizzare thing with alignment, every 6qw of data the W becomes 0 (strange console!)
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// V3-# does some bizarre thing with alignment, every 6qw of data the W becomes 0 (strange console!)
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//Ape Escape doesnt seem to like it tho (what the hell?) gonna have to investigate
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// Ape Escape doesn't seem to like it tho (what the hell?) gonna have to investigate
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writeXYZW<doMask>(vifRegs->offset, *dest, *data);
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writeXYZW<doMask>(vifRegs->offset, *dest, *data);
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vifRegs->offset = OFFSET_X;
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vifRegs->offset = OFFSET_X;
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}
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}
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@ -333,12 +246,12 @@ static void __fastcall fUNPACK_V4_5(u32 *dest, u32 *data)
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// to be cast as. --air
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// to be cast as. --air
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//
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//
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#define _upk (UNPACKFUNCTYPE)
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#define _upk (UNPACKFUNCTYPE)
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#define _odd (UNPACKFUNCTYPE_ODD)
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#define _odd (UNPACKFUNCTYPE_ODD)
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#define _unpk_s(bits) (UNPACKFUNCTYPE_S##bits)
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#define _unpk_s(bits) (UNPACKFUNCTYPE_S##bits)
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#define _odd_s(bits) (UNPACKFUNCTYPE_ODD_S##bits)
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#define _odd_s(bits) (UNPACKFUNCTYPE_ODD_S##bits)
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#define _unpk_u(bits) (UNPACKFUNCTYPE_U##bits)
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#define _unpk_u(bits) (UNPACKFUNCTYPE_U##bits)
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#define _odd_u(bits) (UNPACKFUNCTYPE_ODD_U##bits)
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#define _odd_u(bits) (UNPACKFUNCTYPE_ODD_U##bits)
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// 32-bits versions are unsigned-only!!
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// 32-bits versions are unsigned-only!!
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#define UnpackFuncPair32( sizefac, vt, doMask ) \
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#define UnpackFuncPair32( sizefac, vt, doMask ) \
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@ -353,40 +266,27 @@ static void __fastcall fUNPACK_V4_5(u32 *dest, u32 *data)
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(UNPACKFUNCTYPE_ODD)_odd_u(bits) UNPACK_##vt<doMask, u##bits>, \
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(UNPACKFUNCTYPE_ODD)_odd_u(bits) UNPACK_##vt<doMask, u##bits>, \
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(UNPACKFUNCTYPE_ODD)_odd_s(bits) UNPACK_##vt<doMask, s##bits>,
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(UNPACKFUNCTYPE_ODD)_odd_s(bits) UNPACK_##vt<doMask, s##bits>,
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#define UnpackFuncSet( doMask ) \
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#define UnpackFuncSet( doMask ) \
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{ UnpackFuncPair32( 4, S, doMask ) /* 0x0 - S-32 */ \
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{ UnpackFuncPair32( 4, S, doMask ) 1, 4, 4, 4 }, /* 0x0 - S-32 */ \
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1, 4, 4, 4 }, \
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{ UnpackFuncPair ( 4, S, 16, doMask ) 2, 2, 2, 4 }, /* 0x1 - S-16 */ \
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{ UnpackFuncPair ( 4, S, 16, doMask ) /* 0x1 - S-16 */ \
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{ UnpackFuncPair ( 4, S, 8, doMask ) 4, 1, 1, 4 }, /* 0x2 - S-8 */ \
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2, 2, 2, 4 }, \
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{ NULL, NULL, NULL, NULL, 0, 0, 0, 0 }, /* 0x3 (NULL) */ \
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{ UnpackFuncPair ( 4, S, 8, doMask ) /* 0x2 - S-8 */ \
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{ UnpackFuncPair32( 2, V2, doMask ) 24, 4, 8, 2 }, /* 0x4 - V2-32 */ \
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4, 1, 1, 4 }, \
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{ UnpackFuncPair ( 2, V2, 16, doMask ) 12, 2, 4, 2 }, /* 0x5 - V2-16 */ \
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{ NULL, NULL, NULL, NULL, 0, 0, 0, 0 }, /* 0x3 (NULL) */ \
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{ UnpackFuncPair ( 2, V2, 8, doMask ) 6, 1, 2, 2 }, /* 0x6 - V2-8 */ \
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\
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{ NULL, NULL, NULL, NULL,0, 0, 0, 0 }, /* 0x7 (NULL) */ \
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{ UnpackFuncPair32( 2, V2, doMask ) /* 0x4 - V2-32 */ \
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{ UnpackFuncPair32( 3, V3, doMask ) 36, 4, 12, 3 }, /* 0x8 - V3-32 */ \
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24, 4, 8, 2 }, \
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{ UnpackFuncPair ( 3, V3, 16, doMask ) 18, 2, 6, 3 }, /* 0x9 - V3-16 */ \
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{ UnpackFuncPair ( 2, V2, 16, doMask ) /* 0x5 - V2-16 */ \
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{ UnpackFuncPair ( 3, V3, 8, doMask ) 9, 1, 3, 3 }, /* 0xA - V3-8 */ \
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12, 2, 4, 2 }, \
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{ NULL, NULL, NULL, NULL,0, 0, 0, 0 }, /* 0xB (NULL) */ \
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{ UnpackFuncPair ( 2, V2, 8, doMask ) /* 0x6 - V2-8 */ \
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{ UnpackFuncPair32( 4, V4, doMask ) 48, 4, 16, 4 }, /* 0xC - V4-32 */ \
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6, 1, 2, 2 }, \
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{ UnpackFuncPair ( 4, V4, 16, doMask ) 24, 2, 8, 4 }, /* 0xD - V4-16 */ \
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{ NULL, NULL, NULL, NULL,0, 0, 0, 0 }, /* 0x7 (NULL) */ \
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{ UnpackFuncPair ( 4, V4, 8, doMask ) 12, 1, 4, 4 }, /* 0xE - V4-8 */ \
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\
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{ /* 0xF - V4-5 */ \
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{ UnpackFuncPair32( 3, V3, doMask ) /* 0x8 - V3-32 */ \
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(UNPACKFUNCTYPE)_unpk_u(32) fUNPACK_V4_5<doMask>, \
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36, 4, 12, 3 }, \
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(UNPACKFUNCTYPE)_unpk_u(32) fUNPACK_V4_5<doMask>, \
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{ UnpackFuncPair ( 3, V3, 16, doMask ) /* 0x9 - V3-16 */ \
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(UNPACKFUNCTYPE_ODD)_odd_u(32) UNPACK_V4_5<doMask>, \
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18, 2, 6, 3 }, \
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(UNPACKFUNCTYPE_ODD)_odd_u(32) UNPACK_V4_5<doMask>, \
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{ UnpackFuncPair ( 3, V3, 8, doMask ) /* 0xA - V3-8 */ \
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9, 1, 3, 3 }, \
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{ NULL, NULL, NULL, NULL,0, 0, 0, 0 }, /* 0xB (NULL) */ \
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\
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{ UnpackFuncPair32( 4, V4, doMask ) /* 0xC - V4-32 */ \
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48, 4, 16, 4 }, \
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{ UnpackFuncPair ( 4, V4, 16, doMask ) /* 0xD - V4-16 */ \
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24, 2, 8, 4 }, \
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{ UnpackFuncPair ( 4, V4, 8, doMask ) /* 0xE - V4-8 */ \
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12, 1, 4, 4 }, \
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{ /* 0xF - V4-5 */ \
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(UNPACKFUNCTYPE)_unpk_u(32) fUNPACK_V4_5<doMask>, (UNPACKFUNCTYPE)_unpk_u(32) fUNPACK_V4_5<doMask>, \
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(UNPACKFUNCTYPE_ODD)_odd_u(32) UNPACK_V4_5<doMask>, (UNPACKFUNCTYPE_ODD)_odd_u(32) UNPACK_V4_5<doMask>, \
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6, 2, 2, 4 },
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6, 2, 2, 4 },
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const __aligned16 VIFUnpackFuncTable VIFfuncTable[32] =
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const __aligned16 VIFUnpackFuncTable VIFfuncTable[32] =
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@ -97,7 +97,7 @@ struct nVifStruct {
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};
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};
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extern __aligned16 nVifStruct nVif[2];
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extern __aligned16 nVifStruct nVif[2];
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extern __aligned16 const u8 nVifT[32];
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extern __aligned16 const u8 nVifT[16];
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extern __aligned16 nVifCall nVifUpk[(2*2*16)*4]; // ([USN][Masking][Unpack Type]) [curCycle]
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extern __aligned16 nVifCall nVifUpk[(2*2*16)*4]; // ([USN][Masking][Unpack Type]) [curCycle]
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extern __aligned16 u32 nVifMask[3][4][4]; // [MaskNumber][CycleNumber][Vector]
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extern __aligned16 u32 nVifMask[3][4][4]; // [MaskNumber][CycleNumber][Vector]
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|
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@ -29,11 +29,7 @@ __aligned16 nVifStruct nVif[2];
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__aligned16 nVifCall nVifUpk[(2*2*16) *4]; // ([USN][Masking][Unpack Type]) [curCycle]
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__aligned16 nVifCall nVifUpk[(2*2*16) *4]; // ([USN][Masking][Unpack Type]) [curCycle]
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__aligned16 u32 nVifMask[3][4][4] = {0}; // [MaskNumber][CycleNumber][Vector]
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__aligned16 u32 nVifMask[3][4][4] = {0}; // [MaskNumber][CycleNumber][Vector]
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|
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// Contents of this table are doubled up for doMask(false) and doMask(true) lookups.
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__aligned16 const u8 nVifT[16] = {
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// (note: currently unused, I'm using gsize in the interp tables instead since it
|
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// seems to be faster for now, which may change when nVif isn't reliant on interpreted
|
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// unpackers anymore --air)
|
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__aligned16 const u8 nVifT[32] = {
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4, // S-32
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4, // S-32
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2, // S-16
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2, // S-16
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1, // S-8
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1, // S-8
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@ -50,9 +46,6 @@ __aligned16 const u8 nVifT[32] = {
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8, // V4-16
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8, // V4-16
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4, // V4-8
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4, // V4-8
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2, // V4-5
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2, // V4-5
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|
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// Second verse, same as the first!
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4,2,1,0,8,4,2,0,12,6,3,0,16,8,4,2
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|
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};
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};
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|
|
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// ----------------------------------------------------------------------------
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// ----------------------------------------------------------------------------
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||||||
|
@ -92,7 +85,7 @@ void initNewVif(int idx) {
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||||||
if (newVifDynaRec) dVifInit(idx);
|
if (newVifDynaRec) dVifInit(idx);
|
||||||
}
|
}
|
||||||
|
|
||||||
void closeNewVif(int idx) { if (newVifDynaRec) dVifClose(idx); }
|
void closeNewVif(int idx) { if (newVifDynaRec) dVifClose(idx); }
|
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void resetNewVif(int idx) { closeNewVif(idx); initNewVif(idx); }
|
void resetNewVif(int idx) { closeNewVif(idx); initNewVif(idx); }
|
||||||
|
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static _f u8* setVUptr(int vuidx, const u8* vuMemBase, int offset) {
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static _f u8* setVUptr(int vuidx, const u8* vuMemBase, int offset) {
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Reference in New Issue