core: use xRegisterLong instead of xRegister32

Code needs to work with xAddressReg however the x32 inheritance doesn't
exits anymore on 64 bits.

Note: it might be possible to uses some kind of autoconversion with
xRegister32or64. Could be a future improvement.
This commit is contained in:
Gregory Hainaut 2016-01-16 20:23:03 +01:00
parent 1328865279
commit 366f793cf0
9 changed files with 14 additions and 14 deletions

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@ -110,7 +110,7 @@ struct xImpl_FastCall
#endif #endif
template< typename T > __fi __always_inline_tmpl_fail template< typename T > __fi __always_inline_tmpl_fail
void operator()( T* func, const xRegister32& a1 = xEmptyReg, const xRegister32& a2 = xEmptyReg) const void operator()( T* func, const xRegisterLong& a1 = xEmptyReg, const xRegisterLong& a2 = xEmptyReg) const
{ {
#ifdef __x86_64__ #ifdef __x86_64__
if (a1.IsEmpty()) { if (a1.IsEmpty()) {
@ -132,7 +132,7 @@ struct xImpl_FastCall
} }
template< typename T > __fi __always_inline_tmpl_fail template< typename T > __fi __always_inline_tmpl_fail
void operator()( T* func, u32 a1, const xRegister32& a2) const void operator()( T* func, u32 a1, const xRegisterLong& a2) const
{ {
#ifdef __x86_64__ #ifdef __x86_64__
XFASTCALL2; XFASTCALL2;
@ -171,7 +171,7 @@ struct xImpl_FastCall
#endif #endif
} }
void operator()(const xIndirect32& func, const xRegister32& a1 = xEmptyReg, const xRegister32& a2 = xEmptyReg) const void operator()(const xIndirect32& func, const xRegisterLong& a1 = xEmptyReg, const xRegisterLong& a2 = xEmptyReg) const
{ {
#ifdef __x86_64__ #ifdef __x86_64__
if (a1.IsEmpty()) { if (a1.IsEmpty()) {

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@ -121,12 +121,12 @@ extern _x86regs x86regs[iREGCNT_GPR], s_saveX86regs[iREGCNT_GPR];
uptr _x86GetAddr(int type, int reg); uptr _x86GetAddr(int type, int reg);
void _initX86regs(); void _initX86regs();
int _getFreeX86reg(int mode); int _getFreeX86reg(int mode);
int _allocX86reg(x86Emitter::xRegister32 x86reg, int type, int reg, int mode); int _allocX86reg(x86Emitter::xRegisterLong x86reg, int type, int reg, int mode);
void _deleteX86reg(int type, int reg, int flush); void _deleteX86reg(int type, int reg, int flush);
int _checkX86reg(int type, int reg, int mode); int _checkX86reg(int type, int reg, int mode);
void _addNeededX86reg(int type, int reg); void _addNeededX86reg(int type, int reg);
void _clearNeededX86regs(); void _clearNeededX86regs();
void _freeX86reg(const x86Emitter::xRegister32& x86reg); void _freeX86reg(const x86Emitter::xRegisterLong& x86reg);
void _freeX86reg(int x86reg); void _freeX86reg(int x86reg);
void _freeX86regs(); void _freeX86regs();
void _flushCachedRegs(); void _flushCachedRegs();

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@ -388,7 +388,7 @@ void _psxDeleteReg(int reg, int flush)
_deleteX86reg(X86TYPE_PSX, reg, flush ? 0 : 2); _deleteX86reg(X86TYPE_PSX, reg, flush ? 0 : 2);
} }
void _psxMoveGPRtoR(const xRegister32& to, int fromgpr) void _psxMoveGPRtoR(const xRegisterLong& to, int fromgpr)
{ {
if( PSX_IS_CONST1(fromgpr) ) if( PSX_IS_CONST1(fromgpr) )
xMOV(to, g_psxConstRegs[fromgpr] ); xMOV(to, g_psxConstRegs[fromgpr] );

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@ -48,7 +48,7 @@ void _psxFlushCall(int flushtype);
void _psxOnWriteReg(int reg); void _psxOnWriteReg(int reg);
void _psxMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr); void _psxMoveGPRtoR(const x86Emitter::xRegisterLong& to, int fromgpr);
#if 0 #if 0
void _psxMoveGPRtoM(uptr to, int fromgpr); void _psxMoveGPRtoM(uptr to, int fromgpr);
void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr); void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);

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@ -104,7 +104,7 @@ extern u32 g_cpuHasConstReg, g_cpuFlushedConstReg;
u32* _eeGetConstReg(int reg); u32* _eeGetConstReg(int reg);
// finds where the GPR is stored and moves lower 32 bits to EAX // finds where the GPR is stored and moves lower 32 bits to EAX
void _eeMoveGPRtoR(const x86Emitter::xRegister32& to, int fromgpr); void _eeMoveGPRtoR(const x86Emitter::xRegisterLong& to, int fromgpr);
void _eeMoveGPRtoM(uptr to, int fromgpr); void _eeMoveGPRtoM(uptr to, int fromgpr);
void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr); void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr);
void eeSignExtendTo(int gpr, bool onlyupper=false); void eeSignExtendTo(int gpr, bool onlyupper=false);

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@ -243,7 +243,7 @@ void _flushConstRegs()
} }
} }
int _allocX86reg(xRegister32 x86reg, int type, int reg, int mode) int _allocX86reg(xRegisterLong x86reg, int type, int reg, int mode)
{ {
uint i; uint i;
pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." ); pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." );
@ -316,7 +316,7 @@ int _allocX86reg(xRegister32 x86reg, int type, int reg, int mode)
} }
if (x86reg.IsEmpty()) if (x86reg.IsEmpty())
x86reg = xRegister32(_getFreeX86reg(oldmode)); x86reg = xRegisterLong(_getFreeX86reg(oldmode));
else else
_freeX86reg(x86reg); _freeX86reg(x86reg);
@ -445,7 +445,7 @@ void _deleteX86reg(int type, int reg, int flush)
} }
// Temporary solution to support eax/ebx... type // Temporary solution to support eax/ebx... type
void _freeX86reg(const x86Emitter::xRegister32& x86reg) void _freeX86reg(const x86Emitter::xRegisterLong& x86reg)
{ {
_freeX86reg(x86reg.GetId()); _freeX86reg(x86reg.GetId());
} }

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@ -154,7 +154,7 @@ u32* _eeGetConstReg(int reg)
return &cpuRegs.GPR.r[ reg ].UL[0]; return &cpuRegs.GPR.r[ reg ].UL[0];
} }
void _eeMoveGPRtoR(const xRegister32& to, int fromgpr) void _eeMoveGPRtoR(const xRegisterLong& to, int fromgpr)
{ {
if( fromgpr == 0 ) if( fromgpr == 0 )
xXOR(to, to); // zero register should use xor, thanks --air xXOR(to, to); // zero register should use xor, thanks --air

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@ -18,7 +18,7 @@
using namespace x86Emitter; using namespace x86Emitter;
typedef xRegisterSSE xmm; typedef xRegisterSSE xmm;
typedef xRegister32 x32; typedef xRegisterLong x32;
struct microVU; struct microVU;

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@ -139,7 +139,7 @@ void VifUnpackSSE_Dynarec::writeBackRow() const {
// ToDo: Do we need to write back to vifregs.rX too!? :/ // ToDo: Do we need to write back to vifregs.rX too!? :/
} }
static void ShiftDisplacementWindow( xAddressVoid& addr, const xRegister32& modReg ) static void ShiftDisplacementWindow( xAddressVoid& addr, const xRegisterLong& modReg )
{ {
// Shifts the displacement factor of a given indirect address, so that the address // Shifts the displacement factor of a given indirect address, so that the address
// remains in the optimal 0xf0 range (which allows for byte-form displacements when // remains in the optimal 0xf0 range (which allows for byte-form displacements when