x86emitter: xAddressReg size will depend on the arch

Note: displacement are never 8B. The max is 4B which is sign extended to 8B.
So we can't store a pointer into it anymore.

Add xRegisterLong that will be x64 on 64 bits and x32 on 32 bits
This commit is contained in:
Gregory Hainaut 2016-01-16 20:20:27 +01:00
parent a865ba8cf5
commit 1328865279
2 changed files with 26 additions and 18 deletions

View File

@ -421,20 +421,28 @@ template< typename T > void xWrite( T val );
// --------------------------------------------------------------------------------------
// xAddressReg
// --------------------------------------------------------------------------------------
// Use 32 bit registers as our index registers (for ModSib-style memory address calculations).
// This type is implicitly exchangeable with xRegister32.
// Use 32/64 bit registers as our index registers (for ModSib-style memory address calculations).
// This type is implicitly exchangeable with xRegister32/64.
//
// Only xAddressReg provides operators for constructing xAddressInfo types. These operators
// could have been added to xRegister32 directly instead, however I think this design makes
// could have been added to xRegister32/64 directly instead, however I think this design makes
// more sense and allows the programmer a little more type protection if needed.
//
class xAddressReg : public xRegister32
#ifdef __x86_64__
#define xRegisterLong xRegister64
#else
#define xRegisterLong xRegister32
#endif
class xAddressReg : public xRegisterLong
{
public:
xAddressReg(): xRegister32() {}
xAddressReg( const xAddressReg& src ) : xRegister32( src.Id ) {}
xAddressReg( const xRegister32& src ) : xRegister32( src ) {}
explicit xAddressReg( int regId ) : xRegister32( regId ) {}
xAddressReg(): xRegisterLong() {}
xAddressReg( const xAddressReg& src ) : xRegisterLong( src.Id ) {}
xAddressReg( const xRegister32& src ) : xRegisterLong( src.Id ) {}
xAddressReg( const xRegister64& src ) : xRegisterLong( src.Id ) {}
explicit xAddressReg( int regId ) : xRegisterLong( regId ) {}
// Returns true if the register is the stack pointer: ESP.
bool IsStackPointer() const { return Id == 4; }
@ -444,14 +452,9 @@ template< typename T > void xWrite( T val );
xAddressVoid operator+( const void* right ) const;
xAddressVoid operator-( s32 right ) const;
xAddressVoid operator-( const void* right ) const;
xAddressVoid operator*( u32 factor ) const;
xAddressVoid operator*( int factor ) const;
xAddressVoid operator<<( u32 shift ) const;
/*xAddressReg& operator=( const xRegister32& src )
{
Id = src.Id;
return *this;
}*/
};
// --------------------------------------------------------------------------------------

View File

@ -471,7 +471,7 @@ xAddressVoid xAddressReg::operator-( const void* right ) const
return xAddressVoid( *this, -(sptr)right );
}
xAddressVoid xAddressReg::operator*( u32 factor ) const
xAddressVoid xAddressReg::operator*( int factor ) const
{
pxAssertMsg( Id != -1, "Uninitialized x86 register." );
return xAddressVoid( xEmptyReg, *this, factor );
@ -499,7 +499,7 @@ xAddressVoid::xAddressVoid( const xAddressReg& base, const xAddressReg& index, i
pxAssertMsg( index.Id != xRegId_Invalid, "Uninitialized x86 register." );
}
xAddressVoid::xAddressVoid( const xAddressReg& index, int displacement )
xAddressVoid::xAddressVoid( const xAddressReg& index, s32 displacement )
{
Base = xEmptyReg;
Index = index;
@ -522,7 +522,12 @@ xAddressVoid::xAddressVoid( const void* displacement )
Base = xEmptyReg;
Index = xEmptyReg;
Factor = 0;
Displacement = (sptr)displacement;
#ifdef __x86_64__
pxAssert(0);
//Displacement = (s32)displacement;
#else
Displacement = (s32)displacement;
#endif
}
xAddressVoid& xAddressVoid::Add( const xAddressReg& src )
@ -684,7 +689,7 @@ void xIndirectVoid::Reduce()
Base = Index;
Scale = 3;
break;
jNO_DEFAULT
}
}