mirror of https://github.com/PCSX2/pcsx2.git
Linux: Fix some GCC compilation errors. And update the msvc project (somehow didn't get committed last night, but only change header files so prolly didn't break anything).
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1037 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
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deb642af43
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2dcee32079
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@ -3024,7 +3024,23 @@
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Name="xmm"
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>
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<File
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RelativePath="..\..\x86\ix86\implement\xmm\movqss.h"
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RelativePath="..\..\x86\ix86\implement\xmm\arithmetic.h"
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>
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</File>
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<File
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RelativePath="..\..\x86\ix86\implement\xmm\basehelpers.h"
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>
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</File>
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<File
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RelativePath="..\..\x86\ix86\implement\xmm\comparisons.h"
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>
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</File>
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<File
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RelativePath="..\..\x86\ix86\implement\xmm\moremovs.h"
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>
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</File>
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<File
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RelativePath="..\..\x86\ix86\implement\xmm\shufflepack.h"
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>
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</File>
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</Filter>
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@ -109,14 +109,10 @@ public:
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__noinline void operator()( const ModSibBase& bitbase, const xRegister32& bitoffset ) const { m_32::Emit( bitbase, bitoffset ); }
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__noinline void operator()( const ModSibBase& bitbase, const xRegister16& bitoffset ) const { m_16::Emit( bitbase, bitoffset ); }
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// Note on Imm forms : use int as the source operand since it's "reasonably inert" from a compiler
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// perspective. (using uint tends to make the compiler try and fail to match signed immediates with
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// one of the other overloads).
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__noinline void operator()( const ModSibStrict<u32>& bitbase, u8 immoffset ) const { m_32::Emit( bitbase, immoffset ); }
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__noinline void operator()( const ModSibStrict<u16>& bitbase, u8 immoffset ) const { m_16::Emit( bitbase, immoffset ); }
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void operator()( const xRegister<u32>& bitbase, u8 immoffset ) const { m_32::Emit( bitbase, immoffset ); }
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void operator()( const xRegister<u16>& bitbase, u8 immoffset ) const { m_16::Emit( bitbase, immoffset ); }
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__noinline void operator()( const ModSibStrict<u32>& bitbase, u8 bitoffset ) const { m_32::Emit( bitbase, bitoffset ); }
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__noinline void operator()( const ModSibStrict<u16>& bitbase, u8 bitoffset ) const { m_16::Emit( bitbase, bitoffset ); }
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void operator()( const xRegister<u32>& bitbase, u8 bitoffset ) const { m_32::Emit( bitbase, bitoffset ); }
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void operator()( const xRegister<u16>& bitbase, u8 bitoffset ) const { m_16::Emit( bitbase, bitoffset ); }
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Group8ImplAll() {}
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};
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@ -54,13 +54,13 @@ public:
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}
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// ------------------------------------------------------------------------
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static __emitinline void Emit( const xRegister<ImmType>& to, const xRegister<ImmType>& from, u8 imm )
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static __emitinline void Emit( const xRegister<ImmType>& to, const xRegister<ImmType>& from, u8 shiftcnt )
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{
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if( imm == 0 ) return;
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if( shiftcnt == 0 ) return;
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prefix16();
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write16( 0xa40f | (isShiftRight ? 0x800 : 0) );
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ModRM_Direct( from.Id, to.Id );
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write8( imm );
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write8( shiftcnt );
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}
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// ------------------------------------------------------------------------
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@ -71,11 +71,11 @@ public:
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}
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// ------------------------------------------------------------------------
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static __emitinline void Emit( const ModSibBase& sibdest, const xRegister<ImmType>& from, u8 imm )
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static __emitinline void Emit( const ModSibBase& sibdest, const xRegister<ImmType>& from, u8 shiftcnt )
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{
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basesibform();
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EmitSibMagic( from.Id, sibdest );
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write8( imm );
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write8( shiftcnt );
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}
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// ------------------------------------------------------------------------
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@ -88,11 +88,11 @@ public:
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// ------------------------------------------------------------------------
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// dest data type is inferred from the 'from' register, so we can do void* resolution :)
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static __emitinline void Emit( void* dest, const xRegister<ImmType>& from, u8 imm )
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static __emitinline void Emit( void* dest, const xRegister<ImmType>& from, u8 shiftcnt )
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{
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basesibform();
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xWriteDisp( from.Id, dest );
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write8( imm );
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write8( shiftcnt );
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}
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};
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@ -113,17 +113,17 @@ public:
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__forceinline void operator()( const xRegister32& to, const xRegister32& from, __unused const xRegisterCL& clreg ) const { m_32::Emit( to, from ); }
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__forceinline void operator()( void* dest, const xRegister32& from, __unused const xRegisterCL& clreg ) const { m_32::Emit( dest, from ); }
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__noinline void operator()( const ModSibBase& sibdest, const xRegister32& from, __unused const xRegisterCL& clreg ) const { m_32::Emit( sibdest, from ); }
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__forceinline void operator()( const xRegister32& to, const xRegister32& from, u8 imm ) const { m_32::Emit( to, from, imm ); }
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__forceinline void operator()( void* dest, const xRegister32& from, u8 imm ) const { m_32::Emit( dest, from, imm ); }
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__noinline void operator()( const ModSibBase& sibdest, const xRegister32& from, u8 imm ) const { m_32::Emit( sibdest, from ); }
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__forceinline void operator()( const xRegister32& to, const xRegister32& from, u8 shiftcnt ) const { m_32::Emit( to, from, shiftcnt ); }
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__forceinline void operator()( void* dest, const xRegister32& from, u8 shiftcnt ) const { m_32::Emit( dest, from, shiftcnt ); }
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__noinline void operator()( const ModSibBase& sibdest, const xRegister32& from, u8 shiftcnt ) const { m_32::Emit( sibdest, shiftcnt ); }
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// ---------- 16 Bit Interface -----------
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__forceinline void operator()( const xRegister16& to, const xRegister16& from, __unused const xRegisterCL& clreg ) const { m_16::Emit( to, from ); }
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__forceinline void operator()( void* dest, const xRegister16& from, __unused const xRegisterCL& clreg ) const { m_16::Emit( dest, from ); }
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__noinline void operator()( const ModSibBase& sibdest, const xRegister16& from, __unused const xRegisterCL& clreg ) const { m_16::Emit( sibdest, from ); }
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__forceinline void operator()( const xRegister16& to, const xRegister16& from, u8 imm ) const { m_16::Emit( to, from, imm ); }
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__forceinline void operator()( void* dest, const xRegister16& from, u8 imm ) const { m_16::Emit( dest, from, imm ); }
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__noinline void operator()( const ModSibBase& sibdest, const xRegister16& from, u8 imm ) const { m_16::Emit( sibdest, from ); }
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__forceinline void operator()( const xRegister16& to, const xRegister16& from, u8 shiftcnt ) const { m_16::Emit( to, from, shiftcnt ); }
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__forceinline void operator()( void* dest, const xRegister16& from, u8 shiftcnt ) const { m_16::Emit( dest, from, shiftcnt ); }
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__noinline void operator()( const ModSibBase& sibdest, const xRegister16& from, u8 shiftcnt ) const { m_16::Emit( sibdest, shiftcnt ); }
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DwordShiftImplAll() {} // Why does GCC need these?
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};
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@ -25,7 +25,7 @@ template< u16 OpcodeBase1, u8 Modcode >
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class SimdImpl_ShiftWithoutQ
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{
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protected:
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template< u16 Opcode1, u16 OpcodeImm, u8 Modcode >
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template< u16 Opcode1, u16 OpcodeImm >
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class ShiftHelper
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{
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public:
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@ -50,17 +50,17 @@ protected:
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}
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template< typename OperandType >
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__emitinline void operator()( const xRegisterSIMD<OperandType>& to, u8 imm ) const
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__emitinline void operator()( const xRegisterSIMD<OperandType>& to, u8 imm8 ) const
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{
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SimdPrefix( (sizeof( OperandType ) == 16) ? 0x66 : 0, OpcodeImm );
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ModRM( 3, (int)Modcode, to.Id );
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xWrite<u8>( imm );
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xWrite<u8>( imm8 );
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}
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};
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public:
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const ShiftHelper<OpcodeBase1+1,0x71,Modcode> W;
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const ShiftHelper<OpcodeBase1+2,0x72,Modcode> D;
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const ShiftHelper<OpcodeBase1+1,0x71> W;
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const ShiftHelper<OpcodeBase1+2,0x72> D;
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SimdImpl_ShiftWithoutQ() {}
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};
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@ -72,7 +72,7 @@ template< u16 OpcodeBase1, u8 Modcode >
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class SimdImpl_Shift : public SimdImpl_ShiftWithoutQ<OpcodeBase1, Modcode>
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{
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public:
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const ShiftHelper<OpcodeBase1+3,0x73,Modcode> Q;
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const ShiftHelper<OpcodeBase1+3,0x73> Q;
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void DQ( const xRegisterSSE& to, u8 imm ) const
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{
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@ -251,19 +251,19 @@ protected:
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__forceinline void operator()( const xRegister32& to, const xRegisterSSE& from, u8 imm8 ) const
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{
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writeXMMop( 0x66, (Opcode<<8) | 0x3a, to, from );
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xWrite<u8>( imm );
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xWrite<u8>( imm8 );
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}
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__forceinline void operator()( void* dest, const xRegisterSSE& from, u8 imm8 ) const
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{
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writeXMMop( 0x66, (Opcode<<8) | 0x3a, to, from );
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xWrite<u8>( imm );
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xWrite<u8>( imm8 );
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}
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__noinline void operator()( const ModSibBase& dest, const xRegisterSSE& from, u8 imm8 ) const
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{
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writeXMMop( 0x66, (Opcode<<8) | 0x3a, to, from );
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xWrite<u8>( imm );
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xWrite<u8>( imm8 );
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}
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};
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