mirror of https://github.com/PCSX2/pcsx2.git
more W.I.P. stuff..
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@801 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes
parent
c2e3536818
commit
2c0f8fe41e
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@ -142,8 +142,8 @@ microVUt(void*) __fastcall mVUexecute(u32 startPC, u32 cycles) {
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*/
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microVU* mVU = mVUx;
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if ( mVUsearchProg(mVU) ) { // Found Program
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microBlock* block = mVU->prog.prog[mVU->prog.cur].block[startPC]->search(mVU->prog.lastPipelineState);
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if (block) return block->x86ptrStart; // Found Block
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//microBlock* block = mVU->prog.prog[mVU->prog.cur].block[startPC]->search(mVU->prog.lastPipelineState);
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//if (block) return block->x86ptrStart; // Found Block
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}
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// Recompile code
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return NULL;
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@ -17,6 +17,7 @@
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*/
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#pragma once
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#define mVUdebug // Prints Extra Info to Console
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#define _EmitterId_ (vuIndex+1)
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#include "Common.h"
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#include "VU.h"
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@ -25,10 +26,11 @@
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#include "microVU_Alloc.h"
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struct microBlock {
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u32 pipelineState; // FMACx|y|z|w | FDiv | EFU | IALU | BRANCH // Still thinking of how I'm going to do this
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u8* x86ptrStart;
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u8* x86ptrEnd;
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u8* x86ptrBranch;
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microRegInfo pState; // Detailed State of Pipeline
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u32 pipelineState; // | FDiv x 4 | EFU x 6 | Needs pState Info? x 1 | // Simple State of Pipeline
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u8* x86ptrStart; // Start of code
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u8* x86ptrEnd; // End of code (first byte outside of block)
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u8* x86ptrBranch; //
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//u32 size;
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};
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@ -54,17 +56,24 @@ public:
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}
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void reset() { init(); };
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void close() {}; // Can be Omitted?
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void add(u32 pipelineState, u8* x86ptrStart) {
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/*void add(u32 pipelineState, u8* x86ptrStart) {
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if (!search(pipelineState)) {
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listSize++;
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listSize &= MaxBlocks;
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blockList[listSize].pipelineState = pipelineState;
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blockList[listSize].x86ptrStart = x86ptrStart;
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}
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}
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microBlock* search(u32 pipelineState) {
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for (int i = 0; i < listSize; i++) {
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if (blockList[i].pipelineState == pipelineState) return &blockList[i];
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}*/
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microBlock* search(u32 pipelineState, microRegInfo* pState) {
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if (pipelineState & 1) { // Needs Detailed Search (Exact Match of Pipeline State)
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for (int i = 0; i < listSize; i++) {
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if (!memcmp(pState, &blockList[i].pState, sizeof(microRegInfo))) return &blockList[i];
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}
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}
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else { // Can do Simple Search (Only Matches the Important Pipeline Stuff)
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for (int i = 0; i < listSize; i++) {
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if (blockList[i].pipelineState == pipelineState) return &blockList[i];
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}
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}
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return NULL;
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}
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@ -19,35 +19,77 @@
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#pragma once
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#ifdef PCSX2_MICROVU
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#define mVUbranch mVUallocInfo.branch
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#define iPC mVUcurProg.curPC
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#ifdef mVUdebug
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#define mVUdebugStuff1() { \
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if (curI & _Ibit_) { SysPrintf("microVU: I-bit set!\n"); } \
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if (curI & _Ebit_) { SysPrintf("microVU: E-bit set!\n"); } \
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if (curI & _Mbit_) { SysPrintf("microVU: M-bit set!\n"); } \
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if (curI & _Dbit_) { SysPrintf("microVU: D-bit set!\n"); } \
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if (curI & _Tbit_) { SysPrintf("microVU: T-bit set!\n"); } \
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}
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#else
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#define mVUdebugStuff1() {}
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#endif
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#define curI mVUcurProg.data[iPC]
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#define setCode() { mVU->code = curI; }
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#define incPC() { iPC = ((iPC + 1) & (mVU->progSize-1)); setCode();}
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#define incPC(x) { iPC = ((iPC + x) & (mVU->progSize-1)); setCode(); }
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microVUx(void) mVUcompile(u32 startPC, u32 pipelineState, u8* x86ptrStart) {
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#define createBlock(blockEndPtr) { \
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block.pipelineState = pipelineState; \
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block.x86ptrStart = x86ptrStart; \
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block.x86ptrEnd = blockEndPtr; \
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/*block.x86ptrBranch;*/ \
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if (!(pipelineState & 1)) { \
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memcpy_fast(&block.pState, pState, sizeof(microRegInfo)); \
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} \
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}
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microVUx(void) mVUcompile(u32 startPC, u32 pipelineState, microRegInfo* pState, u8* x86ptrStart) {
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microVU* mVU = mVUx;
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int x;
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iPC = startPC;
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microBlock block;
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iPC = startPC / 4;
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// Searches for Existing Compiled Block (if found, then returns; else, compile)
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microBlock* pblock = mVUblock[iPC]->search(pipelineState, pState);
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if (block) { x86SetPtr(pblock->x86ptrEnd); return; }
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// First Pass
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setCode();
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for (x = 0; ; x++) {
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if (curI & _Ibit_) { SysPrintf("microVU: I-bit set!\n"); }
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if (curI & _Ebit_) { SysPrintf("microVU: E-bit set!\n"); }
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if (curI & _Mbit_) { SysPrintf("microVU: M-bit set!\n"); }
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if (curI & _Dbit_) { SysPrintf("microVU: D-bit set!\n"); mVUbranch = 4; }
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if (curI & _Tbit_) { SysPrintf("microVU: T-bit set!\n"); mVUbranch = 4; }
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for (;;) {
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mVUdebugStuff1();
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mVUopU<vuIndex, 0>();
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incPC();
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mVUopL<vuIndex, 0>();
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if (mVUbranch == 4) { mVUbranch = 0; break; }
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else if (mVUbranch) { mVUbranch = 4; }
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if (curI & _Ebit_) { mVUbranch = 5; }
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if (curI & _MDTbit_) { mVUbranch = 4; }
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if (curI & _Ibit_) { incPC(1); mVUinfo |= _isNOP; }
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else { incPC(1); mVUopL<vuIndex, 0>(); }
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if (mVUbranch == 4) { mVUbranch = 0; mVUinfo |= _isEOB; break; }
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else if (mVUbranch == 5) { mVUbranch = 4; }
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else if (mVUbranch) { mVUbranch = 4; mVUinfo |= _isBranch; }
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incPC(1);
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}
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// Second Pass
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iPC = startPC;
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setCode();
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for (int i = 0; i < x; i++) {
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for (bool x = 1; x==1; ) {
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if (isEOB) { x = 0; }
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else if (isBranch) { mVUopU<vuIndex, 1>(); incPC(2); }
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mVUopU<vuIndex, 1>();
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incPC();
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if (!isNop) mVUopL<vuIndex, 1>();
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if (isNop) { incPC(1); }
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else { incPC(1); mVUopL<vuIndex, 1>(); }
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if (!isBdelay) { incPC(1); }
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else {
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incPC(-2); // Go back to Branch Opcode
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mVUopL<vuIndex, 1>(); // Run Branch Opcode
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switch (mVUbranch) {
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case 1: break;
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case 2: break;
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case 3: break;
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}
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break;
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}
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}
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}
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@ -394,10 +394,10 @@ microVUf(void) mVU_FCAND() {
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microVU* mVU = mVUx;
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if (recPass == 0) {}
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else {
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mVUallocCFLAGa<vuIndex>(gprT2, fvcInstance);
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XOR32RtoR(gprT1, gprT1);
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AND32ItoR(gprT2, _Imm24_);
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SETNZ8R(gprT1);
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mVUallocCFLAGa<vuIndex>(gprT1, fvcInstance);
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AND32ItoR(gprT1, _Imm24_);
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ADD32ItoR(gprT1, 0xffffff);
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SHR32ItoR(gprT1, 24);
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mVUallocVIb<vuIndex>(gprT1, 1);
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}
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}
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@ -948,53 +948,47 @@ microVUf(void) mVU_XGKICK() {
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microVUf(void) mVU_B() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 1; }
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else {}
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mVUbranch = 1;
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}
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microVUf(void) mVU_BAL() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 1; }
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else {}
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mVUbranch = 1;
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if (recPass) {
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MOV32ItoR(gprT1, (xPC + (2 * 8)) & 0xffff);
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mVUallocVIb<vuIndex>(gprT1, _Ft_);
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}
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}
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microVUf(void) mVU_IBEQ() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 2; }
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else {}
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mVUbranch = 2;
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}
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microVUf(void) mVU_IBGEZ() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 2; }
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else {}
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mVUbranch = 2;
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}
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microVUf(void) mVU_IBGTZ() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 2; }
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else {}
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mVUbranch = 2;
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}
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microVUf(void) mVU_IBLTZ() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 2; }
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else {}
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mVUbranch = 2;
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}
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microVUf(void) mVU_IBLEZ() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 2; }
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else {}
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mVUbranch = 2;
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}
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microVUf(void) mVU_IBNE() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 2; }
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else {}
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mVUbranch = 2;
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}
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microVUf(void) mVU_JR() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 3; }
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else {}
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mVUbranch = 3;
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}
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microVUf(void) mVU_JALR() {
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microVU* mVU = mVUx;
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if (recPass == 0) { mVUallocInfo.branch = 3; }
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else {}
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mVUbranch = 3;
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}
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#endif //PCSX2_MICROVU
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@ -88,6 +88,7 @@ PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_15[4]);
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#define _Mbit_ (1<<29)
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#define _Dbit_ (1<<28)
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#define _Tbit_ (1<<27)
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#define _MDTbit_ ( _Mbit_ | _Dbit_ | _Tbit_ )
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#define getVUmem(x) (((vuIndex == 1) ? (x & 0x3ff) : ((x >= 0x400) ? (x & 0x43f) : (x & 0xff))) * 16)
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#define offsetSS ((_X) ? (0) : ((_Y) ? (4) : ((_Z) ? 8: 12)))
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@ -127,29 +128,54 @@ PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_15[4]);
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#define microVUq(aType) template<int vuIndex, int recPass> __forceinline aType
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#define mVUcurProg mVU->prog.prog[mVU->prog.cur]
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#define mVUblock mVU->prog.prog[mVU->prog.cur].block
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#define mVUallocInfo mVU->prog.prog[mVU->prog.cur].allocInfo
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#define mVUbranch mVUallocInfo.branch
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#define mVUinfo mVUallocInfo.info[mVUallocInfo.curPC / 2]
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#define iPC mVUallocInfo.curPC
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#define xPC ((iPC / 2) * 8)
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#define isNOP (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<0))
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//#define writeACC ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<1)) >> 1)
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//#define prevACC (((u8)((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<1)) >> 1) - 1) & 0x3)
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//#define readACC ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<3)) >> 3)
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#define writeQ ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<5)) >> 5)
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#define readQ ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<6)) >> 6)
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#define writeP ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<7)) >> 7)
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#define readP ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<7)) >> 7) // same as write
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#define doFlags (mVUallocInfo.info[mVUallocInfo.curPC] & (3<<8))
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#define doMac (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<8))
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#define doStatus (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<9))
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#define fmInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<10)) >> 10)
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#define fsInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<12)) >> 12)
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#define fcInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<14)) >> 14)
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#define fpmInstance (((u8)((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<10)) >> 10) - 1) & 0x3)
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#define fpsInstance (((u8)((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<12)) >> 12) - 1) & 0x3)
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#define fvmInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<16)) >> 16)
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#define fvsInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<18)) >> 18)
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#define fvcInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<14)) >> 14)
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//#define getFs (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<13))
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//#define getFt (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<14))
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#define _isNOP (1<<0) // Skip Lower Instruction
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#define _isBranch (1<<1) // Cur Instruction is a Branch
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#define _isEOB (1<<2) // End of Block
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#define _isBdelay (1<<3) // Cur Instruction in Branch Delay slot
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#define _writeQ (1<<5)
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#define _readQ (1<<6)
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#define _writeP (1<<7)
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#define _readP (1<<7)
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#define _doFlags (3<<8)
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#define _doMac (1<<8)
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#define _doStatus (1<<9)
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#define _fmInstance (3<<10)
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#define _fsInstance (3<<12)
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#define _fcInstance (3<<14)
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#define _fpmInstance (3<<10)
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#define _fpsInstance (3<<12)
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#define _fvmInstance (3<<16)
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#define _fvsInstance (3<<18)
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#define _fvcInstance (3<<14)
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#define isNOP (mVUinfo & (1<<0))
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#define isBranch (mVUinfo & (1<<1))
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#define isEOB (mVUinfo & (1<<2))
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#define isBdelay (mVUinfo & (1<<3))
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#define writeQ ((mVUinfo & (1<<5)) >> 5)
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#define readQ ((mVUinfo & (1<<6)) >> 6)
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#define writeP ((mVUinfo & (1<<7)) >> 7)
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#define readP ((mVUinfo & (1<<7)) >> 7) // same as write
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#define doFlags (mVUinfo & (3<<8))
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#define doMac (mVUinfo & (1<<8))
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#define doStatus (mVUinfo & (1<<9))
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#define fmInstance ((mVUinfo & (3<<10)) >> 10)
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#define fsInstance ((mVUinfo & (3<<12)) >> 12)
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#define fcInstance ((mVUinfo & (3<<14)) >> 14)
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#define fpmInstance (((u8)((mVUinfo & (3<<10)) >> 10) - 1) & 0x3)
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#define fpsInstance (((u8)((mVUinfo & (3<<12)) >> 12) - 1) & 0x3)
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#define fvmInstance ((mVUinfo & (3<<16)) >> 16)
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#define fvsInstance ((mVUinfo & (3<<18)) >> 18)
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#define fvcInstance ((mVUinfo & (3<<14)) >> 14)
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//#define getFs (mVUinfo & (1<<13))
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//#define getFt (mVUinfo & (1<<14))
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#define isMMX(_VIreg_) (_VIreg_ >= 1 && _VIreg_ <=9)
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#define mmVI(_VIreg_) (_VIreg_ - 1)
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