From 2c0f8fe41eabb48244f6a32c17bbe7599ec10db3 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Tue, 17 Mar 2009 03:34:26 +0000 Subject: [PATCH] more W.I.P. stuff.. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@801 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.cpp | 4 +- pcsx2/x86/microVU.h | 27 ++++++++---- pcsx2/x86/microVU_Compile.inl | 80 ++++++++++++++++++++++++++--------- pcsx2/x86/microVU_Lower.inl | 42 ++++++++---------- pcsx2/x86/microVU_Misc.h | 68 ++++++++++++++++++++--------- 5 files changed, 146 insertions(+), 75 deletions(-) diff --git a/pcsx2/x86/microVU.cpp b/pcsx2/x86/microVU.cpp index 396bb81471..935a197a21 100644 --- a/pcsx2/x86/microVU.cpp +++ b/pcsx2/x86/microVU.cpp @@ -142,8 +142,8 @@ microVUt(void*) __fastcall mVUexecute(u32 startPC, u32 cycles) { */ microVU* mVU = mVUx; if ( mVUsearchProg(mVU) ) { // Found Program - microBlock* block = mVU->prog.prog[mVU->prog.cur].block[startPC]->search(mVU->prog.lastPipelineState); - if (block) return block->x86ptrStart; // Found Block + //microBlock* block = mVU->prog.prog[mVU->prog.cur].block[startPC]->search(mVU->prog.lastPipelineState); + //if (block) return block->x86ptrStart; // Found Block } // Recompile code return NULL; diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index 370b7ef852..f7490dc334 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -17,6 +17,7 @@ */ #pragma once +#define mVUdebug // Prints Extra Info to Console #define _EmitterId_ (vuIndex+1) #include "Common.h" #include "VU.h" @@ -25,10 +26,11 @@ #include "microVU_Alloc.h" struct microBlock { - u32 pipelineState; // FMACx|y|z|w | FDiv | EFU | IALU | BRANCH // Still thinking of how I'm going to do this - u8* x86ptrStart; - u8* x86ptrEnd; - u8* x86ptrBranch; + microRegInfo pState; // Detailed State of Pipeline + u32 pipelineState; // | FDiv x 4 | EFU x 6 | Needs pState Info? x 1 | // Simple State of Pipeline + u8* x86ptrStart; // Start of code + u8* x86ptrEnd; // End of code (first byte outside of block) + u8* x86ptrBranch; // //u32 size; }; @@ -54,17 +56,24 @@ public: } void reset() { init(); }; void close() {}; // Can be Omitted? - void add(u32 pipelineState, u8* x86ptrStart) { + /*void add(u32 pipelineState, u8* x86ptrStart) { if (!search(pipelineState)) { listSize++; listSize &= MaxBlocks; blockList[listSize].pipelineState = pipelineState; blockList[listSize].x86ptrStart = x86ptrStart; } - } - microBlock* search(u32 pipelineState) { - for (int i = 0; i < listSize; i++) { - if (blockList[i].pipelineState == pipelineState) return &blockList[i]; + }*/ + microBlock* search(u32 pipelineState, microRegInfo* pState) { + if (pipelineState & 1) { // Needs Detailed Search (Exact Match of Pipeline State) + for (int i = 0; i < listSize; i++) { + if (!memcmp(pState, &blockList[i].pState, sizeof(microRegInfo))) return &blockList[i]; + } + } + else { // Can do Simple Search (Only Matches the Important Pipeline Stuff) + for (int i = 0; i < listSize; i++) { + if (blockList[i].pipelineState == pipelineState) return &blockList[i]; + } } return NULL; } diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index be372ee45f..0574d9faa3 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -19,35 +19,77 @@ #pragma once #ifdef PCSX2_MICROVU -#define mVUbranch mVUallocInfo.branch -#define iPC mVUcurProg.curPC +#ifdef mVUdebug +#define mVUdebugStuff1() { \ + if (curI & _Ibit_) { SysPrintf("microVU: I-bit set!\n"); } \ + if (curI & _Ebit_) { SysPrintf("microVU: E-bit set!\n"); } \ + if (curI & _Mbit_) { SysPrintf("microVU: M-bit set!\n"); } \ + if (curI & _Dbit_) { SysPrintf("microVU: D-bit set!\n"); } \ + if (curI & _Tbit_) { SysPrintf("microVU: T-bit set!\n"); } \ +} +#else +#define mVUdebugStuff1() {} +#endif + #define curI mVUcurProg.data[iPC] #define setCode() { mVU->code = curI; } -#define incPC() { iPC = ((iPC + 1) & (mVU->progSize-1)); setCode();} +#define incPC(x) { iPC = ((iPC + x) & (mVU->progSize-1)); setCode(); } -microVUx(void) mVUcompile(u32 startPC, u32 pipelineState, u8* x86ptrStart) { +#define createBlock(blockEndPtr) { \ + block.pipelineState = pipelineState; \ + block.x86ptrStart = x86ptrStart; \ + block.x86ptrEnd = blockEndPtr; \ + /*block.x86ptrBranch;*/ \ + if (!(pipelineState & 1)) { \ + memcpy_fast(&block.pState, pState, sizeof(microRegInfo)); \ + } \ +} + +microVUx(void) mVUcompile(u32 startPC, u32 pipelineState, microRegInfo* pState, u8* x86ptrStart) { microVU* mVU = mVUx; - int x; - iPC = startPC; + microBlock block; + iPC = startPC / 4; + + // Searches for Existing Compiled Block (if found, then returns; else, compile) + microBlock* pblock = mVUblock[iPC]->search(pipelineState, pState); + if (block) { x86SetPtr(pblock->x86ptrEnd); return; } + + // First Pass setCode(); - for (x = 0; ; x++) { - if (curI & _Ibit_) { SysPrintf("microVU: I-bit set!\n"); } - if (curI & _Ebit_) { SysPrintf("microVU: E-bit set!\n"); } - if (curI & _Mbit_) { SysPrintf("microVU: M-bit set!\n"); } - if (curI & _Dbit_) { SysPrintf("microVU: D-bit set!\n"); mVUbranch = 4; } - if (curI & _Tbit_) { SysPrintf("microVU: T-bit set!\n"); mVUbranch = 4; } + for (;;) { + mVUdebugStuff1(); mVUopU(); - incPC(); - mVUopL(); - if (mVUbranch == 4) { mVUbranch = 0; break; } - else if (mVUbranch) { mVUbranch = 4; } + if (curI & _Ebit_) { mVUbranch = 5; } + if (curI & _MDTbit_) { mVUbranch = 4; } + if (curI & _Ibit_) { incPC(1); mVUinfo |= _isNOP; } + else { incPC(1); mVUopL(); } + if (mVUbranch == 4) { mVUbranch = 0; mVUinfo |= _isEOB; break; } + else if (mVUbranch == 5) { mVUbranch = 4; } + else if (mVUbranch) { mVUbranch = 4; mVUinfo |= _isBranch; } + incPC(1); } + + // Second Pass iPC = startPC; setCode(); - for (int i = 0; i < x; i++) { + for (bool x = 1; x==1; ) { + if (isEOB) { x = 0; } + else if (isBranch) { mVUopU(); incPC(2); } + mVUopU(); - incPC(); - if (!isNop) mVUopL(); + if (isNop) { incPC(1); } + else { incPC(1); mVUopL(); } + if (!isBdelay) { incPC(1); } + else { + incPC(-2); // Go back to Branch Opcode + mVUopL(); // Run Branch Opcode + switch (mVUbranch) { + case 1: break; + case 2: break; + case 3: break; + } + break; + } } } diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 69d9b20098..ff391179f5 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -394,10 +394,10 @@ microVUf(void) mVU_FCAND() { microVU* mVU = mVUx; if (recPass == 0) {} else { - mVUallocCFLAGa(gprT2, fvcInstance); - XOR32RtoR(gprT1, gprT1); - AND32ItoR(gprT2, _Imm24_); - SETNZ8R(gprT1); + mVUallocCFLAGa(gprT1, fvcInstance); + AND32ItoR(gprT1, _Imm24_); + ADD32ItoR(gprT1, 0xffffff); + SHR32ItoR(gprT1, 24); mVUallocVIb(gprT1, 1); } } @@ -948,53 +948,47 @@ microVUf(void) mVU_XGKICK() { microVUf(void) mVU_B() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 1; } - else {} + mVUbranch = 1; } microVUf(void) mVU_BAL() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 1; } - else {} + mVUbranch = 1; + if (recPass) { + MOV32ItoR(gprT1, (xPC + (2 * 8)) & 0xffff); + mVUallocVIb(gprT1, _Ft_); + } } microVUf(void) mVU_IBEQ() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 2; } - else {} + mVUbranch = 2; } microVUf(void) mVU_IBGEZ() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 2; } - else {} + mVUbranch = 2; } microVUf(void) mVU_IBGTZ() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 2; } - else {} + mVUbranch = 2; } microVUf(void) mVU_IBLTZ() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 2; } - else {} + mVUbranch = 2; } microVUf(void) mVU_IBLEZ() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 2; } - else {} + mVUbranch = 2; } microVUf(void) mVU_IBNE() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 2; } - else {} + mVUbranch = 2; } microVUf(void) mVU_JR() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 3; } - else {} + mVUbranch = 3; } microVUf(void) mVU_JALR() { microVU* mVU = mVUx; - if (recPass == 0) { mVUallocInfo.branch = 3; } - else {} + mVUbranch = 3; } #endif //PCSX2_MICROVU diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 0828a34d97..2b76665365 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -88,6 +88,7 @@ PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_15[4]); #define _Mbit_ (1<<29) #define _Dbit_ (1<<28) #define _Tbit_ (1<<27) +#define _MDTbit_ ( _Mbit_ | _Dbit_ | _Tbit_ ) #define getVUmem(x) (((vuIndex == 1) ? (x & 0x3ff) : ((x >= 0x400) ? (x & 0x43f) : (x & 0xff))) * 16) #define offsetSS ((_X) ? (0) : ((_Y) ? (4) : ((_Z) ? 8: 12))) @@ -127,29 +128,54 @@ PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_15[4]); #define microVUq(aType) template __forceinline aType #define mVUcurProg mVU->prog.prog[mVU->prog.cur] +#define mVUblock mVU->prog.prog[mVU->prog.cur].block #define mVUallocInfo mVU->prog.prog[mVU->prog.cur].allocInfo +#define mVUbranch mVUallocInfo.branch +#define mVUinfo mVUallocInfo.info[mVUallocInfo.curPC / 2] +#define iPC mVUallocInfo.curPC +#define xPC ((iPC / 2) * 8) -#define isNOP (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<0)) -//#define writeACC ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<1)) >> 1) -//#define prevACC (((u8)((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<1)) >> 1) - 1) & 0x3) -//#define readACC ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<3)) >> 3) -#define writeQ ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<5)) >> 5) -#define readQ ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<6)) >> 6) -#define writeP ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<7)) >> 7) -#define readP ((mVUallocInfo.info[mVUallocInfo.curPC] & (1<<7)) >> 7) // same as write -#define doFlags (mVUallocInfo.info[mVUallocInfo.curPC] & (3<<8)) -#define doMac (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<8)) -#define doStatus (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<9)) -#define fmInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<10)) >> 10) -#define fsInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<12)) >> 12) -#define fcInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<14)) >> 14) -#define fpmInstance (((u8)((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<10)) >> 10) - 1) & 0x3) -#define fpsInstance (((u8)((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<12)) >> 12) - 1) & 0x3) -#define fvmInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<16)) >> 16) -#define fvsInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<18)) >> 18) -#define fvcInstance ((mVUallocInfo.info[mVUallocInfo.curPC] & (3<<14)) >> 14) -//#define getFs (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<13)) -//#define getFt (mVUallocInfo.info[mVUallocInfo.curPC] & (1<<14)) +#define _isNOP (1<<0) // Skip Lower Instruction +#define _isBranch (1<<1) // Cur Instruction is a Branch +#define _isEOB (1<<2) // End of Block +#define _isBdelay (1<<3) // Cur Instruction in Branch Delay slot +#define _writeQ (1<<5) +#define _readQ (1<<6) +#define _writeP (1<<7) +#define _readP (1<<7) +#define _doFlags (3<<8) +#define _doMac (1<<8) +#define _doStatus (1<<9) +#define _fmInstance (3<<10) +#define _fsInstance (3<<12) +#define _fcInstance (3<<14) +#define _fpmInstance (3<<10) +#define _fpsInstance (3<<12) +#define _fvmInstance (3<<16) +#define _fvsInstance (3<<18) +#define _fvcInstance (3<<14) + +#define isNOP (mVUinfo & (1<<0)) +#define isBranch (mVUinfo & (1<<1)) +#define isEOB (mVUinfo & (1<<2)) +#define isBdelay (mVUinfo & (1<<3)) +#define writeQ ((mVUinfo & (1<<5)) >> 5) +#define readQ ((mVUinfo & (1<<6)) >> 6) +#define writeP ((mVUinfo & (1<<7)) >> 7) +#define readP ((mVUinfo & (1<<7)) >> 7) // same as write +#define doFlags (mVUinfo & (3<<8)) +#define doMac (mVUinfo & (1<<8)) +#define doStatus (mVUinfo & (1<<9)) +#define fmInstance ((mVUinfo & (3<<10)) >> 10) +#define fsInstance ((mVUinfo & (3<<12)) >> 12) +#define fcInstance ((mVUinfo & (3<<14)) >> 14) +#define fpmInstance (((u8)((mVUinfo & (3<<10)) >> 10) - 1) & 0x3) +#define fpsInstance (((u8)((mVUinfo & (3<<12)) >> 12) - 1) & 0x3) +#define fvmInstance ((mVUinfo & (3<<16)) >> 16) +#define fvsInstance ((mVUinfo & (3<<18)) >> 18) +#define fvcInstance ((mVUinfo & (3<<14)) >> 14) +//#define getFs (mVUinfo & (1<<13)) +//#define getFt (mVUinfo & (1<<14)) #define isMMX(_VIreg_) (_VIreg_ >= 1 && _VIreg_ <=9) #define mmVI(_VIreg_) (_VIreg_ - 1)