EE: drop MMX/FPU state management

Useless as MMX code is removed

pcsx2/x86/iCore.cpp

@@ -1138,7 +1138,3 @@ void _recFillRegister(EEINST& pinst, int type, int reg, int write)
 		pxAssume( false );
 	}
 }
-
-void SetMMXstate() {
-	x86FpuState = MMX_STATE;
-}

pcsx2/x86/iCore.h

@@ -271,12 +271,6 @@ int _allocCheckGPRtoX86(EEINST* pinst, int gprreg, int mode);
 ////////////////////////////////////////////////////////////////////////////////
 //   MMX (64-bit) Register Allocation Tools
 
-#define FPU_STATE 0
-#define MMX_STATE 1
-
-void SetMMXstate();
-void SetFPUstate();
-
 // max is 0x7f, when 0x80 is set, need to flush reg
 //#define MMX_GET_CACHE(ptr, index) ((u8*)ptr)[index]
 //#define MMX_SET_CACHE(ptr, ind3, ind2, ind1, ind0) ((u32*)ptr)[0] = (ind3<<24)|(ind2<<16)|(ind1<<8)|ind0;
@@ -316,7 +310,6 @@ u8 _hasFreeMMXreg();
 int _getNumMMXwrite();
 
 extern _mmxregs mmxregs[iREGCNT_MMX], s_saveMMXregs[iREGCNT_MMX];
-extern u16 x86FpuState;
 
 // extern void iDumpRegisters(u32 startpc, u32 temp);
 

pcsx2/x86/iVU1micro.cpp

@@ -112,7 +112,7 @@ namespace VU1micro
 	void recAlloc()									{ SuperVUAlloc(1); initVUrec(&VU1, 1); }
 	void __fastcall recClear(u32 Addr, u32 Size)	{ SuperVUClear(Addr, Size, 1); clearVUrec(Addr, Size, 1); }
 	void recShutdown()								{ SuperVUDestroy(1); closeVUrec(1); }
-	static void recReset()							{ SuperVUReset(1); resetVUrec(1); x86FpuState = FPU_STATE; }
+	static void recReset()							{ SuperVUReset(1); resetVUrec(1); }
 	static void recStep()							{}
 
 	static void recExecuteBlock(void)
@@ -257,7 +257,6 @@ namespace VU1micro
 	static void recReset() {
 		if (useMVU1) resetVUrec(1);
 		else		 SuperVUReset(1);
-		x86FpuState = FPU_STATE;
 	}
 
 	static void recStep() {}

pcsx2/x86/ix86-32/iCore-32.cpp

@@ -28,7 +28,6 @@ using namespace x86Emitter;
 // landmass of shared code. (air)
 extern u32 g_psxConstRegs[32];
 
-u16 x86FpuState;
 static u16 g_mmxAllocCounter = 0;
 
 // X86 caching
@@ -488,13 +487,6 @@ int _getNumMMXwrite()
 	return num;
 }
 
-void SetFPUstate() {
-	if (x86FpuState == MMX_STATE) {
-		xEMMS();
-		x86FpuState = FPU_STATE;
-	}
-}
-
 void _signExtendSFtoM(uptr mem)
 {
 	xLAHF();

pcsx2/x86/ix86-32/iR5900-32.cpp

@@ -98,7 +98,6 @@ static bool s_nBlockFF;
 
 // save states for branches
 GPR_reg64 s_saveConstRegs[32];
-static u16 s_savex86FpuState;
 static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0;
 static EEINST* s_psaveInstInfo = NULL;
 
@@ -417,7 +416,6 @@ static DynGenFunc* _DynGen_EnterRecompiledCode()
 static DynGenFunc* _DynGen_DispatchBlockDiscard()
 {
 	u8* retval = xGetPtr();
-	xEMMS();
 	xFastCall(dyna_block_discard);
 	xJMP(ExitRecompiledCode);
 	return (DynGenFunc*)retval;
@@ -426,7 +424,6 @@ static DynGenFunc* _DynGen_DispatchBlockDiscard()
 static DynGenFunc* _DynGen_DispatchPageReset()
 {
 	u8* retval = xGetPtr();
-	xEMMS();
 	xFastCall(dyna_page_reset);
 	xJMP(ExitRecompiledCode);
 	return (DynGenFunc*)retval;
@@ -569,8 +566,6 @@ static void recAlloc()
 	// No errors.. Proceed with initialization:
 
 	_DynGen_Dispatchers();
-
-	x86FpuState = FPU_STATE;
 }
 
 static __aligned16 u16 manual_page[Ps2MemSize::MainRam >> 12];
@@ -612,7 +607,6 @@ static void recResetRaw()
 
 	recPtr = *recMem;
 	recConstBufPtr = recConstBuf;
-	x86FpuState = FPU_STATE;
 
 	g_branch = 0;
 }
@@ -906,7 +900,6 @@ void SetBranchImm( u32 imm )
 
 void SaveBranchState()
 {
-	s_savex86FpuState = x86FpuState;
 	s_savenBlockCycles = s_nBlockCycles;
 	memcpy(s_saveConstRegs, g_cpuConstRegs, sizeof(g_cpuConstRegs));
 	s_saveHasConstReg = g_cpuHasConstReg;
@@ -920,7 +913,6 @@ void SaveBranchState()
 
 void LoadBranchState()
 {
-	x86FpuState = s_savex86FpuState;
 	s_nBlockCycles = s_savenBlockCycles;
 
 	memcpy(g_cpuConstRegs, s_saveConstRegs, sizeof(g_cpuConstRegs));
@@ -963,11 +955,6 @@ void iFlushCall(int flushtype)
 
 	if( flushtype & FLUSH_CACHED_REGS )
 		_flushConstRegs();
-
-	if (x86FpuState==MMX_STATE) {
-		xEMMS();
-		x86FpuState=FPU_STATE;
-	}
 }
 
 //void testfpu()
@@ -1658,7 +1645,6 @@ static void __fastcall recRecompile( const u32 startpc )
 	// reset recomp state variables
 	s_nBlockCycles = 0;
 	pc = startpc;
-	x86FpuState = FPU_STATE;
 	g_cpuHasConstReg = g_cpuFlushedConstReg = 1;
 	pxAssert( g_cpuConstRegs[0].UD[0] == 0 );
 
@@ -2064,7 +2050,6 @@ StartRecomp:
 
 	pxAssert( xGetPtr() < recMem->GetPtrEnd() );
 	pxAssert( recConstBufPtr < recConstBuf + RECCONSTBUF_SIZE );
-	pxAssert( x86FpuState == 0 );
 
 	pxAssert(xGetPtr() - recPtr < _64kb);
 	s_pCurBlockEx->x86size = xGetPtr() - recPtr;

pcsx2/x86/ix86-32/recVTLB.cpp

@@ -72,7 +72,7 @@ static void iMOV128_SSE( const xIndirectVoid& destRm, const xIndirectVoid& srcRm
 //
 static void iMOV64_Smart( const xIndirectVoid& destRm, const xIndirectVoid& srcRm )
 {
-	if( (x86FpuState == FPU_STATE) && _hasFreeXMMreg() )
+	if( _hasFreeXMMreg() )
 	{
 		// Move things using MOVLPS:
 		xRegisterSSE reg( _allocTempXMMreg( XMMT_INT, -1 ) );

pcsx2/x86/sVU_Debug.h

@@ -17,14 +17,12 @@
 
 #define REC_VUOP(VU, f) { \
 	_freeXMMregs(/*&VU*/); \
-	SetFPUstate();) \
 	xMOV(ptr32[&VU.code], (u32)VU.code); \
 	xCALL((void*)(uptr)VU##MI_##f); \
 }
 
 #define REC_VUOPs(VU, f) { \
 	_freeXMMregs(); \
-	SetFPUstate();) \
 	if (VU==&VU1) {  \
 		xMOV(ptr32[&VU1.code], (u32)VU1.code); \
 		xCALL((void*)(uptr)VU1MI_##f); \
@@ -37,14 +35,12 @@
 
 #define REC_VUOPFLAGS(VU, f) { \
 	_freeXMMregs(/*&VU*/); \
-	SetFPUstate(); \
 	xMOV(ptr32[&VU.code], (u32)VU.code); \
 	xCALL((void*)(uptr)VU##MI_##f); \
 }
 
 #define REC_VUBRANCH(VU, f) { \
 	_freeXMMregs(/*&VU*/); \
-	SetFPUstate(); \
 	xMOV(ptr32[&VU.code], (u32)VU.code); \
 	xMOV(ptr32[&VU.VI[REG_TPC].UL], (u32)pc); \
 	xCALL((void*)(uptr)VU##MI_##f); \