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iR5900: Use unsigned math for constant prop of add/sub 

Signed overflow is undefined.
This commit is contained in:
Connor McLaughlin 2022-01-02 23:52:30 +10:00 committed by lightningterror
parent 8d38e97c0b
commit 08ecf3f582
2 changed files with 6 additions and 6 deletions
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8
pcsx2/x86/ix86-32/iR5900Arit.cpp
View File

@ -57,7 +57,7 @@ REC_FUNC_DEL(SLTU, _Rd_);
//// ADD //// ADD
void recADD_const() void recADD_const()
{ {
g_cpuConstRegs[_Rd_].SD[0] = g_cpuConstRegs[_Rs_].SL[0] + g_cpuConstRegs[_Rt_].SL[0]; g_cpuConstRegs[_Rd_].SD[0] = s64(s32(g_cpuConstRegs[_Rs_].UL[0] + g_cpuConstRegs[_Rt_].UL[0]));
} }
void recADD_constv(int info, int creg, u32 vreg) void recADD_constv(int info, int creg, u32 vreg)
@ -108,7 +108,7 @@ void recADDU(void)
//// DADD //// DADD
void recDADD_const(void) void recDADD_const(void)
{ {
g_cpuConstRegs[_Rd_].SD[0] = g_cpuConstRegs[_Rs_].SD[0] + g_cpuConstRegs[_Rt_].SD[0]; g_cpuConstRegs[_Rd_].UD[0] = g_cpuConstRegs[_Rs_].UD[0] + g_cpuConstRegs[_Rt_].UD[0];
} }
void recDADD_constv(int info, int creg, u32 vreg) void recDADD_constv(int info, int creg, u32 vreg)
@ -248,7 +248,7 @@ void recDADDU(void)
void recSUB_const() void recSUB_const()
{ {
g_cpuConstRegs[_Rd_].SD[0] = g_cpuConstRegs[_Rs_].SL[0] - g_cpuConstRegs[_Rt_].SL[0]; g_cpuConstRegs[_Rd_].SD[0] = s64(s32(g_cpuConstRegs[_Rs_].UL[0] - g_cpuConstRegs[_Rt_].UL[0]));
} }
void recSUB_consts(int info) void recSUB_consts(int info)
@ -305,7 +305,7 @@ void recSUBU(void)
//// DSUB //// DSUB
void recDSUB_const() void recDSUB_const()
{ {
g_cpuConstRegs[_Rd_].SD[0] = g_cpuConstRegs[_Rs_].SD[0] - g_cpuConstRegs[_Rt_].SD[0]; g_cpuConstRegs[_Rd_].UD[0] = g_cpuConstRegs[_Rs_].UD[0] - g_cpuConstRegs[_Rt_].UD[0];
} }
void recDSUB_consts(int info) void recDSUB_consts(int info)

4
pcsx2/x86/ix86-32/iR5900AritImm.cpp
View File

@ -51,7 +51,7 @@ REC_FUNC_DEL(SLTIU, _Rt_);
//// ADDI //// ADDI
void recADDI_const(void) void recADDI_const(void)
{ {
g_cpuConstRegs[_Rt_].SD[0] = (s64)(g_cpuConstRegs[_Rs_].SL[0] + (s32)_Imm_); g_cpuConstRegs[_Rt_].SD[0] = s64(s32(g_cpuConstRegs[_Rs_].UL[0] + u32(s32(_Imm_))));
} }
void recADDI_(int info) void recADDI_(int info)
@ -86,7 +86,7 @@ void recADDIU()
//////////////////////////////////////////////////// ////////////////////////////////////////////////////
void recDADDI_const() void recDADDI_const()
{ {
g_cpuConstRegs[_Rt_].SD[0] = g_cpuConstRegs[_Rs_].SD[0] + (s64)_Imm_; g_cpuConstRegs[_Rt_].UD[0] = g_cpuConstRegs[_Rs_].UD[0] + u64(s64(_Imm_));
} }
void recDADDI_(int info) void recDADDI_(int info)