mirror of https://github.com/PCSX2/pcsx2.git
A few fixes for MMI stuff by tmkk, and disabled a logging printf in release builds.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@526 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -1049,18 +1049,18 @@ void PMADDW() {
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void PSLLVW() {
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void PSLLVW() {
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if (!_Rd_) return;
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if (!_Rd_) return;
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cpuRegs.GPR.r[_Rd_].UD[0] = (s32)(cpuRegs.GPR.r[_Rt_].UL[0] <<
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cpuRegs.GPR.r[_Rd_].SD[0] = (s64)(s32)(cpuRegs.GPR.r[_Rt_].UL[0] <<
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(cpuRegs.GPR.r[_Rs_].UL[0] & 0x1F));
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(cpuRegs.GPR.r[_Rs_].UL[0] & 0x1F));
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cpuRegs.GPR.r[_Rd_].UD[1] = (s32)(cpuRegs.GPR.r[_Rt_].UL[2] <<
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cpuRegs.GPR.r[_Rd_].SD[1] = (s64)(s32)(cpuRegs.GPR.r[_Rt_].UL[2] <<
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(cpuRegs.GPR.r[_Rs_].UL[2] & 0x1F));
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(cpuRegs.GPR.r[_Rs_].UL[2] & 0x1F));
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}
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}
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void PSRLVW() {
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void PSRLVW() {
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if (!_Rd_) return;
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if (!_Rd_) return;
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cpuRegs.GPR.r[_Rd_].UD[0] = (s32)(cpuRegs.GPR.r[_Rt_].UL[0] >>
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cpuRegs.GPR.r[_Rd_].SD[0] = (s64)(s32)(cpuRegs.GPR.r[_Rt_].UL[0] >>
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(cpuRegs.GPR.r[_Rs_].UL[0] & 0x1F));
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(cpuRegs.GPR.r[_Rs_].UL[0] & 0x1F));
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cpuRegs.GPR.r[_Rd_].UD[1] = (s32)(cpuRegs.GPR.r[_Rt_].UL[2] >>
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cpuRegs.GPR.r[_Rd_].SD[1] = (s64)(s32)(cpuRegs.GPR.r[_Rt_].UL[2] >>
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(cpuRegs.GPR.r[_Rs_].UL[2] & 0x1F));
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(cpuRegs.GPR.r[_Rs_].UL[2] & 0x1F));
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}
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}
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@ -1430,9 +1430,9 @@ void PMADDUW() {
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void PSRAVW() {
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void PSRAVW() {
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if (!_Rd_) return;
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if (!_Rd_) return;
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cpuRegs.GPR.r[_Rd_].UD[0] = (cpuRegs.GPR.r[_Rt_].SL[0] >>
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cpuRegs.GPR.r[_Rd_].SD[0] = (s64)(cpuRegs.GPR.r[_Rt_].SL[0] >>
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(cpuRegs.GPR.r[_Rs_].UL[0] & 0x1F));
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(cpuRegs.GPR.r[_Rs_].UL[0] & 0x1F));
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cpuRegs.GPR.r[_Rd_].UD[1] = (cpuRegs.GPR.r[_Rt_].SL[2] >>
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cpuRegs.GPR.r[_Rd_].SD[1] = (s64)(cpuRegs.GPR.r[_Rt_].SL[2] >>
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(cpuRegs.GPR.r[_Rs_].UL[2] & 0x1F));
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(cpuRegs.GPR.r[_Rs_].UL[2] & 0x1F));
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}
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}
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@ -1783,7 +1783,7 @@ int VIF1transfer(u32 *data, int size, int istag) {
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continue;
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continue;
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}
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}
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if(vif1.tag.size != 0) SysPrintf("no vif1 cmd but tag size is left last cmd read %x\n", vif1Regs->code);
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if(vif1.tag.size != 0) DevCon::Error("no vif1 cmd but tag size is left last cmd read %x\n", params vif1Regs->code);
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if(vif1.irq) break;
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if(vif1.irq) break;
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@ -3401,7 +3401,6 @@ CPU_SSE2_XMMCACHE_START((((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMM
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SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S);
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SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S);
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SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_T);
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SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_T);
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}
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}
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SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_D);
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}
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}
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else {
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else {
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if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI);
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if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI);
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@ -3412,7 +3411,10 @@ CPU_SSE2_XMMCACHE_START((((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMM
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}
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}
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// add from LO/HI
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// add from LO/HI
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if ( _Rd_ ) SSE2_PADDQ_XMM_to_XMM(EEREC_D, EEREC_LO);
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if ( _Rd_ ) {
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SSE2_PADDQ_XMM_to_XMM(EEREC_D, EEREC_LO);
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SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_D);
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}
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else SSE2_PADDQ_XMM_to_XMM(EEREC_HI, EEREC_LO);
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else SSE2_PADDQ_XMM_to_XMM(EEREC_HI, EEREC_LO);
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// interleave & sign extend
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// interleave & sign extend
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