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mgba
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4,319 Commits 36 Branches 39 Tags 69 MiB
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80 Commits

Author SHA1 Message Date
Vicki Pfau 0fadc1e11d ARM: Fix some warnings 2017-01-28 11:26:09 -08:00
Vicki Pfau b17d2d11c3 ARM: Fix build 2017-01-28 11:15:30 -08:00
Vicki Pfau 37f5feb713 ARM: Overhaul PSR access 2017-01-28 11:11:59 -08:00
Jeffrey Pfau 180418a74f ARM7: Fix MLA/*MULL/*MLAL timing 2017-01-01 14:46:58 -08:00
Jeffrey Pfau fa884d071e All: Migrate includes to separate directory 2016-12-30 21:25:07 -08:00
Jeffrey Pfau 6b1cbbd5e2 ARM7: Fix setting spsr privilege bits when spsr is empty 2016-06-10 10:18:21 -07:00
Jeffrey Pfau feb5ad2260 ARM7: Fix flags on SBC/RSC 2016-05-20 19:02:15 -07:00
Jeffrey Pfau e81de71f50 ARM7: Flush prefetch cache when loading CPSR via MSR 2016-05-16 01:18:09 -07:00
Jeffrey Pfau b5ff48a74e ARM7: Support forcing Thumb mode via MSR 2016-05-12 00:19:24 -07:00
Jeffrey Pfau 6604afb670 ARM7: Fix bank switching with LDR[B]T/STR[B]T 2015-11-22 02:31:13 -08:00
Jeffrey Pfau fad1daf3e9 ARM7: Fix STRT/STRBT 2015-11-20 19:10:17 -08:00
Jeffrey Pfau 4bd7a65432 ARM7: Fix sign of unaligned LDRSH 2015-11-06 21:03:52 -08:00
Jeffrey Pfau 6ba239d3f3 ARM7: Combine shifter-immediate and shifter-register functions to reduce binary size 2015-08-23 07:21:14 -07:00
Jeffrey Pfau 051af279c9 GBA Memory: Implement game pak prefetch approximation 2015-06-22 00:27:21 -07:00
Jeffrey Pfau 910ff621b3 ARM7: Fix timing of multiplies to use N cycles 2015-06-12 03:26:50 -07:00
Jeffrey Pfau 32d1f5bbfb ARM7: Fix ARM multiply instructions when PC is a destination register 2015-05-09 13:40:58 -07:00
Jeffrey Pfau ebcb344d64 ARM7: Handle writeback for PC in addressing modes 2 and 3 2015-05-08 01:23:44 -07:00
Jeffrey Pfau 45473bf7bc ARM7: Fix cycle counting for loads 2015-03-27 21:21:17 -07:00
Jeffrey Pfau 56291e63e5 Debugger: Add support for soft breakpoints 2015-02-03 03:12:04 -08:00
Jeffrey Pfau 6d18b9aea5 GBA Memory: Simplify memory API and use fixed bus width 2015-01-10 01:20:21 -08:00
Jeffrey Pfau 3d21ce1fd0 ARM7: Fix LDM writeback to a register already written 2014-12-17 21:15:49 -08:00
Jeffrey Pfau f6a7fedb28 All: Add MPL 2.0 license and associated headers 2014-12-03 00:39:06 -08:00
Jeffrey Pfau 537480b940 Load/Store multiple functions 2014-10-21 22:35:02 -07:00
Jeffrey Pfau 823b97603a Properly account for LDR I cycles (fixes #90) 2014-07-19 00:39:51 -07:00
Jeffrey Pfau fce2fb9252 Move flags and masks into defines to avoid making enums with values that are too large 2014-07-15 23:38:44 -07:00
Jeffrey Pfau 939c349533 Slightly more accurate waitstate emulation 2014-07-13 22:21:37 -07:00
Jeffrey Pfau aefa5f0ab8 Merge branch 'decoder' 
Conflicts:
	src/debugger/cli-debugger.c
 2014-07-12 00:40:40 -07:00
Jeffrey Pfau 2921ba8842 Split ARM emitters into own file 2014-07-10 23:21:28 -07:00
Jeffrey Pfau 0f68dbc832 Redo component model/type punning 2014-04-20 00:19:55 -07:00
Jeffrey Pfau c0eb7c81f7 Remove ARMMemory and ARMBoard shims 2014-04-19 18:14:17 -07:00
Jeffrey Pfau 5d19919df2 Extract emittor macros into headers 2014-03-29 22:59:39 -07:00
Jeffrey Pfau 8e5b806cdd Have board re-read CPSR when it is modified by MSR 2014-01-27 00:21:14 -08:00
Jeffrey Pfau 52808da265 Inline CPU stepping 2014-01-21 22:36:40 -08:00
Jeffrey Pfau e7d4f3ae8a Fix MSR with immediate 2014-01-20 15:40:56 -08:00
Jeffrey Pfau 2db6d27496 Implement SWP, SWPB 2014-01-20 15:19:52 -08:00
Jeffrey Pfau fede211874 Remove checks for ARM writeback operations that fail on real hardware 2014-01-20 15:10:41 -08:00
Jeffrey Pfau a969d70de3 Handle illegal and stub opcodes separately 2014-01-18 00:39:51 -08:00
Jeffrey Pfau 915b04dded Add support for PowerPC to the memory and CPU interfaces 2013-10-26 01:53:13 -04:00
Jeffrey Pfau 3e3bb58ae5 Minor timing fixes 2013-10-08 02:10:43 -07:00
Jeffrey Pfau 25885e1e82 Invalid memory reads 2013-09-27 23:48:56 -07:00
Jeffrey Pfau 99769695d7 Fix ADCS C bit 2013-09-26 00:25:48 -07:00
Jeffrey Pfau 13a2289e25 Fix ADCS 2013-09-25 00:27:40 -07:00
Jeffrey Pfau 6b86cdf9ef LDM should force-align loads 2013-07-31 01:59:00 -07:00
Jeffrey Pfau 425056ca15 Ensure LDM does not write back incorrectly with register list overlaps 2013-07-27 03:02:52 -07:00
Jeffrey Pfau 9e578da5a1 Do register writeback in addressing mode 2 before actual load/store 2013-07-26 23:42:45 -07:00
Jeffrey Pfau 8b1eb01a96 Fix MUL, UMULL, UMLAL 2013-07-26 01:03:34 -07:00
Jeffrey Pfau a6d87bbfb9 Better cycle counting for STR 2013-05-11 18:01:16 -07:00
Jeffrey Pfau b6361cdfa9 Start LDM/STM timings 2013-05-11 17:05:57 -07:00
Jeffrey Pfau f6592b17b8 Implement MUL timings 2013-05-11 14:35:10 -07:00
Jeffrey Pfau fc7aec557b Count cycles for load/store singles 2013-05-04 23:57:12 -07:00