ARM7: Fix cycle counting for loads

CHANGES

@@ -59,6 +59,7 @@ Bugfixes:
  - GBA: Fix timer initialization
  - GBA Memory: Fix I cycles that had been moved to ARM7 core
  - GBA Memory: Fix cycle counting for 32-bit load/stores
+ - ARM7: Fix cycle counting for loads
 Misc:
  - GBA Audio: Change internal audio sample buffer from 32-bit to 16-bit samples
  - GBA Memory: Simplify memory API and use fixed bus width

src/arm/isa-arm.c

@@ -254,7 +254,7 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {
 #define ADDR_MODE_4_WRITEBACK_STM cpu->gprs[rn] = address;
 
 #define ARM_LOAD_POST_BODY \
-	++currentCycles; \
+	currentCycles += 1 + cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32; \
 	if (rd == ARM_PC) { \
 		ARM_WRITE_PC; \
 	}
@@ -562,14 +562,14 @@ DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRT,
 
 DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM,
 	load,
-	++currentCycles;
+	currentCycles += 1 + cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32;
 	if (rs & 0x8000) {
 		ARM_WRITE_PC;
 	})
 
 DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM,
 	store,
-	currentCycles += cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32)
+	ARM_STORE_POST_BODY;)
 
 DEFINE_INSTRUCTION_ARM(SWP,
 	int rm = opcode & 0xF;

src/arm/isa-thumb.c

@@ -41,7 +41,8 @@
 
 #define THUMB_PREFETCH_CYCLES (1 + cpu->memory.activeSeqCycles16)
 
-#define THUMB_LOAD_POST_BODY ++currentCycles;
+#define THUMB_LOAD_POST_BODY \
+	currentCycles += 1 + cpu->memory.activeNonseqCycles16 - cpu->memory.activeSeqCycles16;
 
 #define THUMB_STORE_POST_BODY \
 	currentCycles += cpu->memory.activeNonseqCycles16 - cpu->memory.activeSeqCycles16;