mirror of https://github.com/mgba-emu/mgba.git
Fill in immediates
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63f6f53a80
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c07df4a337
61
src/arm.c
61
src/arm.c
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@ -12,6 +12,14 @@ static inline int _ARMModeHasSPSR(enum PrivilegeMode mode) {
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return mode != MODE_SYSTEM && mode != MODE_USER;
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}
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static inline void _barrelShift(struct ARMCore* cpu, uint32_t opcode) {
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// TODO
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}
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static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {
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// TODO
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}
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static const ARMInstruction armTable[0xF000];
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static inline void _ARMSetMode(struct ARMCore* cpu, enum ExecutionMode executionMode) {
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@ -159,18 +167,20 @@ inline void ARMCycle(struct ARMCore* cpu) {
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DEFINE_INSTRUCTION_EX_ARM(NAME, LE, ARM_COND_LE, BODY) \
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DEFINE_INSTRUCTION_EX_ARM(NAME, AL, ARM_COND_AL, BODY)
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// TODO: shifter
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#define DEFINE_ALU_INSTRUCTION_EX_ARM(NAME, S, S_BODY, BODY, POST_BODY) \
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DEFINE_INSTRUCTION_ARM(NAME ## S, \
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#define DEFINE_ALU_INSTRUCTION_EX_ARM(NAME, S_BODY, SHIFTER, BODY, POST_BODY) \
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DEFINE_INSTRUCTION_ARM(NAME, \
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int rd = (opcode >> 12) & 0xF; \
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int rn = (opcode >> 16) & 0xF; \
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SHIFTER(cpu, opcode); \
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BODY; \
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S_BODY; \
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POST_BODY;)
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#define DEFINE_ALU_INSTRUCTION_ARM(NAME, S_BODY, BODY, POST_BODY) \
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DEFINE_ALU_INSTRUCTION_EX_ARM(NAME, , , BODY, POST_BODY) \
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DEFINE_ALU_INSTRUCTION_EX_ARM(NAME, S, S_BODY, BODY, POST_BODY)
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DEFINE_ALU_INSTRUCTION_EX_ARM(NAME, , _barrelShift, BODY, POST_BODY) \
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DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## S, S_BODY, _barrelShift, BODY, POST_BODY) \
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DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## I, , _immediate, BODY, POST_BODY) \
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DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## SI, S_BODY, _immediate, BODY, POST_BODY)
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// Begin ALU definitions
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@ -264,6 +274,8 @@ DEFINE_INSTRUCTION_ARM(SWPB,)
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DEFINE_INSTRUCTION_ARM(ILL,) // Illegal opcode
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DEFINE_INSTRUCTION_ARM(MSR,)
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DEFINE_INSTRUCTION_ARM(MRS,)
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DEFINE_INSTRUCTION_ARM(MSRI,)
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DEFINE_INSTRUCTION_ARM(MRSI,)
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#define DECLARE_INSTRUCTION_ARM(COND, NAME) \
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_ARMInstruction ## NAME ## COND
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@ -280,7 +292,10 @@ DEFINE_INSTRUCTION_ARM(MRS,)
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DIRECTIVE, \
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DIRECTIVE \
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// TODO: MUL
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#define DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ALU) \
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DO_8(DECLARE_INSTRUCTION_ARM(COND, ALU ## I)), \
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DO_8(DECLARE_INSTRUCTION_ARM(COND, ALU ## I))
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#define DECLARE_ARM_ALU_BLOCK(COND, ALU, EX1, EX2, EX3, EX4) \
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DO_8(DECLARE_INSTRUCTION_ARM(COND, ALU)), \
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DECLARE_INSTRUCTION_ARM(COND, ALU), \
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@ -324,7 +339,39 @@ DEFINE_INSTRUCTION_ARM(MRS,)
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DECLARE_ARM_ALU_BLOCK(COND, BIC, SMLAL, STRH, ILL, ILL), \
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DECLARE_ARM_ALU_BLOCK(COND, BICS, SMLALS, LDRH, LDRSB, LDRSH), \
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DECLARE_ARM_ALU_BLOCK(COND, MVN, SMLAL, STRH, ILL, ILL), \
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DECLARE_ARM_ALU_BLOCK(COND, MVNS, SMLALS, LDRH, LDRSB, LDRSH)
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DECLARE_ARM_ALU_BLOCK(COND, MVNS, SMLALS, LDRH, LDRSB, LDRSH), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, AND), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ANDS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, EOR), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, EORS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, SUB), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, SUBS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, RSB), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, RSBS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ADD), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ADDS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ADC), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ADCS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, SBC), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, SBCS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, RSC), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, RSCS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MRS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, TST), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MSR), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, TEQ), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MRS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, CMP), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MSR), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, CMN), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ORR), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, ORRS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MOV), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MOVS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, BIC), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, BICS), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MVN), \
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DECLARE_ARM_ALU_IMMEDIATE_BLOCK(COND, MVNS)
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static const ARMInstruction armTable[0xF000] = {
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DECLARE_COND_BLOCK(EQ),
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