mirror of https://github.com/mgba-emu/mgba.git
Show s flag for ARM instructions
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@ -392,6 +392,7 @@ static const ARMDecoder _armDecoderTable[0x1000] = {
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};
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};
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void ARMDecodeARM(uint32_t opcode, struct ARMInstructionInfo* info) {
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void ARMDecodeARM(uint32_t opcode, struct ARMInstructionInfo* info) {
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info->execMode = MODE_ARM;
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info->opcode = opcode;
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info->opcode = opcode;
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info->branches = 0;
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info->branches = 0;
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info->traps = 0;
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info->traps = 0;
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@ -312,6 +312,7 @@ static const ThumbDecoder _thumbDecoderTable[0x400] = {
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};
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};
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void ARMDecodeThumb(uint16_t opcode, struct ARMInstructionInfo* info) {
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void ARMDecodeThumb(uint16_t opcode, struct ARMInstructionInfo* info) {
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info->execMode = MODE_THUMB;
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info->opcode = opcode;
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info->opcode = opcode;
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info->branches = 0;
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info->branches = 0;
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info->traps = 0;
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info->traps = 0;
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@ -247,6 +247,22 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
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case ARM_MN_SWP:
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case ARM_MN_SWP:
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flags = _armAccessTypeStrings[info->memory.width];
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flags = _armAccessTypeStrings[info->memory.width];
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break;
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break;
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case ARM_MN_ADD:
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case ARM_MN_ADC:
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case ARM_MN_AND:
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case ARM_MN_BIC:
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case ARM_MN_EOR:
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case ARM_MN_MOV:
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case ARM_MN_MVN:
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case ARM_MN_ORR:
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case ARM_MN_RSB:
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case ARM_MN_RSC:
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case ARM_MN_SBC:
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case ARM_MN_SUB:
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if (info->affectsCPSR && info->execMode == MODE_ARM) {
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flags = "s";
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}
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break;
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default:
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default:
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break;
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break;
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}
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}
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@ -1,6 +1,8 @@
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#ifndef ARM_DECODER_H
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#ifndef ARM_DECODER_H
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#define ARM_DECODER_H
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#define ARM_DECODER_H
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#include "arm.h"
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#include <stdint.h>
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#include <stdint.h>
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// Bit 0: a register is involved with this operand
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// Bit 0: a register is involved with this operand
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@ -165,6 +167,7 @@ enum ARMMnemonic {
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};
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};
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struct ARMInstructionInfo {
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struct ARMInstructionInfo {
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enum ExecutionMode execMode;
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uint32_t opcode;
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uint32_t opcode;
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enum ARMMnemonic mnemonic;
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enum ARMMnemonic mnemonic;
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union ARMOperand op1;
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union ARMOperand op1;
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