From a2eec31632f179004d21ab68cfff29933210c0cc Mon Sep 17 00:00:00 2001
From: Jeffrey Pfau <jeffrey@endrift.com>
Date: Sat, 12 Jul 2014 00:13:11 -0700
Subject: [PATCH] Show s flag for ARM instructions

---
 src/arm/decoder-arm.c   |  1 +
 src/arm/decoder-thumb.c |  1 +
 src/arm/decoder.c       | 16 ++++++++++++++++
 src/arm/decoder.h       |  3 +++
 4 files changed, 21 insertions(+)

diff --git a/src/arm/decoder-arm.c b/src/arm/decoder-arm.c
index 331114590..e9c5801c6 100644
--- a/src/arm/decoder-arm.c
+++ b/src/arm/decoder-arm.c
@@ -392,6 +392,7 @@ static const ARMDecoder _armDecoderTable[0x1000] = {
 };
 
 void ARMDecodeARM(uint32_t opcode, struct ARMInstructionInfo* info) {
+	info->execMode = MODE_ARM;
 	info->opcode = opcode;
 	info->branches = 0;
 	info->traps = 0;
diff --git a/src/arm/decoder-thumb.c b/src/arm/decoder-thumb.c
index 023ecfa1d..3a91e381a 100644
--- a/src/arm/decoder-thumb.c
+++ b/src/arm/decoder-thumb.c
@@ -312,6 +312,7 @@ static const ThumbDecoder _thumbDecoderTable[0x400] = {
 };
 
 void ARMDecodeThumb(uint16_t opcode, struct ARMInstructionInfo* info) {
+	info->execMode = MODE_THUMB;
 	info->opcode = opcode;
 	info->branches = 0;
 	info->traps = 0;
diff --git a/src/arm/decoder.c b/src/arm/decoder.c
index 9ed1e933c..51929133e 100644
--- a/src/arm/decoder.c
+++ b/src/arm/decoder.c
@@ -247,6 +247,22 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
 	case ARM_MN_SWP:
 		flags = _armAccessTypeStrings[info->memory.width];
 		break;
+	case ARM_MN_ADD:
+	case ARM_MN_ADC:
+	case ARM_MN_AND:
+	case ARM_MN_BIC:
+	case ARM_MN_EOR:
+	case ARM_MN_MOV:
+	case ARM_MN_MVN:
+	case ARM_MN_ORR:
+	case ARM_MN_RSB:
+	case ARM_MN_RSC:
+	case ARM_MN_SBC:
+	case ARM_MN_SUB:
+		if (info->affectsCPSR && info->execMode == MODE_ARM) {
+			flags = "s";
+		}
+		break;
 	default:
 		break;
 	}
diff --git a/src/arm/decoder.h b/src/arm/decoder.h
index e64b70af4..50a447e95 100644
--- a/src/arm/decoder.h
+++ b/src/arm/decoder.h
@@ -1,6 +1,8 @@
 #ifndef ARM_DECODER_H
 #define ARM_DECODER_H
 
+#include "arm.h"
+
 #include <stdint.h>
 
 // Bit 0: a register is involved with this operand
@@ -165,6 +167,7 @@ enum ARMMnemonic {
 };
 
 struct ARMInstructionInfo {
+	enum ExecutionMode execMode;
 	uint32_t opcode;
 	enum ARMMnemonic mnemonic;
 	union ARMOperand op1;